gem5
v20.1.0.0
cpu
inteltrace.hh
Go to the documentation of this file.
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/*
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* Copyright (c) 2001-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CPU_INTELTRACE_HH__
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#define __CPU_INTELTRACE_HH__
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#include "
base/trace.hh
"
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#include "
base/types.hh
"
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#include "
cpu/static_inst.hh
"
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#include "
cpu/thread_context.hh
"
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#include "debug/ExecEnable.hh"
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#include "params/IntelTrace.hh"
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#include "
sim/insttracer.hh
"
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namespace
Trace
{
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class
IntelTraceRecord
:
public
InstRecord
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{
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public
:
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IntelTraceRecord
(
Tick
_when,
ThreadContext
*_thread,
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const
StaticInstPtr
_staticInst,
TheISA::PCState
_pc,
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const
StaticInstPtr
_macroStaticInst = NULL)
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:
InstRecord
(_when, _thread, _staticInst, _pc,
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_macroStaticInst)
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{
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}
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void
dump
();
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};
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class
IntelTrace
:
public
InstTracer
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{
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public
:
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IntelTrace
(
const
IntelTraceParams *
p
) :
InstTracer
(
p
)
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{}
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IntelTraceRecord
*
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getInstRecord
(
Tick
when,
ThreadContext
*tc,
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const
StaticInstPtr
staticInst,
TheISA::PCState
pc
,
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const
StaticInstPtr
macroStaticInst = NULL)
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{
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if
(!Debug::ExecEnable)
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return
NULL;
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return
new
IntelTraceRecord
(when, tc, staticInst,
pc
, macroStaticInst);
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}
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};
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}
// namespace Trace
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#endif // __CPU_INTELTRACE_HH__
Trace::IntelTraceRecord
Definition:
inteltrace.hh:42
insttracer.hh
Trace
Definition:
nativetrace.cc:52
Tick
uint64_t Tick
Tick count type.
Definition:
types.hh:63
Trace::InstRecord
Definition:
insttracer.hh:55
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
Trace::IntelTrace::IntelTrace
IntelTrace(const IntelTraceParams *p)
Definition:
inteltrace.hh:60
MipsISA::pc
Bitfield< 4 > pc
Definition:
pra_constants.hh:240
static_inst.hh
MipsISA::PCState
GenericISA::DelaySlotPCState< MachInst > PCState
Definition:
types.hh:41
types.hh
Trace::IntelTrace
Definition:
inteltrace.hh:56
Trace::InstTracer
Definition:
insttracer.hh:257
RefCountingPtr< StaticInst >
trace.hh
MipsISA::p
Bitfield< 0 > p
Definition:
pra_constants.hh:323
Trace::IntelTraceRecord::dump
void dump()
Definition:
inteltrace.cc:43
thread_context.hh
Trace::IntelTraceRecord::IntelTraceRecord
IntelTraceRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, TheISA::PCState _pc, const StaticInstPtr _macroStaticInst=NULL)
Definition:
inteltrace.hh:45
Trace::IntelTrace::getInstRecord
IntelTraceRecord * getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, TheISA::PCState pc, const StaticInstPtr macroStaticInst=NULL)
Definition:
inteltrace.hh:64
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