gem5  v20.1.0.0
ltage.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2014 The University of Wisconsin
3  *
4  * Copyright (c) 2006 INRIA (Institut National de Recherche en
5  * Informatique et en Automatique / French National Research Institute
6  * for Computer Science and Applied Mathematics)
7  *
8  * All rights reserved.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions are
12  * met: redistributions of source code must retain the above copyright
13  * notice, this list of conditions and the following disclaimer;
14  * redistributions in binary form must reproduce the above copyright
15  * notice, this list of conditions and the following disclaimer in the
16  * documentation and/or other materials provided with the distribution;
17  * neither the name of the copyright holders nor the names of its
18  * contributors may be used to endorse or promote products derived from
19  * this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /* @file
35  * Implementation of a L-TAGE branch predictor. TAGE is a global-history based
36  * branch predictor. It features a PC-indexed bimodal predictor and N
37  * partially tagged tables, indexed with a hash of the PC and the global
38  * branch history. The different lengths of global branch history used to
39  * index the partially tagged tables grow geometrically. A small path history
40  * is also used in the hash. L-TAGE also features a loop predictor that records
41  * iteration count of loops and predicts accordingly.
42  *
43  * All TAGE tables are accessed in parallel, and the one using the longest
44  * history that matches provides the prediction (some exceptions apply).
45  * Entries are allocated in components using a longer history than the
46  * one that predicted when the prediction is incorrect.
47  */
48 
49 #ifndef __CPU_PRED_LTAGE
50 #define __CPU_PRED_LTAGE
51 
52 
53 #include <vector>
54 
55 #include "base/types.hh"
57 #include "cpu/pred/tage.hh"
58 #include "params/LTAGE.hh"
59 
60 class LTAGE : public TAGE
61 {
62  public:
63  LTAGE(const LTAGEParams *params);
64 
65  // Base class methods.
66  void squash(ThreadID tid, void *bp_history) override;
67  void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history,
68  bool squashed, const StaticInstPtr & inst,
69  Addr corrTarget) override;
70 
71  void init() override;
72  virtual void regStats() override;
73 
74  protected:
77 
78  // more provider types
79  enum {
82  };
83 
84  // Primary branch history entry
86  {
89  : TageBranchInfo(tage), lpBranchInfo(lp.makeBranchInfo())
90  {}
91 
92  virtual ~LTageBranchInfo()
93  {
94  delete lpBranchInfo;
95  }
96  };
97 
108  bool predict(
109  ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) override;
110 };
111 
112 #endif // __CPU_PRED_LTAGE
LTAGE::regStats
virtual void regStats() override
Callback to set stat parameters.
Definition: ltage.cc:145
TAGE
Definition: tage.hh:58
LoopPredictor::BranchInfo
Definition: loop_predictor.hh:122
ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:227
LTAGE
Definition: ltage.hh:60
LoopPredictor
Definition: loop_predictor.hh:43
LTAGE::LAST_LTAGE_PROVIDER_TYPE
@ LAST_LTAGE_PROVIDER_TYPE
Definition: ltage.hh:81
tage.hh
TAGE::TageBranchInfo
Definition: tage.hh:63
LTAGE::LTageBranchInfo
Definition: ltage.hh:85
TAGEBase::LAST_TAGE_PROVIDER_TYPE
@ LAST_TAGE_PROVIDER_TYPE
Definition: tage_base.hh:116
LTAGE::LTageBranchInfo::LTageBranchInfo
LTageBranchInfo(TAGEBase &tage, LoopPredictor &lp)
Definition: ltage.hh:88
LTAGE::LOOP
@ LOOP
Definition: ltage.hh:80
LTAGE::update
void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, bool squashed, const StaticInstPtr &inst, Addr corrTarget) override
Updates the BP with taken/not taken information.
Definition: ltage.cc:91
TAGE::tage
TAGEBase * tage
Definition: tage.hh:61
TAGEBase
Definition: tage_base.hh:58
LTAGE::squash
void squash(ThreadID tid, void *bp_history) override
Definition: ltage.cc:133
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
SimObject::params
const Params * params() const
Definition: sim_object.hh:119
LTAGE::loopPredictor
LoopPredictor * loopPredictor
The loop predictor object.
Definition: ltage.hh:76
ArmISA::b
Bitfield< 7 > b
Definition: miscregs_types.hh:376
loop_predictor.hh
types.hh
LTAGE::LTAGE
LTAGE(const LTAGEParams *params)
Definition: ltage.cc:47
LTAGE::LTageBranchInfo::lpBranchInfo
LoopPredictor::BranchInfo * lpBranchInfo
Definition: ltage.hh:87
RefCountingPtr< StaticInst >
LTAGE::predict
bool predict(ThreadID tid, Addr branch_pc, bool cond_branch, void *&b) override
Get a branch prediction from LTAGE.
Definition: ltage.cc:60
LTAGE::LTageBranchInfo::~LTageBranchInfo
virtual ~LTageBranchInfo()
Definition: ltage.hh:92
LTAGE::init
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: ltage.cc:53

Generated on Wed Sep 30 2020 14:02:09 for gem5 by doxygen 1.8.17