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44 #include "debug/Fetch.hh"
45 #include "debug/LTage.hh"
48 :
TAGE(params), loopPredictor(params->loop_predictor)
69 bi->lpBranchInfo, pred_taken,
72 if (
bi->lpBranchInfo->loopPredUsed) {
73 bi->tageBranchInfo->provider =
LOOP;
75 DPRINTF(LTage,
"Predict for %lx: taken?:%d, loopTaken?:%d, "
76 "loopValid?:%d, loopUseCounter:%d, tagePred:%d, altPred:%d\n",
77 branch_pc, pred_taken,
bi->lpBranchInfo->loopPred,
78 bi->lpBranchInfo->loopPredValid,
80 bi->tageBranchInfo->tagePred,
bi->tageBranchInfo->altTaken);
84 bi->lpBranchInfo->predTaken = pred_taken;
102 tage->
squash(tid, taken,
bi->tageBranchInfo, corrTarget);
104 if (
bi->tageBranchInfo->condBranch) {
112 if (
bi->tageBranchInfo->condBranch) {
113 DPRINTF(LTage,
"Updating tables for branch:%lx; taken?:%d\n",
123 nrand, corrTarget,
bi->lpBranchInfo->predTaken);
137 if (
bi->tageBranchInfo->condBranch) {
151 LTAGEParams::create()
153 return new LTAGE(
this);
virtual void regStats()
Callback to set stat parameters.
virtual void regStats() override
Callback to set stat parameters.
void updateStats(bool taken, BranchInfo *bi)
Update the stats.
virtual void squash(ThreadID tid, void *bp_history) override
int16_t ThreadID
Thread index/ID type.
void squash(ThreadID tid, BranchInfo *bi)
const unsigned instShiftAmt
Number of bits to shift instructions by for predictor addresses.
virtual void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *bi, int nrand, Addr corrTarget, bool pred, bool preAdjustAlloc=false)
Update TAGE for conditional branches.
void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, bool squashed, const StaticInstPtr &inst, Addr corrTarget) override
Updates the BP with taken/not taken information.
void squashLoop(BranchInfo *bi)
virtual void updateHistories(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *b, bool speculative, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr, Addr target=MaxAddr)
(Speculatively) updates global histories (path and direction).
virtual void updateStats(bool taken, BranchInfo *bi)
Update the stats.
void squash(ThreadID tid, void *bp_history) override
bool loopPredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi, bool prev_pred_taken, unsigned instShiftAmt)
Get the loop prediction.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
virtual void squash(ThreadID tid, bool taken, BranchInfo *bi, Addr target)
Restores speculatively updated path and direction histories.
bool isSpeculativeUpdateEnabled() const
LoopPredictor * loopPredictor
The loop predictor object.
LTAGE(const LTAGEParams *params)
void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, bool tage_pred, BranchInfo *bi, unsigned instShiftAmt)
Update LTAGE for conditional branches.
virtual void init()
init() is called after all C++ SimObjects have been created and all ports are connected.
bool tagePredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi)
TAGE prediction called from TAGE::predict.
std::enable_if< std::is_integral< T >::value, T >::type random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
int8_t getLoopUseCounter() const
Gets the value of the loop use counter.
bool predict(ThreadID tid, Addr branch_pc, bool cond_branch, void *&b) override
Get a branch prediction from LTAGE.
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
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