gem5  v20.1.0.0
pc.hh
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28 
35 #ifndef __DEV_PC_HH__
36 #define __DEV_PC_HH__
37 
38 #include "dev/platform.hh"
39 #include "params/Pc.hh"
40 
41 class IdeController;
42 class System;
43 class SouthBridge;
44 
45 class Pc : public Platform
46 {
47  public:
51 
52  public:
53  typedef PcParams Params;
54 
58  void init() override;
59 
60  Pc(const Params *p);
61 
62  public:
63  void postConsoleInt() override;
64  void clearConsoleInt() override;
65 
66  void postPciInt(int line) override;
67  void clearPciInt(int line) override;
68 };
69 
70 #endif // __DEV_PC_HH__
Pc::Params
PcParams Params
Definition: pc.hh:53
SouthBridge
Definition: south_bridge.hh:44
IdeController
Device model for an Intel PIIX4 IDE controller.
Definition: ide_ctrl.hh:48
Pc::Pc
Pc(const Params *p)
Definition: pc.cc:48
Pc::init
void init() override
Do platform initialization stuff.
Definition: pc.cc:55
Pc::postConsoleInt
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
Definition: pc.cc:113
System
Definition: system.hh:73
Pc::clearPciInt
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.
Definition: pc.cc:133
Pc::system
System * system
Pointer to the system.
Definition: pc.hh:49
Platform
Definition: platform.hh:49
platform.hh
Pc::southBridge
SouthBridge * southBridge
Definition: pc.hh:50
Pc
Definition: pc.hh:45
Platform::Params
PlatformParams Params
Definition: platform.hh:56
Pc::postPciInt
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
Definition: pc.cc:127
Pc::clearConsoleInt
void clearConsoleInt() override
Clear a posted CPU interrupt.
Definition: pc.cc:120
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323

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