#include <system.hh>

Inheritance diagram for System:

Classes
class	SystemPort
	Private class for the system port which is only used as a requestor for debug access and for non-structural entities that do not have a port of their own. More...

class	Threads

Public Types
typedef SystemParams	Params

Public Types inherited from SimObject
typedef SimObjectParams	Params

Public Member Functions
void	init () override
	After all objects have been created and all ports are connected, check that the system port is connected. More...

void	startup () override
	startup() is the final initialization call before simulation. More...

RequestPort &	getSystemPort ()
	Get a reference to the system port that can be used by non-structural simulation objects like processes or threads, or external entities like loaders and debuggers, etc, to access the memory system. More...

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Additional function to return the Port of a memory object. More...

unsigned int	cacheLineSize () const
	Get the cache line size of the system. More...

bool	schedule (PCEvent *event) override

bool	remove (PCEvent *event) override

KvmVM *	getKvmVM ()
	Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present. More...

bool	validKvmEnvironment () const
	Verify gem5 configuration will support KVM emulation. More...

PhysicalMemory &	getPhysMem ()
	Get a pointer to access the physical memory of the system. More...

Addr	freeMemSize () const
	Amount of physical memory that is still free. More...

Addr	memSize () const
	Amount of physical memory that exists. More...

bool	isMemAddr (Addr addr) const
	Check if a physical address is within a range of a memory that is part of the global address map. More...

void	addDeviceMemory (RequestorID requestorId, AbstractMemory *deviceMemory)
	Add a physical memory range for a device. More...

bool	isDeviceMemAddr (PacketPtr pkt) const
	Similar to isMemAddr but for devices. More...

AbstractMemory *	getDeviceMemory (RequestorID _id) const
	Return a pointer to the device memory. More...

Arch	getArch () const
	Get the architecture. More...

ByteOrder	getGuestByteOrder () const
	Get the guest byte order. More...

Addr	getPageBytes () const
	Get the page bytes for the ISA. More...

Addr	getPageShift () const
	Get the number of bits worth of in-page address for the ISA. More...

ThermalModel *	getThermalModel () const
	The thermal model used for this system (if any). More...

RequestorID	getRequestorId (const SimObject *requestor, std::string subrequestor=std::string())
	Request an id used to create a request object in the system. More...

RequestorID	getGlobalRequestorId (const std::string &requestor_name)
	Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since no SimObject is passed, the requestor gets registered by providing the full requestor name. More...

std::string	getRequestorName (RequestorID requestor_id)
	Get the name of an object for a given request id. More...

RequestorID	lookupRequestorId (const SimObject *obj) const
	Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if not found. More...

RequestorID	lookupRequestorId (const std::string &name) const
	Looks up the RequestorID for a given object name string returns an invalid RequestorID (invldRequestorId) if not found. More...

RequestorID	maxRequestors ()
	Get the number of requestors registered in the system. More...

void	regStats () override
	Callback to set stat parameters. More...

uint64_t	incWorkItemsBegin ()
	Called by pseudo_inst to track the number of work items started by this system. More...

uint64_t	incWorkItemsEnd ()
	Called by pseudo_inst to track the number of work items completed by this system. More...

int	markWorkItem (int index)
	Called by pseudo_inst to mark the cpus actively executing work items. More...

void	workItemBegin (uint32_t tid, uint32_t workid)

void	workItemEnd (uint32_t tid, uint32_t workid)

bool	breakpoint ()

	System (Params *p)

	~System ()

const Params *	params () const

const AddrRange &	m5opRange () const
	Range used by memory-mapped m5 pseudo-ops if enabled. More...

Addr	allocPhysPages (int npages)
	Allocate npages contiguous unused physical pages. More...

ContextID	registerThreadContext (ThreadContext *tc, ContextID assigned=InvalidContextID)

void	replaceThreadContext (ThreadContext *tc, ContextID context_id)

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

void	drainResume () override
	Resume execution after a successful drain. More...


bool	isAtomicMode () const
	Is the system in atomic mode? More...

bool	isTimingMode () const
	Is the system in timing mode? More...

bool	bypassCaches () const
	Should caches be bypassed? More...


Enums::MemoryMode	getMemoryMode () const
	Get the memory mode of the system. More...

void	setMemoryMode (Enums::MemoryMode mode)
	Change the memory mode of the system. More...

Public Member Functions inherited from SimObject
const Params *	params () const

	SimObject (const Params *_params)

virtual	~SimObject ()

virtual const std::string	name () const

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	regProbePoints ()
	Register probe points for this object. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...

Public Member Functions inherited from EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue. More...

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

virtual void	notifyFork ()
	Notify a child process of a fork. More...

Public Member Functions inherited from Stats::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group. More...

virtual	~Group ()

virtual void	resetStats ()
	Callback to reset stats. More...

virtual void	preDumpStats ()
	Callback before stats are dumped. More...

void	addStat (Stats::Info *info)
	Register a stat with this group. More...

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object. More...

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object. More...

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block. More...

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group. More...

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Static Public Member Functions
static void	printSystems ()

Static Public Member Functions inherited from SimObject
static void	serializeAll (CheckpointOut &cp)
	Serialize all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

Static Public Member Functions inherited from Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...

static void	serializeAll (const std::string &cpt_dir)
	Serializes all the SimObjects. More...

static void	unserializeGlobals (CheckpointIn &cp)

Public Attributes
Threads	threads

const bool	multiThread

Addr	pagePtr

uint64_t	init_param

PortProxy	physProxy
	Port to physical memory used for writing object files into ram at boot. More...

Workload *	workload = nullptr
	OS kernel. More...

Counter	totalNumInsts

std::map< std::pair< uint32_t, uint32_t >, Tick >	lastWorkItemStarted

std::map< uint32_t, Stats::Histogram * >	workItemStats

FutexMap	futexMap

std::set< int >	PIDs
	Process set to track which PIDs have already been allocated. More...

std::list< BasicSignal >	signalList

std::vector< RedirectPath * >	redirectPaths

Static Public Attributes
static std::vector< System * >	systemList

static int	numSystemsRunning = 0

static const int	maxPID = 32768

Protected Member Functions
std::string	stripSystemName (const std::string &requestor_name) const
	Strips off the system name from a requestor name. More...

RequestorID	_getRequestorId (const SimObject *requestor, const std::string &requestor_name)
	helper function for getRequestorId More...

std::string	leafRequestorName (const SimObject *requestor, const std::string &subrequestor)
	Helper function for constructing the full (sub)requestor name by providing the root requestor and the relative subrequestor name. More...

Protected Member Functions inherited from Drainable
	Drainable ()

virtual	~Drainable ()

void	signalDrainDone () const
	Signal that an object is drained. More...

Protected Attributes
KvmVM *const	kvmVM

PhysicalMemory	physmem

Enums::MemoryMode	memoryMode

const unsigned int	_cacheLineSize

uint64_t	workItemsBegin

uint64_t	workItemsEnd

uint32_t	numWorkIds

std::vector< RequestorInfo >	requestors
	This array is a per-system list of all devices capable of issuing a memory system request and an associated string for each requestor id. More...

ThermalModel *	thermalModel

Params *	_params

const AddrRange	_m5opRange
	Range for memory-mapped m5 pseudo ops. More...

Protected Attributes inherited from SimObject
const SimObjectParams *	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Private Attributes
std::list< PCEvent * >	liveEvents

SystemPort	_systemPort

std::unordered_map< RequestorID, AbstractMemory * >	deviceMemMap

Detailed Description

Definition at line 73 of file system.hh.

Member Typedef Documentation

◆ Params

typedef SystemParams System::Params

Definition at line 564 of file system.hh.

Constructor & Destructor Documentation

◆ System()

System::System ( Params * p )

Definition at line 205 of file system.cc.

References _cacheLineSize, Request::funcRequestorId, getRequestorId(), Request::intRequestorId, kvmVM, numSystemsRunning, params(), KvmVM::setSystem(), Workload::system, systemList, warn_once, Request::wbRequestorId, workload, and RiscvISA::x.

◆ ~System()

System::~System ( )

Definition at line 266 of file system.cc.

References ArmISA::j, numWorkIds, and workItemStats.

Member Function Documentation

◆ _getRequestorId()

RequestorID System::_getRequestorId	(	const SimObject *	requestor,
		const std::string &	requestor_name
	)

protected

helper function for getRequestorId

Definition at line 607 of file system.cc.

References Stats::enabled(), fatal, ArmISA::i, SimObject::name(), requestors, and stripSystemName().

Referenced by getGlobalRequestorId(), and getRequestorId().

◆ addDeviceMemory()

void System::addDeviceMemory	(	RequestorID	requestorId,
		AbstractMemory *	deviceMemory
	)

Add a physical memory range for a device.

The ranges added here will be considered a non-PIO memory address if the requestorId of the packet and range match something in the device memory map.

Definition at line 423 of file system.cc.

References deviceMemMap.

◆ allocPhysPages()

Addr System::allocPhysPages ( int npages )

Allocate npages contiguous unused physical pages.

Returns: Starting address of first page

Definition at line 386 of file system.cc.

References _m5opRange, AddrRange::contains(), fatal, pagePtr, ArmISA::PageShift, physmem, PhysicalMemory::totalSize(), and warn.

Referenced by Process::allocateMem(), X86ISA::X86_64Process::initState(), and Process::replicatePage().

◆ breakpoint()

bool System::breakpoint ( )

Definition at line 314 of file system.cc.

References BaseRemoteGDB::breakpoint(), System::Threads::Thread::gdb, System::Threads::size(), System::Threads::thread(), and threads.

◆ bypassCaches()

bool System::bypassCaches ( ) const

inline

Should caches be bypassed?

Some CPUs need to bypass caches to allow direct memory accesses, which is required for hardware virtualization.

Definition at line 279 of file system.hh.

References memoryMode.

Referenced by HDLcd::cmdDisable(), HDLcd::cmdEnable(), HDLcd::drainResume(), CoherentXBar::forwardAtomic(), CoherentXBar::forwardFunctional(), CoherentXBar::forwardTiming(), RubyPort::MemResponsePort::recvAtomic(), RubyPort::PioResponsePort::recvAtomic(), CoherentXBar::recvAtomicBackdoor(), CoherentXBar::recvFunctional(), CoherentXBar::recvTimingReq(), CoherentXBar::recvTimingResp(), DmaReadFifo::resumeFill(), NonCachingSimpleCPU::verifyMemoryMode(), and BaseKvmCPU::verifyMemoryMode().

◆ cacheLineSize()

unsigned int System::cacheLineSize ( ) const

inline

Get the cache line size of the system.

Definition at line 307 of file system.hh.

References _cacheLineSize.

Referenced by DmaDevice::cacheBlockSize(), BaseTrafficGen::createDram(), BaseTrafficGen::createDramRot(), BaseTrafficGen::createHybrid(), BaseTrafficGen::createLinear(), BaseTrafficGen::createNvm(), BaseTrafficGen::createRandom(), DmaPort::dmaAction(), AbstractMemory::initState(), MemFootprintProbe::MemFootprintProbe(), ArmISA::ISA::readMiscReg(), and DmaReadFifo::resumeFillFunctional().

◆ drainResume()

void System::drainResume ( )

overridevirtual

Resume execution after a successful drain.

Reimplemented from Drainable.

Definition at line 448 of file system.cc.

References totalNumInsts.

◆ freeMemSize()

Addr System::freeMemSize ( ) const

Amount of physical memory that is still free.

Definition at line 411 of file system.cc.

References pagePtr, ArmISA::PageShift, physmem, and PhysicalMemory::totalSize().

Referenced by Linux::procMeminfo().

◆ getArch()

Arch System::getArch ( ) const

inline

Get the architecture.

Definition at line 382 of file system.hh.

Referenced by Sequencer::makeRequest().

◆ getDeviceMemory()

AbstractMemory * System::getDeviceMemory ( RequestorID _id ) const

Return a pointer to the device memory.

Definition at line 440 of file system.cc.

References deviceMemMap, and panic_if.

Referenced by RubyPort::MemResponsePort::hitCallback().

◆ getGlobalRequestorId()

RequestorID System::getGlobalRequestorId ( const std::string & requestor_name )

Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since no SimObject is passed, the requestor gets registered by providing the full requestor name.

Parameters

requestorName full name of the requestor

Returns: the requestor's ID.

Definition at line 594 of file system.cc.

References _getRequestorId().

◆ getGuestByteOrder()

ByteOrder System::getGuestByteOrder ( ) const

inline

Get the guest byte order.

Definition at line 388 of file system.hh.

References _params.

Referenced by _llseekFunc(), and getcpuFunc().

◆ getKvmVM()

KvmVM* System::getKvmVM ( )

inline

Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present.

Definition at line 334 of file system.hh.

References kvmVM.

Referenced by MuxingKvmGic::MuxingKvmGic().

◆ getMemoryMode()

Enums::MemoryMode System::getMemoryMode ( ) const

inline

Get the memory mode of the system.

\warn This should only be used by the Python world. The C++ world should use one of the query functions above (isAtomicMode(), isTimingMode(), bypassCaches()).

Definition at line 292 of file system.hh.

References memoryMode.

Referenced by MinorCPU::init().

◆ getPageBytes()

Addr System::getPageBytes ( ) const

inline

Get the page bytes for the ISA.

Definition at line 396 of file system.hh.

References ArmISA::PageBytes.

Referenced by Process::allocateMem(), getpagesizeFunc(), IdeController::IdeController(), mmap2Func(), mmapFunc(), mremapFunc(), munmapFunc(), Process::replicatePage(), and Process::updateBias().

◆ getPageShift()

Addr System::getPageShift ( ) const

inline

Get the number of bits worth of in-page address for the ISA.

Definition at line 401 of file system.hh.

References ArmISA::PageShift.

◆ getPhysMem()

PhysicalMemory& System::getPhysMem ( )

inline

Get a pointer to access the physical memory of the system.

Definition at line 342 of file system.hh.

References physmem.

Referenced by KvmVM::delayedStartup(), ArmSemihosting::gatherHeapInfo(), ArmISA::FsLinux::initState(), and NonCachingSimpleCPU::sendPacket().

◆ getPort()

Port & System::getPort	(	const std::string &	if_name,
		PortID	idx = `InvalidPortID`
	)

overridevirtual

Additional function to return the Port of a memory object.

Reimplemented from SimObject.

Definition at line 301 of file system.cc.

References _systemPort.

◆ getRequestorId()

RequestorID System::getRequestorId	(	const SimObject *	requestor,
		std::string	subrequestor = `std::string()`
	)

Request an id used to create a request object in the system.

All objects that intend to issues requests into the memory system must request an id in the init() phase of startup. All requestor ids must be fixed by the regStats() phase that immediately precedes it. This allows objects in the memory system to understand how many requestors may exist and appropriately name the bins of their per-requestor stats before the stats are finalized.

Registers a RequestorID: This method takes two parameters, one of which is optional. The first one is the requestor object, and it is compulsory; in case a object has multiple (sub)requestors, a second parameter must be provided and it contains the name of the subrequestor. The method will create a requestor's name by concatenating the SimObject name with the eventual subrequestor string, separated by a dot.

As an example: For a cpu having two requestors: a data requestor and an instruction requestor, the method must be called twice:

instRequestorId = getRequestorId(cpu, "inst"); dataRequestorId = getRequestorId(cpu, "data");

and the requestors' names will be:

"cpu.inst"
"cpu.data"

Parameters

requestor	SimObject related to the requestor
subrequestor	String containing the subrequestor's name

Returns: the requestor's ID.

Definition at line 600 of file system.cc.

References _getRequestorId(), and leafRequestorName().

Referenced by System().

◆ getRequestorName()

std::string System::getRequestorName ( RequestorID requestor_id )

Get the name of an object for a given request id.

Definition at line 651 of file system.cc.

References fatal, and requestors.

Referenced by QoS::MemCtrl::addRequestor(), QoS::MemSinkCtrl::processNextReqEvent(), QoS::MemCtrl::qosSchedule(), QoS::MemSinkCtrl::recvTimingReq(), BaseTags::BaseTagStats::regStats(), QoS::MemCtrl::MemCtrlStats::regStats(), AbstractMemory::MemStats::regStats(), BaseCache::CacheStats::regStats(), BaseCache::CacheCmdStats::regStatsFromParent(), QoS::FixedPriorityPolicy::schedule(), and MemTraceProbe::startup().

◆ getSystemPort()

RequestPort& System::getSystemPort ( )

inline

Get a reference to the system port that can be used by non-structural simulation objects like processes or threads, or external entities like loaders and debuggers, etc, to access the memory system.

Returns: a reference to the system port we own

Definition at line 240 of file system.hh.

References _systemPort.

◆ getThermalModel()

ThermalModel* System::getThermalModel ( ) const

inline

The thermal model used for this system (if any).

Definition at line 406 of file system.hh.

References thermalModel.

Referenced by RealViewTemperatureSensor::read().

◆ incWorkItemsBegin()

uint64_t System::incWorkItemsBegin ( )

inline

Called by pseudo_inst to track the number of work items started by this system.

Definition at line 525 of file system.hh.

References workItemsBegin.

Referenced by PseudoInst::workbegin().

◆ incWorkItemsEnd()

uint64_t System::incWorkItemsEnd ( )

inline

Called by pseudo_inst to track the number of work items completed by this system.

Definition at line 535 of file system.hh.

References workItemsEnd.

Referenced by PseudoInst::workend().

◆ init()

void System::init ( )

overridevirtual

After all objects have been created and all ports are connected, check that the system port is connected.

Reimplemented from SimObject.

Definition at line 273 of file system.cc.

References _systemPort, Port::isConnected(), SimObject::name(), and panic.

Referenced by BaseTags::BaseTagStats::regStats().

◆ isAtomicMode()

bool System::isAtomicMode ( ) const

inline

Is the system in atomic mode?

There are currently two different atomic memory modes: 'atomic', which supports caches; and 'atomic_noncaching', which bypasses caches. The latter is used by hardware virtualized CPUs. SimObjects are expected to use Port::sendAtomic() and Port::recvAtomic() when accessing memory in this mode.

Definition at line 258 of file system.hh.

References ArmISA::atomic, and memoryMode.

Referenced by SMMUTranslationProcess::completeTransaction(), SMMUv3::processCommands(), SMMUv3::runProcess(), Gicv3Its::runProcess(), DmaPort::sendDma(), NonCachingSimpleCPU::verifyMemoryMode(), and AtomicSimpleCPU::verifyMemoryMode().

◆ isDeviceMemAddr()

bool System::isDeviceMemAddr ( PacketPtr pkt ) const

Similar to isMemAddr but for devices.

Checks if a physical address of the packet match an address range of a device corresponding to the RequestorId of the request.

Definition at line 431 of file system.cc.

References deviceMemMap, Packet::getAddr(), and Packet::requestorId().

Referenced by RubyPort::MemResponsePort::hitCallback(), RubyPort::MemResponsePort::isPhysMemAddress(), RubyPort::ruby_hit_callback(), and HTMSequencer::rubyHtmCallback().

◆ isMemAddr()

bool System::isMemAddr ( Addr addr ) const

Check if a physical address is within a range of a memory that is part of the global address map.

Parameters

addr	A physical address

Returns: Whether the address corresponds to a memory

Definition at line 417 of file system.cc.

References addr, PhysicalMemory::isMemAddr(), and physmem.

Referenced by MemFootprintProbe::handleRequest(), RubyPort::MemResponsePort::hitCallback(), KernelWorkload::initState(), RubyPort::MemResponsePort::isPhysMemAddress(), RubyPort::ruby_hit_callback(), HTMSequencer::rubyHtmCallback(), NonCachingSimpleCPU::sendPacket(), and BaseTrafficGen::update().

◆ isTimingMode()

bool System::isTimingMode ( ) const

inline

Is the system in timing mode?

SimObjects are expected to use Port::sendTiming() and Port::recvTiming() when accessing memory in this mode.

Definition at line 269 of file system.hh.

References memoryMode.

Referenced by SMMUTranslationProcess::completeTransaction(), SMMUProcess::doDelay(), MinorCPU::drainResume(), MemCtrl::drainResume(), TrafficGen::initState(), SMMUTranslationProcess::issuePrefetch(), SMMUv3::processCommands(), SMMUTranslationProcess::resumeTransaction(), SMMUv3::runProcess(), Gicv3Its::runProcess(), DmaPort::sendDma(), RiscvISA::Walker::start(), X86ISA::Walker::start(), MemCtrl::startup(), and TimingSimpleCPU::verifyMemoryMode().

◆ leafRequestorName()

std::string System::leafRequestorName	(	const SimObject *	requestor,
		const std::string &	subrequestor
	)

protected

Helper function for constructing the full (sub)requestor name by providing the root requestor and the relative subrequestor name.

Definition at line 638 of file system.cc.

References SimObject::name().

Referenced by getRequestorId().

◆ lookupRequestorId() [1/2]

RequestorID System::lookupRequestorId ( const SimObject * obj ) const

Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if not found.

Definition at line 557 of file system.cc.

References fatal_if, ArmISA::i, ArmISA::id, Request::invldRequestorId, and requestors.

Referenced by QoS::PropFairPolicy::initRequestor(), and QoS::Policy::pair().

◆ lookupRequestorId() [2/2]

RequestorID System::lookupRequestorId ( const std::string & name ) const

Looks up the RequestorID for a given object name string returns an invalid RequestorID (invldRequestorId) if not found.

Definition at line 580 of file system.cc.

References ArmISA::i, Request::invldRequestorId, SimObject::name(), requestors, and stripSystemName().

◆ m5opRange()

const AddrRange& System::m5opRange ( ) const

inline

Range used by memory-mapped m5 pseudo-ops if enabled.

Returns an invalid/empty range if disabled.

Definition at line 585 of file system.hh.

References _m5opRange.

Referenced by ArmISA::TLB::TLB().

◆ markWorkItem()

int System::markWorkItem ( int index )

inline

Called by pseudo_inst to mark the cpus actively executing work items.

Returns the total number of cpus that have executed work item begin or ends.

Definition at line 546 of file system.hh.

References MipsISA::index, System::Threads::markActive(), System::Threads::numActive(), and threads.

Referenced by PseudoInst::workbegin(), and PseudoInst::workend().

◆ maxRequestors()

RequestorID System::maxRequestors ( )

inline

Get the number of requestors registered in the system.

Definition at line 503 of file system.hh.

References requestors.

Referenced by BaseCache::getNextQueueEntry(), BaseCache::handleTimingReqMiss(), BaseCache::incHitCount(), BaseCache::incMissCount(), BaseCache::recvTimingResp(), BaseTags::BaseTagStats::regStats(), QoS::MemCtrl::MemCtrlStats::regStats(), AbstractMemory::MemStats::regStats(), BaseCache::CacheStats::regStats(), BaseCache::CacheCmdStats::regStatsFromParent(), NoncoherentCache::serviceMSHRTargets(), Cache::serviceMSHRTargets(), and MemTraceProbe::startup().

◆ memSize()

Addr System::memSize ( ) const

Amount of physical memory that exists.

Definition at line 405 of file system.cc.

References physmem, and PhysicalMemory::totalSize().

Referenced by Linux::procMeminfo().

◆ params()

const Params* System::params ( ) const

inline

Definition at line 579 of file system.hh.

References _params.

Referenced by PseudoInst::loadsymbol(), PseudoInst::readfile(), System(), PseudoInst::workbegin(), and PseudoInst::workend().

◆ printSystems()

void System::printSystems ( )

static

Definition at line 526 of file system.cc.

References ArmISA::i, SimObject::name(), and systemList.

Referenced by printSystems().

◆ registerThreadContext()

ContextID System::registerThreadContext	(	ThreadContext *	tc,
		ContextID	assigned = `InvalidContextID`
	)

Definition at line 325 of file system.cc.

References ArmISA::e, ArmISA::id, System::Threads::insert(), liveEvents, PCEventScope::schedule(), and threads.

Referenced by BaseCPU::registerThreadContexts().

◆ regStats()

void System::regStats ( )

overridevirtual

Callback to set stat parameters.

This callback is typically used for complex stats (e.g., distributions) that need parameters in addition to a name and a description. Stat names and descriptions should typically be set from the constructor usingo from the constructor using the ADD_STAT macro.

Reimplemented from Stats::Group.

Definition at line 493 of file system.cc.

References ccprintf(), ArmISA::j, SimObject::name(), numWorkIds, Stats::Group::regStats(), and workItemStats.

◆ remove()

bool System::remove ( PCEvent * event )

overridevirtual

Implements PCEventScope.

Definition at line 346 of file system.cc.

References MipsISA::event, liveEvents, and threads.

◆ replaceThreadContext()

void System::replaceThreadContext	(	ThreadContext *	tc,
		ContextID	context_id
	)

Definition at line 356 of file system.cc.

References ArmISA::e, liveEvents, System::Threads::replace(), PCEventScope::schedule(), and threads.

Referenced by BaseCPU::takeOverFrom().

◆ schedule()

bool System::schedule ( PCEvent * event )

overridevirtual

Implements PCEventScope.

Definition at line 336 of file system.cc.

References MipsISA::event, liveEvents, and threads.

◆ serialize()

void System::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from SimObject.

Definition at line 454 of file system.cc.

References csprintf(), pagePtr, paramOut(), physmem, SERIALIZE_SCALAR, Serializable::serializeSection(), ArmISA::t, System::Threads::threads, and threads.

◆ setMemoryMode()

void System::setMemoryMode ( Enums::MemoryMode mode )

Change the memory mode of the system.

\warn This should only be called by the Python!

Parameters

mode	Mode to change to (atomic/timing/...)

Definition at line 308 of file system.cc.

References Drained, Drainable::drainState(), memoryMode, and ArmISA::mode.

◆ startup()

void System::startup ( )

overridevirtual

startup() is the final initialization call before simulation.

All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.

Reimplemented from SimObject.

Definition at line 281 of file system.cc.

References System::Threads::Thread::gdb, ArmISA::i, inform, System::Threads::size(), SimObject::startup(), System::Threads::thread(), and threads.