gem5  v20.1.0.0
Namespaces | Typedefs | Enumerations | Variables
registers.hh File Reference
#include "arch/generic/vec_pred_reg.hh"
#include "arch/generic/vec_reg.hh"
#include "arch/power/generated/max_inst_regs.hh"
#include "arch/power/miscregs.hh"
#include "base/types.hh"

Go to the source code of this file.

Namespaces

 PowerISA
 

Typedefs

using PowerISA::VecElem = ::DummyVecElem
 
using PowerISA::VecReg = ::DummyVecReg
 
using PowerISA::ConstVecReg = ::DummyConstVecReg
 
using PowerISA::VecRegContainer = ::DummyVecRegContainer
 
using PowerISA::VecPredReg = ::DummyVecPredReg
 
using PowerISA::ConstVecPredReg = ::DummyConstVecPredReg
 
using PowerISA::VecPredRegContainer = ::DummyVecPredRegContainer
 

Enumerations

enum  PowerISA::MiscIntRegNums {
  PowerISA::INTREG_CR = NumIntArchRegs, PowerISA::INTREG_XER, PowerISA::INTREG_LR, PowerISA::INTREG_CTR,
  PowerISA::INTREG_FPSCR, PowerISA::INTREG_RSV, PowerISA::INTREG_RSV_LEN, PowerISA::INTREG_RSV_ADDR
}
 

Variables

const int PowerISA::MaxMiscDestRegs = PowerISAInst::MaxMiscDestRegs + 1
 
constexpr unsigned PowerISA::NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg
 
constexpr size_t PowerISA::VecRegSizeBytes = ::DummyVecRegSizeBytes
 
constexpr size_t PowerISA::VecPredRegSizeBits = ::DummyVecPredRegSizeBits
 
constexpr bool PowerISA::VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr
 
const int PowerISA::NumIntArchRegs = 32
 
const int PowerISA::NumIntSpecialRegs = 9
 
const int PowerISA::NumFloatArchRegs = 32
 
const int PowerISA::NumFloatSpecialRegs = 0
 
const int PowerISA::NumInternalProcRegs = 0
 
const int PowerISA::NumIntRegs = NumIntArchRegs + NumIntSpecialRegs
 
const int PowerISA::NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs
 
const int PowerISA::NumVecRegs = 1
 
const int PowerISA::NumVecPredRegs = 1
 
const int PowerISA::NumCCRegs = 0
 
const int PowerISA::NumMiscRegs = NUM_MISCREGS
 
const int PowerISA::ReturnValueReg = 3
 
const int PowerISA::ArgumentReg0 = 3
 
const int PowerISA::ArgumentReg1 = 4
 
const int PowerISA::ArgumentReg2 = 5
 
const int PowerISA::ArgumentReg3 = 6
 
const int PowerISA::ArgumentReg4 = 7
 
const int PowerISA::FramePointerReg = 31
 
const int PowerISA::StackPointerReg = 1
 
const int PowerISA::ZeroReg = NumIntRegs - 1
 
const int PowerISA::SyscallNumReg = 0
 
const int PowerISA::SyscallPseudoReturnReg = 3
 
const int PowerISA::SyscallSuccessReg = 3
 

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