gem5
v20.1.0.0
arch
riscv
idle_event.hh
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/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* this software without specific prior written permission.
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*/
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#ifndef __KERN_RISCV_IDLE_EVENT_HH__
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#define __KERN_RISCV_IDLE_EVENT_HH__
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#include "
cpu/pc_event.hh
"
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class
IdleStartEvent
:
public
PCEvent
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{
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public
:
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IdleStartEvent
(
PCEventScope
*
s
,
const
std::string &desc,
Addr
addr
)
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:
PCEvent
(
s
, desc,
addr
)
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{}
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virtual
void
process
(
ThreadContext
*tc);
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};
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#endif // __KERN_RISCV_IDLE_EVENT_HH__
IdleStartEvent
Definition:
idle_event.hh:34
IdleStartEvent::IdleStartEvent
IdleStartEvent(PCEventScope *s, const std::string &desc, Addr addr)
Definition:
idle_event.hh:37
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
IdleStartEvent::process
virtual void process(ThreadContext *tc)
Definition:
idle_event.cc:36
PCEventScope
Definition:
pc_event.hh:64
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
pc_event.hh
addr
ip6_addr_t addr
Definition:
inet.hh:423
PCEvent
Definition:
pc_event.hh:42
ArmISA::s
Bitfield< 4 > s
Definition:
miscregs_types.hh:556
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