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dev
serial
simple.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2018 ARM Limited
3
* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
8
* to a hardware implementation of the functionality of the software
9
* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
11
* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
14
* Redistribution and use in source and binary forms, with or without
15
* modification, are permitted provided that the following conditions are
16
* met: redistributions of source code must retain the above copyright
17
* notice, this list of conditions and the following disclaimer;
18
* redistributions in binary form must reproduce the above copyright
19
* notice, this list of conditions and the following disclaimer in the
20
* documentation and/or other materials provided with the distribution;
21
* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36
*/
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39
#ifndef __DEV_SERIAL_SIMPLE_HH__
40
#define __DEV_SERIAL_SIMPLE_HH__
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42
#include "
dev/serial/uart.hh
"
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struct
SimpleUartParams;
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46
class
SimpleUart
:
public
Uart
47
{
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public
:
49
SimpleUart
(
const
SimpleUartParams *
p
);
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public
:
// PioDevice
52
Tick
read
(
PacketPtr
pkt)
override
;
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Tick
write
(
PacketPtr
pkt)
override
;
54
55
public
:
// Uart
56
void
dataAvailable
()
override
{
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// We don't support interrupts, so ignore the data available
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// call.
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};
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protected
:
// Configuration
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const
ByteOrder
byteOrder
;
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64
const
bool
endOnEOT
;
65
};
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67
#endif // __DEV_SERIAL_SIMPLE_HH__
SimpleUart::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition:
simple.cc:51
SimpleUart::dataAvailable
void dataAvailable() override
Inform the uart that there is data available.
Definition:
simple.hh:56
Tick
uint64_t Tick
Tick count type.
Definition:
types.hh:63
SimpleUart::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition:
simple.cc:67
SimpleUart::endOnEOT
const bool endOnEOT
Definition:
simple.hh:64
Uart
Definition:
uart.hh:46
SimpleUart::byteOrder
const ByteOrder byteOrder
Definition:
simple.hh:59
uart.hh
SimpleUart::SimpleUart
SimpleUart(const SimpleUartParams *p)
Definition:
simple.cc:45
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition:
packet.hh:257
SimpleUart
Definition:
simple.hh:46
MipsISA::p
Bitfield< 0 > p
Definition:
pra_constants.hh:323
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