gem5  v20.1.0.0
tarmac_record_v8.hh
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37 
43 #ifndef __ARCH_ARM_TRACERS_TARMAC_RECORD_V8_HH__
44 #define __ARCH_ARM_TRACERS_TARMAC_RECORD_V8_HH__
45 
46 #include "tarmac_record.hh"
47 
48 namespace Trace {
49 
56 {
57  public:
58 
62  struct TraceEntryV8
63  {
64  public:
65  TraceEntryV8(std::string _cpuName)
66  : cpuName(_cpuName)
67  {}
68 
69  protected:
70  std::string cpuName;
71  };
72 
77  {
78  public:
79  TraceInstEntryV8(const TarmacContext& tarmCtx, bool predicate);
80 
81  virtual void print(std::ostream& outs,
82  int verbosity = 0,
83  const std::string &prefix = "") const override;
84 
85  protected:
87  bool paddrValid;
88  };
89 
94  {
95  public:
96  TraceRegEntryV8(const TarmacContext& tarmCtx, const RegId& reg);
97 
98  virtual void print(std::ostream& outs,
99  int verbosity = 0,
100  const std::string &prefix = "") const override;
101 
102  protected:
103  void updateInt(const TarmacContext& tarmCtx,
104  RegIndex regRelIdx) override;
105 
106  void updateMisc(const TarmacContext& tarmCtx,
107  RegIndex regRelIdx) override;
108 
109  void updateVec(const TarmacContext& tarmCtx,
110  RegIndex regRelIdx) override;
111 
112  void updatePred(const TarmacContext& tarmCtx,
113  RegIndex regRelIdx) override;
114 
122  std::string formatReg() const;
123 
125  uint16_t regWidth;
126  };
127 
131  struct TraceMemEntryV8: public TraceMemEntry, TraceEntryV8
132  {
133  public:
134  TraceMemEntryV8(const TarmacContext& tarmCtx,
135  uint8_t _size, Addr _addr, uint64_t _data);
136 
137  virtual void print(std::ostream& outs,
138  int verbosity = 0,
139  const std::string &prefix = "") const override;
140 
141  protected:
143  };
144 
145  public:
147  const StaticInstPtr _staticInst, ArmISA::PCState _pc,
148  TarmacTracer& _parent,
149  const StaticInstPtr _macroStaticInst = NULL)
150  : TarmacTracerRecord(_when, _thread, _staticInst, _pc,
151  _parent, _macroStaticInst)
152  {}
153 
154  protected:
156  void addInstEntry(std::vector<InstPtr>& queue, const TarmacContext& ptr);
157 
159  void addMemEntry(std::vector<MemPtr>& queue, const TarmacContext& ptr);
160 
162  void addRegEntry(std::vector<RegPtr>& queue, const TarmacContext& ptr);
163 };
164 
165 } // namespace Trace
166 
167 #endif // __ARCH_ARM_TRACERS_TARMAC_RECORD_V8_HH__
Trace::TarmacTracerRecordV8::TraceRegEntryV8::updatePred
void updatePred(const TarmacContext &tarmCtx, RegIndex regRelIdx) override
Definition: tarmac_record_v8.cc:154
Trace::TarmacTracerRecordV8::TraceInstEntryV8::print
virtual void print(std::ostream &outs, int verbosity=0, const std::string &prefix="") const override
Definition: tarmac_record_v8.cc:235
Trace::TarmacTracerRecordV8::addMemEntry
void addMemEntry(std::vector< MemPtr > &queue, const TarmacContext &ptr)
Generates an Entry for every memory access triggered.
Definition: tarmac_record_v8.cc:193
Trace::TarmacTracerRecordV8::addRegEntry
void addRegEntry(std::vector< RegPtr > &queue, const TarmacContext &ptr)
Generate a Record for every register being written.
Definition: tarmac_record_v8.cc:209
Trace::TarmacTracerRecordV8::TraceMemEntryV8::print
virtual void print(std::ostream &outs, int verbosity=0, const std::string &prefix="") const override
Definition: tarmac_record_v8.cc:265
Trace
Definition: nativetrace.cc:52
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
Trace::TarmacTracerRecordV8::TraceEntryV8::cpuName
std::string cpuName
Definition: tarmac_record_v8.hh:70
std::vector< InstPtr >
Trace::TarmacTracerRecordV8
TarmacTracer record for ARMv8 CPUs: The record is adding some data to the base TarmacTracer record.
Definition: tarmac_record_v8.hh:55
X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:87
Trace::TarmacTracerRecordV8::TraceEntryV8::TraceEntryV8
TraceEntryV8(std::string _cpuName)
Definition: tarmac_record_v8.hh:65
RegId
Register ID: describe an architectural register with its class and index.
Definition: reg_class.hh:75
Trace::TarmacTracerRecordV8::TraceRegEntryV8::TraceRegEntryV8
TraceRegEntryV8(const TarmacContext &tarmCtx, const RegId &reg)
Definition: tarmac_record_v8.cc:77
Trace::TarmacTracerRecordV8::TraceRegEntryV8::updateMisc
void updateMisc(const TarmacContext &tarmCtx, RegIndex regRelIdx) override
Register update functions.
Definition: tarmac_record_v8.cc:118
Trace::TarmacTracerRecordV8::TraceInstEntryV8::paddrValid
bool paddrValid
Definition: tarmac_record_v8.hh:87
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
Trace::TarmacContext
This object type is encapsulating the informations needed by a Tarmac record to generate it's own ent...
Definition: tarmac_tracer.hh:59
Trace::TarmacTracerRecordV8::TraceRegEntryV8::updateVec
void updateVec(const TarmacContext &tarmCtx, RegIndex regRelIdx) override
Definition: tarmac_record_v8.cc:129
Trace::TarmacTracerRecordV8::TraceRegEntryV8::updateInt
void updateInt(const TarmacContext &tarmCtx, RegIndex regRelIdx) override
Definition: tarmac_record_v8.cc:87
Trace::TarmacTracerRecordV8::TraceInstEntryV8::TraceInstEntryV8
TraceInstEntryV8(const TarmacContext &tarmCtx, bool predicate)
Definition: tarmac_record_v8.cc:48
Trace::TarmacTracerRecordV8::TraceMemEntryV8::paddr
Addr paddr
Definition: tarmac_record_v8.hh:142
Trace::TarmacTracerRecordV8::TraceRegEntryV8::print
virtual void print(std::ostream &outs, int verbosity=0, const std::string &prefix="") const override
Definition: tarmac_record_v8.cc:284
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
Trace::TarmacTracerRecordV8::TraceRegEntryV8::regWidth
uint16_t regWidth
Size in bits of arch register.
Definition: tarmac_record_v8.hh:125
Trace::TarmacTracerRecordV8::TraceInstEntryV8
Instruction entry for v8 records.
Definition: tarmac_record_v8.hh:76
Trace::TarmacTracerRecordV8::TraceEntryV8
General data shared by all v8 entries.
Definition: tarmac_record_v8.hh:62
tarmac_record.hh
Trace::TarmacTracerRecordV8::TraceMemEntryV8
Memory Entry for V8.
Definition: tarmac_record_v8.hh:131
Trace::TarmacTracerRecord
TarmacTracer Record: Record generated by the TarmacTracer for every executed instruction.
Definition: tarmac_record.hh:89
MipsISA::PCState
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
RegIndex
uint16_t RegIndex
Definition: types.hh:52
Trace::TarmacTracerRecordV8::TraceRegEntryV8::formatReg
std::string formatReg() const
Returning a string which contains the formatted register value: transformed in hex,...
Definition: tarmac_record_v8.cc:301
Trace::TarmacTracerRecord::TraceInstEntry
Instruction Entry.
Definition: tarmac_record.hh:93
Trace::TarmacTracerRecordV8::TarmacTracerRecordV8
TarmacTracerRecordV8(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, ArmISA::PCState _pc, TarmacTracer &_parent, const StaticInstPtr _macroStaticInst=NULL)
Definition: tarmac_record_v8.hh:146
Trace::TarmacTracerRecordV8::TraceInstEntryV8::paddr
Addr paddr
Definition: tarmac_record_v8.hh:86
Trace::TarmacTracerRecord::TraceRegEntry
Register Entry.
Definition: tarmac_record.hh:116
RefCountingPtr< StaticInst >
Trace::TarmacTracerRecordV8::addInstEntry
void addInstEntry(std::vector< InstPtr > &queue, const TarmacContext &ptr)
Generates an Entry for the executed instruction.
Definition: tarmac_record_v8.cc:182
Trace::TarmacTracerRecordV8::TraceMemEntryV8::TraceMemEntryV8
TraceMemEntryV8(const TarmacContext &tarmCtx, uint8_t _size, Addr _addr, uint64_t _data)
Definition: tarmac_record_v8.cc:63
Trace::TarmacTracerRecordV8::TraceRegEntryV8
Register entry for v8 records.
Definition: tarmac_record_v8.hh:93
Trace::TarmacTracer
Tarmac Tracer: this tracer generates a new Tarmac Record for every instruction being executed in gem5...
Definition: tarmac_tracer.hh:82
Trace::InstRecord::predicate
bool predicate
is the predicate for execution this inst true or false (not execed)?
Definition: insttracer.hh:144

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