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43 #ifndef __ARCH_ARM_TRACERS_TARMAC_RECORD_V8_HH__
44 #define __ARCH_ARM_TRACERS_TARMAC_RECORD_V8_HH__
81 virtual void print(std::ostream& outs,
83 const std::string &prefix =
"")
const override;
98 virtual void print(std::ostream& outs,
100 const std::string &prefix =
"")
const override;
135 uint8_t _size,
Addr _addr, uint64_t _data);
137 virtual void print(std::ostream& outs,
139 const std::string &prefix =
"")
const override;
151 _parent, _macroStaticInst)
167 #endif // __ARCH_ARM_TRACERS_TARMAC_RECORD_V8_HH__
void updatePred(const TarmacContext &tarmCtx, RegIndex regRelIdx) override
virtual void print(std::ostream &outs, int verbosity=0, const std::string &prefix="") const override
void addMemEntry(std::vector< MemPtr > &queue, const TarmacContext &ptr)
Generates an Entry for every memory access triggered.
void addRegEntry(std::vector< RegPtr > &queue, const TarmacContext &ptr)
Generate a Record for every register being written.
virtual void print(std::ostream &outs, int verbosity=0, const std::string &prefix="") const override
uint64_t Tick
Tick count type.
TarmacTracer record for ARMv8 CPUs: The record is adding some data to the base TarmacTracer record.
TraceEntryV8(std::string _cpuName)
Register ID: describe an architectural register with its class and index.
TraceRegEntryV8(const TarmacContext &tarmCtx, const RegId ®)
void updateMisc(const TarmacContext &tarmCtx, RegIndex regRelIdx) override
Register update functions.
ThreadContext is the external interface to all thread state for anything outside of the CPU.
This object type is encapsulating the informations needed by a Tarmac record to generate it's own ent...
void updateVec(const TarmacContext &tarmCtx, RegIndex regRelIdx) override
void updateInt(const TarmacContext &tarmCtx, RegIndex regRelIdx) override
TraceInstEntryV8(const TarmacContext &tarmCtx, bool predicate)
virtual void print(std::ostream &outs, int verbosity=0, const std::string &prefix="") const override
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
uint16_t regWidth
Size in bits of arch register.
Instruction entry for v8 records.
General data shared by all v8 entries.
TarmacTracer Record: Record generated by the TarmacTracer for every executed instruction.
GenericISA::DelaySlotPCState< MachInst > PCState
std::string formatReg() const
Returning a string which contains the formatted register value: transformed in hex,...
TarmacTracerRecordV8(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, ArmISA::PCState _pc, TarmacTracer &_parent, const StaticInstPtr _macroStaticInst=NULL)
void addInstEntry(std::vector< InstPtr > &queue, const TarmacContext &ptr)
Generates an Entry for the executed instruction.
TraceMemEntryV8(const TarmacContext &tarmCtx, uint8_t _size, Addr _addr, uint64_t _data)
Register entry for v8 records.
Tarmac Tracer: this tracer generates a new Tarmac Record for every instruction being executed in gem5...
bool predicate
is the predicate for execution this inst true or false (not execed)?
Generated on Wed Sep 30 2020 14:02:01 for gem5 by doxygen 1.8.17