Go to the documentation of this file.
29 #ifndef __CPU_KVM_X86_CPU_HH__
30 #define __CPU_KVM_X86_CPU_HH__
34 #include "params/X86KvmCPU.hh"
48 void dump()
const override;
101 void setMSRs(
const struct kvm_msrs &msrs);
103 void getMSRs(
struct kvm_msrs &msrs)
const;
125 void getXCRs(
struct kvm_xcrs ®s)
const;
126 void setXCRs(
const struct kvm_xcrs ®s);
127 void getXSave(
struct kvm_xsave &xsave)
const;
128 void setXSave(
const struct kvm_xsave &xsave);
211 const struct kvm_sregs &sregs);
x86 implementation of a KVM-based hardware virtualized CPU.
Tick handleKvmExitIO() override
Handle x86 legacy IO (in/out)
void getVCpuEvents(struct kvm_vcpu_events &events) const
void updateThreadContextFPU(const struct kvm_fpu &fpu)
Update FPU and SIMD registers using the legacy API.
const Kvm::MSRIndexVector & getMsrIntersection() const
Get a list of MSRs supported by both gem5 and KVM.
bool archIsDrained() const override
Check if there are pending events in the vCPU that prevents it from being drained.
void updateThreadContext() override
Update the current thread context with the KVM state.
void getXSave(struct kvm_xsave &xsave) const
bool haveXSave
Kvm::capXSave() available?
void dumpVCpuEvents() const
void updateThreadContextMSRs()
Update MSR registers.
uint64_t getMSR(uint32_t index) const
void updateThreadContextRegs(const struct kvm_regs ®s, const struct kvm_sregs &sregs)
Support routines to update the state of gem5's thread context from KVM's state representation.
uint64_t Tick
Tick count type.
void setCPUID(const struct kvm_cpuid2 &cpuid)
Methods to access CPUID information using the extended API.
std::vector< struct kvm_msr_entry > KvmMSRVector
void dump() const override
Dump the internal state to the terminal.
Tick kvmRunWrapper(Tick ticks)
Wrapper that synchronizes state in kvm_run.
void updateKvmStateMSRs()
Update MSR registers.
void setMSR(uint32_t index, uint64_t value)
Tick handleKvmExitIRQWindowOpen() override
The guest exited because an interrupt window was requested.
void setMSRs(const struct kvm_msrs &msrs)
Methods to access MSRs in the guest.
void deliverInterrupts()
Inject pending interrupts from gem5 into the virtual CPU.
bool haveDebugRegs
Kvm::capDebugRegs() available?
Base class for KVM based CPU models.
void dumpDebugRegs() const
Tick kvmRunDrain() override
Run the virtual CPU until draining completes.
uint64_t getHostCycles() const override
Get the value of the hardware cycle counter in the guest.
void getXCRs(struct kvm_xcrs ®s) const
Tick kvmRun(Tick ticks) override
Request KVM to run the guest for a given number of ticks.
X86KvmCPU(X86KvmCPUParams *params)
void handleIOMiscReg32(int miscreg)
Handle a 32-bit IO access that should be mapped to a MiscReg.
void setDebugRegisters(const struct kvm_debugregs ®s)
void updateKvmStateFPULegacy()
Update FPU and SIMD registers using the legacy API.
void updateCPUID()
Transfer gem5's CPUID values into the virtual CPU.
void getMSRs(struct kvm_msrs &msrs) const
const Params * params() const
bool useXSave
Should the XSave interface be used to sync the FPU and SIMD registers?
void updateThreadContextXSave(const struct kvm_xsave &kxsave)
Update FPU and SIMD registers using the XSave API.
void updateKvmStateFPU()
Update FPU and SIMD registers.
void setXSave(const struct kvm_xsave &xsave)
void setVCpuEvents(const struct kvm_vcpu_events &events)
void dumpSpecRegs() const
void getDebugRegisters(struct kvm_debugregs ®s) const
Wrappers around KVM's state transfer methods.
bool haveXCRs
Kvm::capXCRs() available?
void updateKvmStateSRegs()
Update control registers (CRx, segments, etc.)
void updateKvmStateRegs()
Support routines to update the state of the KVM CPU from gem5's state representation.
void updateKvmState() override
Update the KVM state from the current thread context.
void updateKvmStateFPUXSave()
Update FPU and SIMD registers using the XSave API.
void setXCRs(const struct kvm_xcrs ®s)
void updateThreadContextSRegs(const struct kvm_sregs &sregs)
Update control registers (CRx, segments, etc.)
Kvm::MSRIndexVector cachedMsrIntersection
Cached intersection of supported MSRs.
Generated on Wed Sep 30 2020 14:02:08 for gem5 by doxygen 1.8.17