gem5
v21.1.0.2
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#include <request.hh>
Public Types | |
enum | : FlagsType { ARCH_BITS = 0x000000FF, INST_FETCH = 0x00000100, PHYSICAL = 0x00000200, UNCACHEABLE = 0x00000400, STRICT_ORDER = 0x00000800, PRIVILEGED = 0x00008000, CACHE_BLOCK_ZERO = 0x00010000, NO_ACCESS = 0x00080000, LOCKED_RMW = 0x00100000, LLSC = 0x00200000, MEM_SWAP = 0x00400000, MEM_SWAP_COND = 0x00800000, PREFETCH = 0x01000000, PF_EXCLUSIVE = 0x02000000, EVICT_NEXT = 0x04000000, ACQUIRE = 0x00020000, RELEASE = 0x00040000, ATOMIC_RETURN_OP = 0x40000000, ATOMIC_NO_RETURN_OP = 0x80000000, KERNEL = 0x00001000, SECURE = 0x10000000, PT_WALK = 0x20000000, INVALIDATE = 0x0000000100000000, CLEAN = 0x0000000200000000, DST_POU = 0x0000001000000000, DST_POC = 0x0000002000000000, DST_BITS = 0x0000003000000000, HTM_START = 0x0000010000000000, HTM_COMMIT = 0x0000020000000000, HTM_CANCEL = 0x0000040000000000, HTM_ABORT = 0x0000080000000000, STICKY_FLAGS = INST_FETCH } |
enum | : CacheCoherenceFlagsType { I_CACHE_INV = 0x00000001, INV_L1 = I_CACHE_INV, V_CACHE_INV = 0x00000002, K_CACHE_INV = 0x00000004, GL1_CACHE_INV = 0x00000008, K_CACHE_WB = 0x00000010, FLUSH_L2 = 0x00000020, GL2_CACHE_INV = 0x00000040, SLC_BIT = 0x00000080, DLC_BIT = 0x00000100, GLC_BIT = 0x00000200, CACHED = 0x00000400, READ_WRITE = 0x00000800, SHARED = 0x00001000 } |
These bits are used to set the coherence policy for the GPU and are encoded in the GCN3 instructions. More... | |
typedef uint64_t | FlagsType |
typedef uint8_t | ArchFlagsType |
typedef gem5::Flags< FlagsType > | Flags |
typedef uint64_t | CacheCoherenceFlagsType |
typedef gem5::Flags< CacheCoherenceFlagsType > | CacheCoherenceFlags |
using | LocalAccessor = std::function< Cycles(ThreadContext *tc, Packet *pkt)> |
enum | : RequestorID { wbRequestorId = 0, funcRequestorId = 1, intRequestorId = 2, invldRequestorId = std::numeric_limits<RequestorID>::max() } |
Requestor Ids that are statically allocated. More... | |
Public Member Functions | |
Request () | |
Minimal constructor. More... | |
Request (Addr paddr, unsigned size, Flags flags, RequestorID id) | |
Constructor for physical (e.g. More... | |
Request (Addr vaddr, unsigned size, Flags flags, RequestorID id, Addr pc, ContextID cid, AtomicOpFunctorPtr atomic_op=nullptr) | |
Request (const Request &other) | |
~Request () | |
void | setContext (ContextID context_id) |
Set up Context numbers. More... | |
void | setStreamId (uint32_t sid) |
void | setSubstreamId (uint32_t ssid) |
void | setVirt (Addr vaddr, unsigned size, Flags flags, RequestorID id, Addr pc, AtomicOpFunctorPtr amo_op=nullptr) |
Set up a virtual (e.g., CPU) request in a previously allocated Request object. More... | |
void | setPaddr (Addr paddr) |
Set just the physical address. More... | |
void | splitOnVaddr (Addr split_addr, RequestPtr &req1, RequestPtr &req2) |
Generate two requests as if this request had been split into two pieces. More... | |
bool | hasPaddr () const |
Accessor for paddr. More... | |
Addr | getPaddr () const |
bool | hasInstCount () const |
Accessor for instruction count. More... | |
Counter | getInstCount () const |
void | setInstCount (Counter val) |
bool | hasSize () const |
Accessor for size. More... | |
unsigned | getSize () const |
const std::vector< bool > & | getByteEnable () const |
void | setByteEnable (const std::vector< bool > &be) |
bool | isMasked () const |
Returns true if the memory request is masked, which means there is at least one byteEnable element which is false (byte is masked) More... | |
Tick | time () const |
Accessor for time. More... | |
bool | isLocalAccess () |
Is this request for a local memory mapped resource/register? More... | |
void | setLocalAccessor (LocalAccessor acc) |
Set the function which will enact that access. More... | |
Cycles | localAccessor (ThreadContext *tc, Packet *pkt) |
Perform the installed local access. More... | |
bool | hasAtomicOpFunctor () |
Accessor for atomic-op functor. More... | |
AtomicOpFunctor * | getAtomicOpFunctor () |
bool | hasHtmAbortCause () const |
Accessor for hardware transactional memory abort cause. More... | |
HtmFailureFaultCause | getHtmAbortCause () const |
void | setHtmAbortCause (HtmFailureFaultCause val) |
Flags | getFlags () |
Accessor for flags. More... | |
void | setFlags (Flags flags) |
Note that unlike other accessors, this function sets specific flags (ORs them in); it does not assign its argument to the _flags field. More... | |
void | setCacheCoherenceFlags (CacheCoherenceFlags extraFlags) |
bool | hasVaddr () const |
Accessor function for vaddr. More... | |
Addr | getVaddr () const |
RequestorID | requestorId () const |
Accesssor for the requestor id. More... | |
uint32_t | taskId () const |
void | taskId (uint32_t id) |
ArchFlagsType | getArchFlags () const |
Accessor function for architecture-specific flags. More... | |
bool | extraDataValid () const |
Accessor function to check if sc result is valid. More... | |
uint64_t | getExtraData () const |
Accessor function for store conditional return value. More... | |
void | setExtraData (uint64_t extraData) |
Accessor function for store conditional return value. More... | |
bool | hasContextId () const |
ContextID | contextId () const |
Accessor function for context ID. More... | |
bool | hasStreamId () const |
uint32_t | streamId () const |
bool | hasSubstreamId () const |
uint32_t | substreamId () const |
void | setPC (Addr pc) |
bool | hasPC () const |
Addr | getPC () const |
Accessor function for pc. More... | |
void | incAccessDepth () const |
Increment/Get the depth at which this request is responded to. More... | |
int | getAccessDepth () const |
void | setTranslateLatency () |
Set/Get the time taken for this request to be successfully translated. More... | |
Tick | getTranslateLatency () const |
void | setAccessLatency () |
Set/Get the time taken to complete this request's access, not including the time to successfully translate the request. More... | |
Tick | getAccessLatency () const |
bool | hasInstSeqNum () const |
Accessor for the sequence number of instruction that creates the request. More... | |
InstSeqNum | getReqInstSeqNum () const |
void | setReqInstSeqNum (const InstSeqNum seq_num) |
bool | isUncacheable () const |
Accessor functions for flags. More... | |
bool | isStrictlyOrdered () const |
bool | isInstFetch () const |
bool | isPrefetch () const |
bool | isPrefetchEx () const |
bool | isLLSC () const |
bool | isPriv () const |
bool | isLockedRMW () const |
bool | isSwap () const |
bool | isCondSwap () const |
bool | isSecure () const |
bool | isPTWalk () const |
bool | isRelease () const |
bool | isKernel () const |
bool | isAtomicReturn () const |
bool | isAtomicNoReturn () const |
bool | isHTMStart () const |
bool | isHTMCommit () const |
bool | isHTMCancel () const |
bool | isHTMAbort () const |
bool | isHTMCmd () const |
bool | isAtomic () const |
bool | isToPOU () const |
Accessor functions for the destination of a memory request. More... | |
bool | isToPOC () const |
Flags | getDest () const |
bool | isAcquire () const |
bool | isInvL1 () const |
Accessor functions for the memory space configuration flags and used by GPU ISAs such as the Heterogeneous System Architecture (HSA). More... | |
bool | isGL2CacheFlush () const |
bool | isCacheClean () const |
Accessor functions to determine whether this request is part of a cache maintenance operation. More... | |
bool | isCacheInvalidate () const |
bool | isCacheMaintenance () const |
Public Attributes | |
Tick | translateDelta = 0 |
Time for the TLB/table walker to successfully translate this request. More... | |
Tick | accessDelta = 0 |
Access latency to complete this memory transaction not including translation time. More... | |
int | depth = 0 |
Level of the cache hierachy where this request was responded to (e.g. More... | |
Static Public Attributes | |
static const FlagsType | STORE_NO_DATA |
static const FlagsType | HTM_CMD |
Private Types | |
enum | : PrivateFlagsType { VALID_SIZE = 0x00000001, VALID_PADDR = 0x00000002, VALID_VADDR = 0x00000004, VALID_INST_SEQ_NUM = 0x00000008, VALID_PC = 0x00000010, VALID_CONTEXT_ID = 0x00000020, VALID_EXTRA_DATA = 0x00000080, VALID_STREAM_ID = 0x00000100, VALID_SUBSTREAM_ID = 0x00000200, VALID_HTM_ABORT_CAUSE = 0x00000400, VALID_INST_COUNT = 0x00000800, STICKY_PRIVATE_FLAGS = VALID_CONTEXT_ID } |
typedef uint16_t | PrivateFlagsType |
typedef gem5::Flags< PrivateFlagsType > | PrivateFlags |
Private Attributes | |
Addr | _paddr = 0 |
The physical address of the request. More... | |
unsigned | _size = 0 |
The size of the request. More... | |
std::vector< bool > | _byteEnable |
Byte-enable mask for writes. More... | |
RequestorID | _requestorId = invldRequestorId |
The requestor ID which is unique in the system for all ports that are capable of issuing a transaction. More... | |
Flags | _flags |
Flag structure for the request. More... | |
CacheCoherenceFlags | _cacheCoherenceFlags |
Flags that control how downstream cache system maintains coherence. More... | |
PrivateFlags | privateFlags |
Private flags for field validity checking. More... | |
Tick | _time = MaxTick |
The time this request was started. More... | |
uint32_t | _taskId = context_switch_task_id::Unknown |
The task id associated with this request. More... | |
uint32_t | _streamId = 0 |
The stream ID uniquely identifies a device behind the SMMU/IOMMU Each transaction arriving at the SMMU/IOMMU is associated with exactly one stream ID. More... | |
uint32_t | _substreamId = 0 |
The substream ID identifies an "execution context" within a device behind an SMMU/IOMMU. More... | |
Addr | _vaddr = MaxAddr |
The virtual address of the request. More... | |
uint64_t | _extraData = 0 |
Extra data for the request, such as the return value of store conditional or the compare value for a CAS. More... | |
ContextID | _contextId = InvalidContextID |
The context ID (for statistics, locks, and wakeups). More... | |
Addr | _pc = MaxAddr |
program counter of initiating access; for tracing/debugging More... | |
InstSeqNum | _reqInstSeqNum = 0 |
Sequence number of the instruction that creates the request. More... | |
AtomicOpFunctorPtr | atomicOpFunctor = nullptr |
A pointer to an atomic operation. More... | |
LocalAccessor | _localAccessor |
Counter | _instCount = 0 |
The instruction count at the time this request is created. More... | |
HtmFailureFaultCause | _htmAbortCause = HtmFailureFaultCause::INVALID |
The cause for HTM transaction abort. More... | |
Definition at line 97 of file request.hh.
typedef uint8_t gem5::Request::ArchFlagsType |
Definition at line 101 of file request.hh.
Definition at line 272 of file request.hh.
typedef uint64_t gem5::Request::CacheCoherenceFlagsType |
Definition at line 271 of file request.hh.
typedef gem5::Flags<FlagsType> gem5::Request::Flags |
Definition at line 102 of file request.hh.
typedef uint64_t gem5::Request::FlagsType |
Definition at line 100 of file request.hh.
using gem5::Request::LocalAccessor = std::function<Cycles(ThreadContext *tc, Packet *pkt)> |
Definition at line 324 of file request.hh.
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Definition at line 328 of file request.hh.
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Definition at line 327 of file request.hh.
anonymous enum : FlagsType |
Enumerator | |
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ARCH_BITS | Architecture specific flags. These bits int the flag field are reserved for architecture-specific code. For example, SPARC uses them to represent ASIs. |
INST_FETCH | The request was an instruction fetch. |
PHYSICAL | The virtual address is also the physical address. |
UNCACHEABLE | The request is to an uncacheable address.
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STRICT_ORDER | The request is required to be strictly ordered by CPU models and is non-speculative. A strictly ordered request is guaranteed to never be re-ordered or executed speculatively by a CPU model. The memory system may still reorder requests in caches unless the UNCACHEABLE flag is set as well. |
PRIVILEGED | This request is made in privileged mode. |
CACHE_BLOCK_ZERO | This is a write that is targeted and zeroing an entire cache block. There is no need for a read/modify/write |
NO_ACCESS | The request should not cause a memory access. |
LOCKED_RMW | This request will lock or unlock the accessed memory. When used with a load, the access locks the particular chunk of memory. When used with a store, it unlocks. The rule is that locked accesses have to be made up of a locked load, some operation on the data, and then a locked store. |
LLSC | The request is a Load locked/store conditional. |
MEM_SWAP | This request is for a memory swap. |
MEM_SWAP_COND | |
PREFETCH | The request is a prefetch. |
PF_EXCLUSIVE | The request should be prefetched into the exclusive state. |
EVICT_NEXT | The request should be marked as LRU. |
ACQUIRE | The request should be marked with ACQUIRE. |
RELEASE | The request should be marked with RELEASE. |
ATOMIC_RETURN_OP | The request is an atomic that returns data. |
ATOMIC_NO_RETURN_OP | The request is an atomic that does not return data. |
KERNEL | The request should be marked with KERNEL. Used to indicate the synchronization associated with a GPU kernel launch or completion. |
SECURE | The request targets the secure memory space. |
PT_WALK | The request is a page table walk. |
INVALIDATE | The request invalidates a memory location. |
CLEAN | The request cleans a memory location. |
DST_POU | The request targets the point of unification. |
DST_POC | The request targets the point of coherence. |
DST_BITS | Bits to define the destination of a request. |
HTM_START | hardware transactional memory The request starts a HTM transaction |
HTM_COMMIT | The request commits a HTM transaction. |
HTM_CANCEL | The request cancels a HTM transaction. |
HTM_ABORT | The request aborts a HTM transaction. |
STICKY_FLAGS | These flags are not cleared when a Request object is reused (assigned a new address). |
Definition at line 104 of file request.hh.
anonymous enum : RequestorID |
Requestor Ids that are statically allocated.
Definition at line 252 of file request.hh.
anonymous enum : CacheCoherenceFlagsType |
These bits are used to set the coherence policy for the GPU and are encoded in the GCN3 instructions.
The GCN3 ISA defines two cache levels See the AMD GCN3 ISA Architecture Manual for more details.
INV_L1: L1 cache invalidation FLUSH_L2: L2 cache flush
Invalidation means to simply discard all cache contents. This can be done in the L1 since it is implemented as a write-through cache and there are other copies elsewhere in the hierarchy.
For flush the contents of the cache need to be written back to memory when dirty and can be discarded otherwise. This operation is more involved than invalidation and therefore we do not flush caches with redundant copies of data.
SLC: System Level Coherent. Accesses are forced to miss in the L2 cache and are coherent with system memory.
GLC: Globally Coherent. Controls how reads and writes are handled by the L1 cache. Global here referes to the data being visible globally on the GPU (i.e., visible to all WGs).
For atomics, the GLC bit is used to distinguish between between atomic return/no-return operations. These flags are used by GPUDynInst.
Enumerator | |
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I_CACHE_INV | mem_sync_op flags |
INV_L1 | |
V_CACHE_INV | |
K_CACHE_INV | |
GL1_CACHE_INV | |
K_CACHE_WB | |
FLUSH_L2 | |
GL2_CACHE_INV | |
SLC_BIT | user-policy flags |
DLC_BIT | |
GLC_BIT | |
CACHED | mtype flags |
READ_WRITE | |
SHARED |
Definition at line 301 of file request.hh.
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Enumerator | |
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VALID_SIZE | Whether or not the size is valid. |
VALID_PADDR | Whether or not paddr is valid (has been written yet). |
VALID_VADDR | Whether or not the vaddr is valid. |
VALID_INST_SEQ_NUM | Whether or not the instruction sequence number is valid. |
VALID_PC | Whether or not the pc is valid. |
VALID_CONTEXT_ID | Whether or not the context ID is valid. |
VALID_EXTRA_DATA | Whether or not the sc result is valid. |
VALID_STREAM_ID | Whether or not the stream ID and substream ID is valid. |
VALID_SUBSTREAM_ID | |
VALID_HTM_ABORT_CAUSE | Whether or not the abort cause is valid. |
VALID_INST_COUNT | Whether or not the instruction count is valid. |
STICKY_PRIVATE_FLAGS | These flags are not cleared when a Request object is reused (assigned a new address). |
Definition at line 330 of file request.hh.
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Minimal constructor.
No fields are initialized. (Note that _flags and privateFlags are cleared by Flags default constructor.)
Definition at line 455 of file request.hh.
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Constructor for physical (e.g.
device) requests. Initializes just physical address, size, flags, and timestamp (to curTick()). These fields are adequate to perform a request.
Definition at line 462 of file request.hh.
References _byteEnable, _flags, privateFlags, gem5::Flags< T >::set(), VALID_PADDR, and VALID_SIZE.
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Definition at line 470 of file request.hh.
References _byteEnable, gem5::MipsISA::pc, setContext(), setVirt(), and gem5::MipsISA::vaddr.
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Definition at line 479 of file request.hh.
References atomicOpFunctor.
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Definition at line 498 of file request.hh.
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Accessor function for context ID.
Definition at line 840 of file request.hh.
References _contextId, and hasContextId().
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Accessor function to check if sc result is valid.
Definition at line 811 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_EXTRA_DATA.
Referenced by getExtraData().
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Definition at line 898 of file request.hh.
References depth.
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Definition at line 911 of file request.hh.
References accessDelta.
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Accessor function for architecture-specific flags.
Definition at line 803 of file request.hh.
References _flags, ARCH_BITS, hasPaddr(), and hasVaddr().
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Definition at line 712 of file request.hh.
References atomicOpFunctor.
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Definition at line 657 of file request.hh.
References _byteEnable.
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Definition at line 984 of file request.hh.
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Accessor function for store conditional return value.
Definition at line 818 of file request.hh.
References _extraData, and extraDataValid().
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Accessor for flags.
Definition at line 744 of file request.hh.
References _flags, hasPaddr(), and hasVaddr().
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Definition at line 728 of file request.hh.
References _htmAbortCause, and hasHtmAbortCause().
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Definition at line 611 of file request.hh.
References _instCount, and hasInstCount().
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Definition at line 596 of file request.hh.
References _paddr, and hasPaddr().
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Definition at line 924 of file request.hh.
References _reqInstSeqNum, and hasInstSeqNum().
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Definition at line 650 of file request.hh.
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Definition at line 904 of file request.hh.
References translateDelta.
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Definition at line 777 of file request.hh.
References _vaddr, gem5::Flags< T >::isSet(), privateFlags, and VALID_VADDR.
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Accessor for atomic-op functor.
Definition at line 706 of file request.hh.
References atomicOpFunctor.
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Definition at line 833 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_CONTEXT_ID.
Referenced by contextId().
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Accessor for hardware transactional memory abort cause.
Definition at line 722 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_HTM_ABORT_CAUSE.
Referenced by getHtmAbortCause().
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Accessor for instruction count.
Definition at line 606 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_INST_COUNT.
Referenced by getInstCount().
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Accessor for the sequence number of instruction that creates the request.
Definition at line 918 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_INST_SEQ_NUM.
Referenced by getReqInstSeqNum().
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Accessor for paddr.
Definition at line 590 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_PADDR.
Referenced by getArchFlags(), getFlags(), getPaddr(), setCacheCoherenceFlags(), setFlags(), splitOnVaddr(), and time().
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Definition at line 880 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_PC.
Referenced by getPC().
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Accessor for size.
Definition at line 644 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_SIZE.
Referenced by getSize().
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Definition at line 847 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_STREAM_ID.
Referenced by setSubstreamId(), and streamId().
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Definition at line 860 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_SUBSTREAM_ID.
Referenced by substreamId().
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Accessor function for vaddr.
Definition at line 771 of file request.hh.
References gem5::Flags< T >::isSet(), privateFlags, and VALID_VADDR.
Referenced by getArchFlags(), getFlags(), setCacheCoherenceFlags(), setFlags(), splitOnVaddr(), and time().
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Increment/Get the depth at which this request is responded to.
This currently happens when the request misses in any cache level.
Definition at line 897 of file request.hh.
References depth.
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Definition at line 986 of file request.hh.
References _cacheCoherenceFlags, ACQUIRE, and gem5::Flags< T >::isSet().
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Definition at line 969 of file request.hh.
References _flags, ATOMIC_NO_RETURN_OP, ATOMIC_RETURN_OP, and gem5::Flags< T >::isSet().
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Definition at line 955 of file request.hh.
References _flags, ATOMIC_NO_RETURN_OP, and gem5::Flags< T >::isSet().
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Definition at line 954 of file request.hh.
References _flags, ATOMIC_RETURN_OP, and gem5::Flags< T >::isSet().
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Accessor functions to determine whether this request is part of a cache maintenance operation.
At the moment three operations are supported:
1) A cache clean operation updates all copies of a memory location to the point of reference, 2) A cache invalidate operation invalidates all copies of the specified block in the memory above the point of reference, 3) A clean and invalidate operation is a combination of the two operations.
Definition at line 1013 of file request.hh.
References _flags, CLEAN, and gem5::Flags< T >::isSet().
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Definition at line 1014 of file request.hh.
References _flags, INVALIDATE, and gem5::Flags< T >::isSet().
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Definition at line 1015 of file request.hh.
References _flags, CLEAN, INVALIDATE, and gem5::Flags< T >::isSet().
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Definition at line 949 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and MEM_SWAP_COND.
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Definition at line 996 of file request.hh.
References _cacheCoherenceFlags, FLUSH_L2, and gem5::Flags< T >::isSet().
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Definition at line 960 of file request.hh.
References _flags, HTM_ABORT, and gem5::Flags< T >::isSet().
Referenced by isHTMCmd(), and setHtmAbortCause().
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Definition at line 959 of file request.hh.
References _flags, HTM_CANCEL, and gem5::Flags< T >::isSet().
Referenced by isHTMCmd().
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Definition at line 962 of file request.hh.
References isHTMAbort(), isHTMCancel(), isHTMCommit(), and isHTMStart().
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Definition at line 958 of file request.hh.
References _flags, HTM_COMMIT, and gem5::Flags< T >::isSet().
Referenced by isHTMCmd().
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Definition at line 957 of file request.hh.
References _flags, HTM_START, and gem5::Flags< T >::isSet().
Referenced by isHTMCmd().
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Definition at line 941 of file request.hh.
References _flags, INST_FETCH, and gem5::Flags< T >::isSet().
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Accessor functions for the memory space configuration flags and used by GPU ISAs such as the Heterogeneous System Architecture (HSA).
Note that setting extraFlags should be done via setCacheCoherenceFlags().
Definition at line 993 of file request.hh.
References _cacheCoherenceFlags, INV_L1, and gem5::Flags< T >::isSet().
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Definition at line 953 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and KERNEL.
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Definition at line 945 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and LLSC.
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Is this request for a local memory mapped resource/register?
Definition at line 692 of file request.hh.
References _localAccessor.
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Definition at line 947 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and LOCKED_RMW.
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Returns true if the memory request is masked, which means there is at least one byteEnable element which is false (byte is masked)
Definition at line 675 of file request.hh.
References _byteEnable.
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Definition at line 942 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), PF_EXCLUSIVE, and PREFETCH.
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Definition at line 944 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and PF_EXCLUSIVE.
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Definition at line 946 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and PRIVILEGED.
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Definition at line 951 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and PT_WALK.
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Definition at line 952 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and RELEASE.
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Definition at line 950 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and SECURE.
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Definition at line 940 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and STRICT_ORDER.
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Definition at line 948 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), MEM_SWAP, and MEM_SWAP_COND.
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Definition at line 983 of file request.hh.
References _flags, DST_POC, and gem5::Flags< T >::isSet().
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Accessor functions for the destination of a memory request.
The destination flag can specify a point of reference for the operation (e.g. a cache block clean to the the point of unification). At the moment the destination is only used by the cache maintenance operations.
Definition at line 982 of file request.hh.
References _flags, DST_POU, and gem5::Flags< T >::isSet().
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Accessor functions for flags.
Note that these are for testing only; setting flags should be done via setFlags().
Definition at line 939 of file request.hh.
References _flags, gem5::Flags< T >::isSet(), and UNCACHEABLE.
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Perform the installed local access.
Definition at line 697 of file request.hh.
References _localAccessor.
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Set/Get the time taken to complete this request's access, not including the time to successfully translate the request.
Definition at line 910 of file request.hh.
References _time, accessDelta, gem5::curTick(), and translateDelta.
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Definition at line 663 of file request.hh.
References _byteEnable, _size, and gem5::MipsISA::be.
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Definition at line 762 of file request.hh.
References _cacheCoherenceFlags, hasPaddr(), hasVaddr(), and gem5::Flags< T >::set().
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Set up Context numbers.
Definition at line 504 of file request.hh.
References _contextId, privateFlags, gem5::Flags< T >::set(), and VALID_CONTEXT_ID.
Referenced by Request().
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Accessor function for store conditional return value.
Definition at line 826 of file request.hh.
References _extraData, privateFlags, gem5::Flags< T >::set(), and VALID_EXTRA_DATA.
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Note that unlike other accessors, this function sets specific flags (ORs them in); it does not assign its argument to the _flags field.
Thus this method should rightly be called setFlags() and not just flags().
Definition at line 755 of file request.hh.
References _flags, hasPaddr(), hasVaddr(), and gem5::Flags< T >::set().
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Definition at line 735 of file request.hh.
References _htmAbortCause, isHTMAbort(), privateFlags, gem5::Flags< T >::set(), gem5::X86ISA::val, and VALID_HTM_ABORT_CAUSE.
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Definition at line 617 of file request.hh.
References _instCount, privateFlags, gem5::Flags< T >::set(), gem5::X86ISA::val, and VALID_INST_COUNT.
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Set the function which will enact that access.
Definition at line 694 of file request.hh.
References _localAccessor.
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Set just the physical address.
This usually used to record the result of a translation.
Definition at line 555 of file request.hh.
References _paddr, privateFlags, gem5::Flags< T >::set(), and VALID_PADDR.
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Definition at line 873 of file request.hh.
References _pc, gem5::MipsISA::pc, privateFlags, gem5::Flags< T >::set(), and VALID_PC.
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Definition at line 931 of file request.hh.
References _reqInstSeqNum, privateFlags, gem5::Flags< T >::set(), and VALID_INST_SEQ_NUM.
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Definition at line 511 of file request.hh.
References _streamId, privateFlags, gem5::Flags< T >::set(), and VALID_STREAM_ID.
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Definition at line 518 of file request.hh.
References _substreamId, hasStreamId(), privateFlags, gem5::Flags< T >::set(), and VALID_SUBSTREAM_ID.
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Set/Get the time taken for this request to be successfully translated.
Definition at line 903 of file request.hh.
References _time, gem5::curTick(), and translateDelta.
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Set up a virtual (e.g., CPU) request in a previously allocated Request object.
Definition at line 530 of file request.hh.
References _flags, _localAccessor, _pc, _requestorId, _size, _time, _vaddr, accessDelta, atomicOpFunctor, gem5::Flags< T >::clear(), gem5::curTick(), depth, gem5::ArmISA::id, gem5::MipsISA::pc, privateFlags, gem5::Flags< T >::set(), STICKY_FLAGS, STICKY_PRIVATE_FLAGS, translateDelta, gem5::MipsISA::vaddr, VALID_PC, VALID_SIZE, and VALID_VADDR.
Referenced by Request().
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Generate two requests as if this request had been split into two pieces.
The original request can't have been translated already.
Definition at line 568 of file request.hh.
References _byteEnable, _size, _vaddr, hasPaddr(), and hasVaddr().
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Definition at line 853 of file request.hh.
References _streamId, and hasStreamId().
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Definition at line 866 of file request.hh.
References _substreamId, and hasSubstreamId().
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Definition at line 791 of file request.hh.
References _taskId.
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Definition at line 797 of file request.hh.
References _taskId, and gem5::ArmISA::id.
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Accessor for time.
Definition at line 685 of file request.hh.
References _time, hasPaddr(), and hasVaddr().
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Byte-enable mask for writes.
Definition at line 377 of file request.hh.
Referenced by getByteEnable(), isMasked(), Request(), setByteEnable(), and splitOnVaddr().
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Flags that control how downstream cache system maintains coherence.
Definition at line 388 of file request.hh.
Referenced by isAcquire(), isGL2CacheFlush(), isInvL1(), and setCacheCoherenceFlags().
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The context ID (for statistics, locks, and wakeups).
Definition at line 429 of file request.hh.
Referenced by contextId(), and setContext().
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Extra data for the request, such as the return value of store conditional or the compare value for a CAS.
Definition at line 426 of file request.hh.
Referenced by getExtraData(), and setExtraData().
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Flag structure for the request.
Definition at line 385 of file request.hh.
Referenced by getArchFlags(), getDest(), getFlags(), isAtomic(), isAtomicNoReturn(), isAtomicReturn(), isCacheClean(), isCacheInvalidate(), isCacheMaintenance(), isCondSwap(), isHTMAbort(), isHTMCancel(), isHTMCommit(), isHTMStart(), isInstFetch(), isKernel(), isLLSC(), isLockedRMW(), isPrefetch(), isPrefetchEx(), isPriv(), isPTWalk(), isRelease(), isSecure(), isStrictlyOrdered(), isSwap(), isToPOC(), isToPOU(), isUncacheable(), Request(), setFlags(), and setVirt().
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The cause for HTM transaction abort.
Definition at line 446 of file request.hh.
Referenced by getHtmAbortCause(), and setHtmAbortCause().
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The instruction count at the time this request is created.
Definition at line 443 of file request.hh.
Referenced by getInstCount(), and setInstCount().
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Definition at line 440 of file request.hh.
Referenced by isLocalAccess(), localAccessor(), setLocalAccessor(), and setVirt().
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The physical address of the request.
Valid only if validPaddr is set.
Definition at line 367 of file request.hh.
Referenced by getPaddr(), and setPaddr().
program counter of initiating access; for tracing/debugging
Definition at line 432 of file request.hh.
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Sequence number of the instruction that creates the request.
Definition at line 435 of file request.hh.
Referenced by getReqInstSeqNum(), and setReqInstSeqNum().
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The requestor ID which is unique in the system for all ports that are capable of issuing a transaction.
Definition at line 382 of file request.hh.
Referenced by requestorId(), and setVirt().
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The size of the request.
This field must be set when vaddr or paddr is written via setVirt() or a phys basec constructor, so it is always valid as long as one of the address fields is valid.
Definition at line 374 of file request.hh.
Referenced by getSize(), setByteEnable(), setVirt(), and splitOnVaddr().
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The stream ID uniquely identifies a device behind the SMMU/IOMMU Each transaction arriving at the SMMU/IOMMU is associated with exactly one stream ID.
Definition at line 410 of file request.hh.
Referenced by setStreamId(), and streamId().
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The substream ID identifies an "execution context" within a device behind an SMMU/IOMMU.
It's intended to map 1-to-1 to PCIe PASID (Process Address Space ID). The presence of a substream ID is optional.
Definition at line 418 of file request.hh.
Referenced by setSubstreamId(), and substreamId().
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The task id associated with this request.
Definition at line 403 of file request.hh.
Referenced by taskId().
The time this request was started.
Used to calculate latencies. This field is set to curTick() any time paddr or vaddr is written.
Definition at line 398 of file request.hh.
Referenced by setAccessLatency(), setTranslateLatency(), setVirt(), and time().
The virtual address of the request.
Definition at line 421 of file request.hh.
Referenced by getVaddr(), setVirt(), and splitOnVaddr().
Tick gem5::Request::accessDelta = 0 |
Access latency to complete this memory transaction not including translation time.
Definition at line 632 of file request.hh.
Referenced by getAccessLatency(), setAccessLatency(), and setVirt().
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A pointer to an atomic operation.
Definition at line 438 of file request.hh.
Referenced by getAtomicOpFunctor(), hasAtomicOpFunctor(), Request(), and setVirt().
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Level of the cache hierachy where this request was responded to (e.g.
0 = L1; 1 = L2).
Definition at line 638 of file request.hh.
Referenced by getAccessDepth(), incAccessDepth(), and setVirt().
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Definition at line 247 of file request.hh.
Referenced by gem5::o3::LSQ::pushRequest().
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Private flags for field validity checking.
Definition at line 391 of file request.hh.
Referenced by extraDataValid(), getVaddr(), hasContextId(), hasHtmAbortCause(), hasInstCount(), hasInstSeqNum(), hasPaddr(), hasPC(), hasSize(), hasStreamId(), hasSubstreamId(), hasVaddr(), Request(), setContext(), setExtraData(), setHtmAbortCause(), setInstCount(), setPaddr(), setPC(), setReqInstSeqNum(), setStreamId(), setSubstreamId(), and setVirt().
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Definition at line 244 of file request.hh.
Referenced by gem5::minor::LSQ::pushRequest(), gem5::o3::LSQUnit::write(), gem5::AtomicSimpleCPU::writeMem(), gem5::TimingSimpleCPU::writeMem(), and gem5::CheckerCPU::writeMem().
Tick gem5::Request::translateDelta = 0 |
Time for the TLB/table walker to successfully translate this request.
Definition at line 626 of file request.hh.
Referenced by getTranslateLatency(), setAccessLatency(), setTranslateLatency(), and setVirt().