#include <system.hh>

Inheritance diagram for gem5::System:

Classes
class	SystemPort
	Private class for the system port which is only used as a requestor for debug access and for non-structural entities that do not have a port of their own. More...

class	Threads

Public Member Functions
RequestPort &	getSystemPort ()
	Get a reference to the system port that can be used by non-structural simulation objects like processes or threads, or external entities like loaders and debuggers, etc, to access the memory system. More...

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Additional function to return the Port of a memory object. More...

unsigned int	cacheLineSize () const
	Get the cache line size of the system. More...

bool	schedule (PCEvent *event) override

bool	remove (PCEvent *event) override

KvmVM *	getKvmVM ()
	Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present. More...

bool	validKvmEnvironment () const
	Verify gem5 configuration will support KVM emulation. More...

memory::PhysicalMemory &	getPhysMem ()
	Get a pointer to access the physical memory of the system. More...

Addr	freeMemSize (int poolID=0) const
	Amount of physical memory that is still free. More...

Addr	memSize (int poolID=0) const
	Amount of physical memory that exists. More...

bool	isMemAddr (Addr addr) const
	Check if a physical address is within a range of a memory that is part of the global address map. More...

void	addDeviceMemory (RequestorID requestorId, memory::AbstractMemory *deviceMemory)
	Add a physical memory range for a device. More...

bool	isDeviceMemAddr (const PacketPtr &pkt) const
	Similar to isMemAddr but for devices. More...

memory::AbstractMemory *	getDeviceMemory (const PacketPtr &pkt) const
	Return a pointer to the device memory. More...

AddrRangeList	getShadowRomRanges () const

Arch	getArch () const
	Get the architecture. More...

ByteOrder	getGuestByteOrder () const
	Get the guest byte order. More...

Addr	getPageBytes () const
	Get the page bytes for the ISA. More...

Addr	getPageShift () const
	Get the number of bits worth of in-page address for the ISA. More...

ThermalModel *	getThermalModel () const
	The thermal model used for this system (if any). More...

RequestorID	getRequestorId (const SimObject *requestor, std::string subrequestor={})
	Request an id used to create a request object in the system. More...

RequestorID	getGlobalRequestorId (const std::string &requestor_name)
	Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since no SimObject is passed, the requestor gets registered by providing the full requestor name. More...

std::string	getRequestorName (RequestorID requestor_id)
	Get the name of an object for a given request id. More...

RequestorID	lookupRequestorId (const SimObject *obj) const
	Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if not found. More...

RequestorID	lookupRequestorId (const std::string &name) const
	Looks up the RequestorID for a given object name string returns an invalid RequestorID (invldRequestorId) if not found. More...

RequestorID	maxRequestors ()
	Get the number of requestors registered in the system. More...

void	regStats () override
	Callback to set stat parameters. More...

uint64_t	incWorkItemsBegin ()
	Called by pseudo_inst to track the number of work items started by this system. More...

uint64_t	incWorkItemsEnd ()
	Called by pseudo_inst to track the number of work items completed by this system. More...

int	markWorkItem (int index)
	Called by pseudo_inst to mark the cpus actively executing work items. More...

void	workItemBegin (uint32_t tid, uint32_t workid)

void	workItemEnd (uint32_t tid, uint32_t workid)

bool	trapToGdb (int signal, ContextID ctx_id) const

	PARAMS (System)

	System (const Params &p)

	~System ()

const AddrRange &	m5opRange () const
	Range used by memory-mapped m5 pseudo-ops if enabled. More...

Addr	allocPhysPages (int npages, int poolID=0)
	Allocate npages contiguous unused physical pages. More...

void	registerThreadContext (ThreadContext *tc, ContextID assigned=InvalidContextID)

void	replaceThreadContext (ThreadContext *tc, ContextID context_id)

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...


bool	isAtomicMode () const
	Is the system in atomic mode? More...

bool	isTimingMode () const
	Is the system in timing mode? More...

bool	bypassCaches () const
	Should caches be bypassed? More...


enums::MemoryMode	getMemoryMode () const
	Get the memory mode of the system. More...

void	setMemoryMode (enums::MemoryMode mode)
	Change the memory mode of the system. More...

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected. More...

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	regProbePoints ()
	Register probe points for this object. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

virtual void	startup ()
	startup() is the final initialization call before simulation. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue. More...

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

virtual void	notifyFork ()
	Notify a child process of a fork. More...

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group. More...

virtual	~Group ()

virtual void	resetStats ()
	Callback to reset stats. More...

virtual void	preDumpStats ()
	Callback before stats are dumped. More...

void	addStat (statistics::Info *info)
	Register a stat with this group. More...

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object. More...

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object. More...

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block. More...

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group. More...

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block. More...

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Static Public Member Functions
static void	printSystems ()

Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it. More...

Public Attributes
Threads	threads

const bool	multiThread

std::vector< MemPool >	memPools
	Memory allocation objects for all physical memories in the system. More...

uint64_t	init_param

PortProxy	physProxy
	Port to physical memory used for writing object files into ram at boot. More...

Workload *	workload = nullptr
	OS kernel. More...

std::map< std::pair< uint32_t, uint32_t >, Tick >	lastWorkItemStarted

std::map< uint32_t, statistics::Histogram * >	workItemStats

FutexMap	futexMap

std::set< int >	PIDs
	Process set to track which PIDs have already been allocated. More...

std::list< BasicSignal >	signalList

std::vector< RedirectPath * >	redirectPaths

Static Public Attributes
static std::vector< System * >	systemList

static int	numSystemsRunning = 0

static const int	maxPID = 32768

Protected Member Functions
std::string	stripSystemName (const std::string &requestor_name) const
	Strips off the system name from a requestor name. More...

RequestorID	_getRequestorId (const SimObject *requestor, const std::string &requestor_name)
	helper function for getRequestorId More...

std::string	leafRequestorName (const SimObject *requestor, const std::string &subrequestor)
	Helper function for constructing the full (sub)requestor name by providing the root requestor and the relative subrequestor name. More...

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain. More...

void	signalDrainDone () const
	Signal that an object is drained. More...

Protected Attributes
KvmVM *const	kvmVM = nullptr

memory::PhysicalMemory	physmem

AddrRangeList	ShadowRomRanges

enums::MemoryMode	memoryMode

const unsigned int	_cacheLineSize

uint64_t	workItemsBegin = 0

uint64_t	workItemsEnd = 0

uint32_t	numWorkIds

std::vector< RequestorInfo >	requestors
	This array is a per-system list of all devices capable of issuing a memory system request and an associated string for each requestor id. More...

ThermalModel *	thermalModel

const AddrRange	_m5opRange
	Range for memory-mapped m5 pseudo ops. More...

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Private Attributes
std::list< PCEvent * >	liveEvents

SystemPort	_systemPort

std::unordered_map< RequestorID, std::vector< memory::AbstractMemory * > >	deviceMemMap

Additional Inherited Members
Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Detailed Description

Definition at line 77 of file system.hh.

Constructor & Destructor Documentation

◆ System()

gem5::System::System ( const Params & p )

◆ ~System()

gem5::System::~System ( )

Definition at line 269 of file system.cc.

References gem5::ArmISA::j, numWorkIds, and workItemStats.

Member Function Documentation

◆ _getRequestorId()

RequestorID gem5::System::_getRequestorId	(	const SimObject *	requestor,
		const std::string &	requestor_name
	)

protected

helper function for getRequestorId

Definition at line 593 of file system.cc.

References gem5::statistics::enabled(), fatal, gem5::ArmISA::i, gem5::Named::name(), requestors, and stripSystemName().

Referenced by getGlobalRequestorId(), and getRequestorId().

◆ addDeviceMemory()

void gem5::System::addDeviceMemory	(	RequestorID	requestorId,
		memory::AbstractMemory *	deviceMemory
	)

Add a physical memory range for a device.

The ranges added here will be considered a non-PIO memory address if the requestorId of the packet and range match something in the device memory map.

Definition at line 382 of file system.cc.

References deviceMemMap.

◆ allocPhysPages()

Addr gem5::System::allocPhysPages	(	int	npages,
		int	poolID = `0`
	)

Allocate npages contiguous unused physical pages.

Returns: Starting address of first page

Definition at line 355 of file system.cc.

References gem5::FullSystem, and memPools.

Referenced by gem5::Process::allocateMem(), gem5::X86ISA::X86_64Process::initState(), and gem5::Process::replicatePage().

◆ bypassCaches()

bool gem5::System::bypassCaches ( ) const

inline

Should caches be bypassed?

Some CPUs need to bypass caches to allow direct memory accesses, which is required for hardware virtualization.

Definition at line 285 of file system.hh.

References memoryMode.

Referenced by gem5::HDLcd::cmdDisable(), gem5::HDLcd::cmdEnable(), gem5::HDLcd::drainResume(), gem5::CoherentXBar::forwardAtomic(), gem5::CoherentXBar::forwardFunctional(), gem5::CoherentXBar::forwardTiming(), gem5::HDLcd::pxlVSyncEnd(), gem5::ruby::RubyPort::MemResponsePort::recvAtomic(), gem5::ruby::RubyPort::PioResponsePort::recvAtomic(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvFunctional(), gem5::CoherentXBar::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), gem5::DmaReadFifo::resumeFill(), gem5::DmaPort::sendDma(), gem5::NonCachingSimpleCPU::verifyMemoryMode(), and gem5::BaseKvmCPU::verifyMemoryMode().

◆ cacheLineSize()

unsigned int gem5::System::cacheLineSize ( ) const

inline

Get the cache line size of the system.

Definition at line 314 of file system.hh.

References _cacheLineSize.

Referenced by gem5::DmaDevice::cacheBlockSize(), gem5::BaseTrafficGen::createDram(), gem5::BaseTrafficGen::createDramRot(), gem5::BaseTrafficGen::createHybrid(), gem5::BaseTrafficGen::createLinear(), gem5::BaseTrafficGen::createNvm(), gem5::BaseTrafficGen::createRandom(), gem5::BaseTrafficGen::createStrided(), gem5::memory::AbstractMemory::initState(), gem5::MemFootprintProbe::MemFootprintProbe(), gem5::ArmISA::ISA::readMiscReg(), and gem5::SparcISA::TLB::translateFunctional().

◆ freeMemSize()

Addr gem5::System::freeMemSize ( int poolID = 0 ) const

Amount of physical memory that is still free.

Definition at line 369 of file system.cc.

References gem5::FullSystem, and memPools.

Referenced by gem5::Linux::procMeminfo().

◆ getArch()

Arch gem5::System::getArch ( ) const

inline

Get the architecture.

Definition at line 395 of file system.hh.

Referenced by gem5::ruby::Sequencer::makeRequest().

◆ getDeviceMemory()

memory::AbstractMemory * gem5::System::getDeviceMemory ( const PacketPtr & pkt ) const

Return a pointer to the device memory.

Definition at line 399 of file system.cc.

References deviceMemMap, gem5::Packet::getAddrRange(), gem5::AddrRange::isSubset(), mem, panic_if, and gem5::Packet::requestorId().

Referenced by gem5::ruby::RubyPort::MemResponsePort::hitCallback(), and isDeviceMemAddr().

◆ getGlobalRequestorId()

RequestorID gem5::System::getGlobalRequestorId ( const std::string & requestor_name )

Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since no SimObject is passed, the requestor gets registered by providing the full requestor name.

Parameters

requestorName full name of the requestor

Returns: the requestor's ID.

Definition at line 580 of file system.cc.

References _getRequestorId().

◆ getGuestByteOrder()

ByteOrder gem5::System::getGuestByteOrder ( ) const

inline

Get the guest byte order.

Definition at line 401 of file system.hh.

References gem5::SimObject::params().

Referenced by gem5::_llseekFunc(), and gem5::getcpuFunc().

◆ getKvmVM()

KvmVM* gem5::System::getKvmVM ( )

inline

Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present.

Definition at line 342 of file system.hh.

References kvmVM.

Referenced by gem5::MuxingKvmGic::MuxingKvmGic().

◆ getMemoryMode()

enums::MemoryMode gem5::System::getMemoryMode ( ) const

inline

Get the memory mode of the system.

\warn This should only be used by the Python world. The C++ world should use one of the query functions above (isAtomicMode(), isTimingMode(), bypassCaches()).

Definition at line 299 of file system.hh.

References memoryMode.

Referenced by gem5::MinorCPU::init().

◆ getPageBytes()

Addr gem5::System::getPageBytes ( ) const

inline

Get the page bytes for the ISA.

Definition at line 409 of file system.hh.

References gem5::ArmISA::PageBytes.

◆ getPageShift()

Addr gem5::System::getPageShift ( ) const

inline

Get the number of bits worth of in-page address for the ISA.

Definition at line 414 of file system.hh.

References gem5::ArmISA::PageShift.

Referenced by gem5::MemPool::allocate(), gem5::MemPool::allocatedBytes(), gem5::MemPool::freeBytes(), gem5::MemPool::freePageAddr(), and gem5::MemPool::totalBytes().

◆ getPhysMem()

memory::PhysicalMemory& gem5::System::getPhysMem ( )

inline

Get a pointer to access the physical memory of the system.

Definition at line 348 of file system.hh.

References physmem.

Referenced by gem5::KvmVM::delayedStartup(), gem5::ArmSemihosting::gatherHeapInfo(), and gem5::ArmISA::FsLinux::initState().

◆ getPort()

Port & gem5::System::getPort	(	const std::string &	if_name,
		PortID	idx = `InvalidPortID`
	)

overridevirtual

Additional function to return the Port of a memory object.

Reimplemented from gem5::SimObject.

Definition at line 276 of file system.cc.

References _systemPort.

◆ getRequestorId()

RequestorID gem5::System::getRequestorId	(	const SimObject *	requestor,
		std::string	subrequestor = `{}`
	)

Request an id used to create a request object in the system.

All objects that intend to issues requests into the memory system must request an id in the init() phase of startup. All requestor ids must be fixed by the regStats() phase that immediately precedes it. This allows objects in the memory system to understand how many requestors may exist and appropriately name the bins of their per-requestor stats before the stats are finalized.

Registers a RequestorID: This method takes two parameters, one of which is optional. The first one is the requestor object, and it is compulsory; in case a object has multiple (sub)requestors, a second parameter must be provided and it contains the name of the subrequestor. The method will create a requestor's name by concatenating the SimObject name with the eventual subrequestor string, separated by a dot.

As an example: For a cpu having two requestors: a data requestor and an instruction requestor, the method must be called twice:

instRequestorId = getRequestorId(cpu, "inst"); dataRequestorId = getRequestorId(cpu, "data");

and the requestors' names will be:

"cpu.inst"
"cpu.data"

Parameters

requestor	SimObject related to the requestor
subrequestor	String containing the subrequestor's name

Returns: the requestor's ID.

Definition at line 586 of file system.cc.

References _getRequestorId(), and leafRequestorName().

Referenced by gem5::CheckerCPU::init(), and System().

◆ getRequestorName()

std::string gem5::System::getRequestorName ( RequestorID requestor_id )

Get the name of an object for a given request id.

Definition at line 637 of file system.cc.

References fatal, and requestors.

Referenced by gem5::memory::qos::MemCtrl::addRequestor(), gem5::memory::qos::MemSinkCtrl::processNextReqEvent(), gem5::memory::qos::MemCtrl::qosSchedule(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), gem5::BaseTags::BaseTagStats::regStats(), gem5::memory::qos::MemCtrl::MemCtrlStats::regStats(), gem5::memory::AbstractMemory::MemStats::regStats(), gem5::BaseCache::CacheStats::regStats(), gem5::BaseCache::CacheCmdStats::regStatsFromParent(), gem5::memory::qos::FixedPriorityPolicy::schedule(), and gem5::MemTraceProbe::startup().

◆ getShadowRomRanges()

AddrRangeList gem5::System::getShadowRomRanges ( ) const

inline

Definition at line 390 of file system.hh.

References ShadowRomRanges.

Referenced by gem5::ruby::RubyPort::MemResponsePort::isShadowRomAddress().

◆ getSystemPort()

RequestPort& gem5::System::getSystemPort ( )

inline

Get a reference to the system port that can be used by non-structural simulation objects like processes or threads, or external entities like loaders and debuggers, etc, to access the memory system.

Returns: a reference to the system port we own

Definition at line 245 of file system.hh.

References _systemPort.

◆ getThermalModel()

ThermalModel* gem5::System::getThermalModel ( ) const

inline

The thermal model used for this system (if any).

Definition at line 419 of file system.hh.

References thermalModel.

Referenced by gem5::RealViewTemperatureSensor::read().

◆ incWorkItemsBegin()

uint64_t gem5::System::incWorkItemsBegin ( )

inline

Called by pseudo_inst to track the number of work items started by this system.

Definition at line 540 of file system.hh.

References workItemsBegin.

Referenced by gem5::pseudo_inst::workbegin().

◆ incWorkItemsEnd()

uint64_t gem5::System::incWorkItemsEnd ( )

inline

Called by pseudo_inst to track the number of work items completed by this system.

Definition at line 550 of file system.hh.

References workItemsEnd.

Referenced by gem5::pseudo_inst::workend().

◆ isAtomicMode()

bool gem5::System::isAtomicMode ( ) const

inline

Is the system in atomic mode?

There are currently two different atomic memory modes: 'atomic', which supports caches; and 'atomic_noncaching', which bypasses caches. The latter is used by hardware virtualized CPUs. SimObjects are expected to use Port::sendAtomic() and Port::recvAtomic() when accessing memory in this mode.

Definition at line 264 of file system.hh.

References gem5::ArmISA::atomic, and memoryMode.

Referenced by gem5::SMMUTranslationProcess::completeTransaction(), gem5::SMMUv3::processCommands(), gem5::SMMUv3::runProcess(), gem5::Gicv3Its::runProcess(), gem5::DmaPort::sendDma(), gem5::NonCachingSimpleCPU::verifyMemoryMode(), and gem5::AtomicSimpleCPU::verifyMemoryMode().

◆ isDeviceMemAddr()

bool gem5::System::isDeviceMemAddr ( const PacketPtr & pkt ) const

Similar to isMemAddr but for devices.

Checks if a physical address of the packet match an address range of a device corresponding to the RequestorId of the request.

Definition at line 389 of file system.cc.

References deviceMemMap, getDeviceMemory(), and gem5::Packet::requestorId().

Referenced by gem5::ruby::RubyPort::MemResponsePort::hitCallback(), gem5::ruby::RubyPort::MemResponsePort::isPhysMemAddress(), gem5::ruby::RubyPort::ruby_hit_callback(), and gem5::ruby::HTMSequencer::rubyHtmCallback().

◆ isMemAddr()

bool gem5::System::isMemAddr ( Addr addr ) const

Check if a physical address is within a range of a memory that is part of the global address map.

Parameters

addr	A physical address

Returns: Whether the address corresponds to a memory

Definition at line 376 of file system.cc.

References gem5::X86ISA::addr, gem5::memory::PhysicalMemory::isMemAddr(), and physmem.

Referenced by gem5::o3::Fetch::finishTranslation(), gem5::MemFootprintProbe::handleRequest(), gem5::ruby::RubyPort::MemResponsePort::hitCallback(), gem5::KernelWorkload::initState(), gem5::ruby::RubyPort::MemResponsePort::isPhysMemAddress(), gem5::ruby::RubyPort::ruby_hit_callback(), gem5::ruby::HTMSequencer::rubyHtmCallback(), and gem5::BaseTrafficGen::update().

◆ isTimingMode()

bool gem5::System::isTimingMode ( ) const

inline

Is the system in timing mode?

SimObjects are expected to use Port::sendTiming() and Port::recvTiming() when accessing memory in this mode.

Definition at line 276 of file system.hh.

References memoryMode.

Referenced by gem5::SMMUTranslationProcess::completeTransaction(), gem5::SMMUProcess::doDelay(), gem5::MinorCPU::drainResume(), gem5::memory::MemCtrl::drainResume(), gem5::TrafficGen::initState(), gem5::SMMUTranslationProcess::issuePrefetch(), gem5::SMMUv3::processCommands(), gem5::SMMUTranslationProcess::resumeTransaction(), gem5::SMMUv3::runProcess(), gem5::Gicv3Its::runProcess(), gem5::DmaPort::sendDma(), gem5::X86ISA::Walker::start(), gem5::RiscvISA::Walker::start(), gem5::memory::MemCtrl::startup(), gem5::o3::CPU::verifyMemoryMode(), and gem5::TimingSimpleCPU::verifyMemoryMode().

◆ leafRequestorName()

std::string gem5::System::leafRequestorName	(	const SimObject *	requestor,
		const std::string &	subrequestor
	)

protected

Helper function for constructing the full (sub)requestor name by providing the root requestor and the relative subrequestor name.

Definition at line 624 of file system.cc.

References gem5::Named::name().

Referenced by getRequestorId().

◆ lookupRequestorId() [1/2]

RequestorID gem5::System::lookupRequestorId ( const SimObject * obj ) const

Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if not found.

Definition at line 543 of file system.cc.

References fatal_if, gem5::ArmISA::i, gem5::ArmISA::id, gem5::Request::invldRequestorId, and requestors.

Referenced by gem5::memory::qos::PropFairPolicy::initRequestor(), and gem5::memory::qos::Policy::pair().

◆ lookupRequestorId() [2/2]

RequestorID gem5::System::lookupRequestorId ( const std::string & name ) const

Looks up the RequestorID for a given object name string returns an invalid RequestorID (invldRequestorId) if not found.

Definition at line 566 of file system.cc.

References gem5::ArmISA::i, gem5::Request::invldRequestorId, gem5::Named::name(), requestors, and stripSystemName().

◆ m5opRange()

const AddrRange& gem5::System::m5opRange ( ) const

inline

Range used by memory-mapped m5 pseudo-ops if enabled.

Returns an invalid/empty range if disabled.

Definition at line 596 of file system.hh.

References _m5opRange.

Referenced by gem5::MemPool::allocate().

◆ markWorkItem()

int gem5::System::markWorkItem ( int index )

inline

Called by pseudo_inst to mark the cpus actively executing work items.

Returns the total number of cpus that have executed work item begin or ends.

Definition at line 561 of file system.hh.

References gem5::MipsISA::index, gem5::System::Threads::markActive(), gem5::System::Threads::numActive(), and threads.

Referenced by gem5::pseudo_inst::workbegin(), and gem5::pseudo_inst::workend().

◆ maxRequestors()

RequestorID gem5::System::maxRequestors ( )

inline

Get the number of requestors registered in the system.

Definition at line 518 of file system.hh.

References requestors.

Referenced by gem5::BaseCache::getNextQueueEntry(), gem5::BaseCache::handleTimingReqMiss(), gem5::BaseCache::incHitCount(), gem5::BaseCache::incMissCount(), gem5::BaseCache::recvTimingResp(), gem5::BaseTags::BaseTagStats::regStats(), gem5::memory::qos::MemCtrl::MemCtrlStats::regStats(), gem5::memory::AbstractMemory::MemStats::regStats(), gem5::BaseCache::CacheStats::regStats(), gem5::BaseCache::CacheCmdStats::regStatsFromParent(), gem5::NoncoherentCache::serviceMSHRTargets(), gem5::Cache::serviceMSHRTargets(), and gem5::MemTraceProbe::startup().

◆ memSize()

Addr gem5::System::memSize ( int poolID = 0 ) const

Amount of physical memory that exists.

Definition at line 362 of file system.cc.

References gem5::FullSystem, and memPools.

Referenced by gem5::Linux::procMeminfo().

◆ PARAMS()

gem5::System::PARAMS ( System )

◆ printSystems()

void gem5::System::printSystems ( )

static

Definition at line 511 of file system.cc.

References gem5::ArmISA::i, gem5::Named::name(), and systemList.

Referenced by gem5::printSystems().

◆ registerThreadContext()

void gem5::System::registerThreadContext	(	ThreadContext *	tc,
		ContextID	assigned = `InvalidContextID`
	)

Definition at line 290 of file system.cc.

References gem5::ArmISA::e, gem5::System::Threads::insert(), liveEvents, gem5::Workload::registerThreadContext(), gem5::PCEventScope::schedule(), threads, and workload.

Referenced by gem5::BaseCPU::registerThreadContexts().

◆ regStats()

void gem5::System::regStats ( )

overridevirtual

Callback to set stat parameters.

This callback is typically used for complex stats (e.g., distributions) that need parameters in addition to a name and a description. Stat names and descriptions should typically be set from the constructor usingo from the constructor using the ADD_STAT macro.

Reimplemented from gem5::statistics::Group.

Definition at line 472 of file system.cc.

References gem5::ccprintf(), gem5::ArmISA::j, numWorkIds, gem5::statistics::Group::regStats(), and workItemStats.