gem5
v21.1.0.2
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ThreadContext is the external interface to all thread state for anything outside of the CPU. More...
#include <thread_context.hh>
Public Types | |
enum | Status { Active, Suspended, Halting, Halted } |
Public Member Functions | |
bool | getUseForClone () |
void | setUseForClone (bool new_val) |
virtual | ~ThreadContext () |
virtual BaseCPU * | getCpuPtr ()=0 |
virtual int | cpuId () const =0 |
virtual uint32_t | socketId () const =0 |
virtual int | threadId () const =0 |
virtual void | setThreadId (int id)=0 |
virtual ContextID | contextId () const =0 |
virtual void | setContextId (ContextID id)=0 |
virtual BaseMMU * | getMMUPtr ()=0 |
virtual CheckerCPU * | getCheckerCpuPtr ()=0 |
virtual BaseISA * | getIsaPtr ()=0 |
virtual TheISA::Decoder * | getDecoderPtr ()=0 |
virtual System * | getSystemPtr ()=0 |
virtual PortProxy & | getVirtProxy ()=0 |
virtual void | sendFunctional (PacketPtr pkt) |
virtual void | initMemProxies (ThreadContext *tc)=0 |
Initialise the physical and virtual port proxies and tie them to the data port of the CPU. More... | |
virtual Process * | getProcessPtr ()=0 |
virtual void | setProcessPtr (Process *p)=0 |
virtual Status | status () const =0 |
virtual void | setStatus (Status new_status)=0 |
virtual void | activate ()=0 |
Set the status to Active. More... | |
virtual void | suspend ()=0 |
Set the status to Suspended. More... | |
virtual void | halt ()=0 |
Set the status to Halted. More... | |
void | quiesce () |
Quiesce thread context. More... | |
void | quiesceTick (Tick resume) |
Quiesce, suspend, and schedule activate at resume. More... | |
virtual void | takeOverFrom (ThreadContext *old_context)=0 |
virtual void | regStats (const std::string &name) |
virtual void | scheduleInstCountEvent (Event *event, Tick count)=0 |
virtual void | descheduleInstCountEvent (Event *event)=0 |
virtual Tick | getCurrentInstCount ()=0 |
virtual Tick | readLastActivate ()=0 |
virtual Tick | readLastSuspend ()=0 |
virtual void | copyArchRegs (ThreadContext *tc)=0 |
virtual void | clearArchRegs ()=0 |
virtual RegVal | readIntReg (RegIndex reg_idx) const =0 |
virtual RegVal | readFloatReg (RegIndex reg_idx) const =0 |
virtual const TheISA::VecRegContainer & | readVecReg (const RegId ®) const =0 |
virtual TheISA::VecRegContainer & | getWritableVecReg (const RegId ®)=0 |
virtual const TheISA::VecElem & | readVecElem (const RegId ®) const =0 |
virtual const TheISA::VecPredRegContainer & | readVecPredReg (const RegId ®) const =0 |
virtual TheISA::VecPredRegContainer & | getWritableVecPredReg (const RegId ®)=0 |
virtual RegVal | readCCReg (RegIndex reg_idx) const =0 |
virtual void | setIntReg (RegIndex reg_idx, RegVal val)=0 |
virtual void | setFloatReg (RegIndex reg_idx, RegVal val)=0 |
virtual void | setVecReg (const RegId ®, const TheISA::VecRegContainer &val)=0 |
virtual void | setVecElem (const RegId ®, const TheISA::VecElem &val)=0 |
virtual void | setVecPredReg (const RegId ®, const TheISA::VecPredRegContainer &val)=0 |
virtual void | setCCReg (RegIndex reg_idx, RegVal val)=0 |
virtual TheISA::PCState | pcState () const =0 |
virtual void | pcState (const TheISA::PCState &val)=0 |
void | setNPC (Addr val) |
virtual void | pcStateNoRecord (const TheISA::PCState &val)=0 |
virtual Addr | instAddr () const =0 |
virtual Addr | nextInstAddr () const =0 |
virtual MicroPC | microPC () const =0 |
virtual RegVal | readMiscRegNoEffect (RegIndex misc_reg) const =0 |
virtual RegVal | readMiscReg (RegIndex misc_reg)=0 |
virtual void | setMiscRegNoEffect (RegIndex misc_reg, RegVal val)=0 |
virtual void | setMiscReg (RegIndex misc_reg, RegVal val)=0 |
virtual RegId | flattenRegId (const RegId ®_id) const =0 |
virtual unsigned | readStCondFailures () const =0 |
virtual void | setStCondFailures (unsigned sc_failures)=0 |
virtual int | exit () |
virtual void | htmAbortTransaction (uint64_t htm_uid, HtmFailureFaultCause cause)=0 |
virtual BaseHTMCheckpointPtr & | getHtmCheckpointPtr ()=0 |
virtual void | setHtmCheckpointPtr (BaseHTMCheckpointPtr cpt)=0 |
virtual RegVal | readIntRegFlat (RegIndex idx) const =0 |
Flat register interfaces. More... | |
virtual void | setIntRegFlat (RegIndex idx, RegVal val)=0 |
virtual RegVal | readFloatRegFlat (RegIndex idx) const =0 |
virtual void | setFloatRegFlat (RegIndex idx, RegVal val)=0 |
virtual const TheISA::VecRegContainer & | readVecRegFlat (RegIndex idx) const =0 |
virtual TheISA::VecRegContainer & | getWritableVecRegFlat (RegIndex idx)=0 |
virtual void | setVecRegFlat (RegIndex idx, const TheISA::VecRegContainer &val)=0 |
virtual const TheISA::VecElem & | readVecElemFlat (RegIndex idx, const ElemIndex &elem_idx) const =0 |
virtual void | setVecElemFlat (RegIndex idx, const ElemIndex &elem_idx, const TheISA::VecElem &val)=0 |
virtual const TheISA::VecPredRegContainer & | readVecPredRegFlat (RegIndex idx) const =0 |
virtual TheISA::VecPredRegContainer & | getWritableVecPredRegFlat (RegIndex idx)=0 |
virtual void | setVecPredRegFlat (RegIndex idx, const TheISA::VecPredRegContainer &val)=0 |
virtual RegVal | readCCRegFlat (RegIndex idx) const =0 |
virtual void | setCCRegFlat (RegIndex idx, RegVal val)=0 |
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virtual bool | remove (PCEvent *event)=0 |
virtual bool | schedule (PCEvent *event)=0 |
Static Public Member Functions | |
static void | compare (ThreadContext *one, ThreadContext *two) |
function to compare two thread contexts (for debugging) More... | |
Public Attributes | |
int | intResult = DefaultIntResult |
double | floatResult = DefaultFloatResult |
int | intOffset = 0 |
Static Public Attributes | |
static const int | ints [] |
static const double | floats [] |
static const int | DefaultIntResult = 0 |
static const double | DefaultFloatResult = 0.0 |
Protected Attributes | |
bool | useForClone = false |
ThreadContext is the external interface to all thread state for anything outside of the CPU.
It provides all accessor methods to state that might be needed by external objects, ranging from register values to things such as kernel stats. It is an abstract base class; the CPU can create its own ThreadContext by deriving from it.
The ThreadContext is slightly different than the ExecContext. The ThreadContext provides access to an individual thread's state; an ExecContext provides ISA access to the CPU (meaning it is implicitly multithreaded on SMT systems). Additionally the ThreadState is an abstract class that exactly defines the interface; the ExecContext is a more implicit interface that must be implemented so that the ISA can access whatever state it needs.
Definition at line 93 of file thread_context.hh.
Definition at line 104 of file thread_context.hh.
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Reimplemented in gem5::Iris::ThreadContext.
Definition at line 124 of file thread_context.hh.
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Set the status to Active.
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::cloneFunc(), gem5::execveFunc(), gem5::exitImpl(), gem5::Process::initState(), gem5::System::Threads::Thread::resume(), gem5::GPUComputeDriver::signalWakeupEvent(), gem5::FVPBasePwrCtrl::startCoreUp(), gem5::pseudo_inst::wakeCPU(), and gem5::FutexMap::wakeup_bitset().
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pure virtual |
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::cloneFunc(), gem5::execveFunc(), and gem5::ArmISA::Reset::invoke().
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function to compare two thread contexts (for debugging)
Definition at line 59 of file thread_context.cc.
References gem5::CCRegClass, contextId(), cpuId(), DPRINTF, gem5::FloatRegClass, gem5::ArmISA::i, gem5::IntRegClass, gem5::MiscRegClass, gem5::ps2::one, panic, pcState(), readCCReg(), readFloatReg(), readIntReg(), readMiscRegNoEffect(), readVecPredReg(), readVecReg(), gem5::ArmISA::t1, gem5::ArmISA::t2, gem5::VecPredRegClass, and gem5::VecRegClass.
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::ArmISA::ISA::addressTranslation(), gem5::ArmISA::ISA::addressTranslation64(), gem5::BaseRemoteGDB::addThreadContext(), gem5::FVPBasePwrCtrl::clearStandByWfi(), gem5::FVPBasePwrCtrl::clearWakeRequest(), gem5::Process::clone(), gem5::cloneFunc(), gem5::BaseRemoteGDB::cmdSetThread(), compare(), gem5::SimpleThread::copyState(), gem5::BaseKvmCPU::doMMIOAccess(), gem5::execveFunc(), gem5::X86ISA::TLB::finalizePhysical(), gem5::CheckerCPU::genMemFragmentRequest(), gem5::ArmPPIGen::get(), gem5::FVPBasePwrCtrl::getCorePwrStatus(), gem5::getcpuFunc(), gem5::ArmISA::ISA::getGenericTimer(), gem5::X86KvmCPU::handleKvmExitIO(), gem5::BaseRemoteGDB::incomingData(), gem5::PowerISA::UnimplementedOpcodeFault::invoke(), gem5::PowerISA::AlignmentFault::invoke(), gem5::PowerISA::TrapFault::invoke(), gem5::GenericPageTableFault::invoke(), gem5::GenericAlignmentFault::invoke(), gem5::FVPBasePwrCtrl::powerCoreOff(), gem5::FVPBasePwrCtrl::powerCoreOn(), gem5::HardBreakpoint::process(), gem5::BaseRemoteGDB::queryC(), quiesce(), quiesceTick(), gem5::SparcISA::ISA::readFSReg(), gem5::X86ISA::ISA::readMiscReg(), gem5::RiscvISA::ISA::readMiscReg(), gem5::Workload::registerThreadContext(), gem5::BaseCPU::registerThreadContexts(), gem5::Workload::replaceThreadContext(), gem5::FVPBasePwrCtrl::setStandByWfi(), gem5::ArmISA::PMU::setThreadContext(), gem5::ArmISA::ISA::setupThreadContext(), gem5::FVPBasePwrCtrl::setWakeRequest(), gem5::BaseRemoteGDB::singleStep(), gem5::FVPBasePwrCtrl::startCoreUp(), gem5::takeOverFrom(), gem5::BaseCPU::takeOverFrom(), gem5::ArmInterruptPin::targetContext(), gem5::X86ISA::GpuTLB::translate(), gem5::TranslatingPortProxy::tryMemsetBlob(), gem5::TranslatingPortProxy::tryReadBlob(), gem5::TranslatingPortProxy::tryWriteBlob(), and gem5::ArmISA::TLB::updateMiscReg().
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Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::takeOverFrom().
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::cloneFunc(), compare(), gem5::ArmISA::getAff0(), gem5::ArmISA::getAff1(), gem5::ArmISA::getMPIDR(), gem5::GPUComputeDriver::ioctl(), gem5::ArmISA::DumpStats::process(), gem5::X86ISA::Interrupts::setThreadContext(), gem5::GPUComputeDriver::signalWakeupEvent(), gem5::GPUComputeDriver::sleepCPU(), and gem5::Trace::InstPBTrace::traceInst().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::BaseRemoteGDB::descheduleInstCommitEvent().
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Definition at line 275 of file thread_context.hh.
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::minor::flattenRegIndex(), gem5::o3::Rename::renameDestRegs(), and gem5::o3::Rename::renameSrcRegs().
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::BaseCPU::flushTLBs(), gem5::ArmISA::TLBIALL::operator()(), gem5::ArmISA::TLBIALLEL::operator()(), gem5::ArmISA::TLBIVMALL::operator()(), gem5::ArmISA::TLBIASID::operator()(), gem5::ArmISA::TLBIALLN::operator()(), gem5::ArmISA::TLBIMVAA::operator()(), gem5::ArmISA::TLBIMVA::operator()(), gem5::ArmISA::TLBIIPA::operator()(), gem5::ArmISA::SkipFunc::returnFromFuncIn(), gem5::ArmISA::ISA::setMiscReg(), and gem5::BaseCPU::takeOverFrom().
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::SparcISA::ISA::checkSoftInt(), gem5::Linux::devRandom(), gem5::SparcISA::TLB::doMmuRegRead(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::BaseStackTrace::dump(), gem5::pseudo_inst::dumpresetstats(), gem5::pseudo_inst::dumpstats(), gem5::ArmISA::TableWalker::fetchDescriptor(), gem5::ArmISA::TableWalker::Stage2Walk::finish(), gem5::pseudo_inst::initParam(), gem5::RiscvISA::RiscvFault::invoke(), gem5::ArmISA::Reset::invoke(), gem5::ArmISA::AbortFault< DataAbort >::invoke(), gem5::ArmISA::SystemError::invoke(), gem5::ArmISA::ArmSev::invoke(), gem5::pseudo_inst::loadsymbol(), gem5::pseudo_inst::m5checkpoint(), gem5::Linux::openSpecialFile(), gem5::FVPBasePwrCtrl::powerCoreOff(), gem5::FVPBasePwrCtrl::powerCoreOn(), gem5::ArmISA::DumpStats::process(), gem5::SparcISA::ISA::processHSTickCompare(), gem5::SparcISA::ISA::processSTickCompare(), gem5::pseudo_inst::quiesceCycles(), gem5::pseudo_inst::quiesceSkip(), gem5::X86ISA::ISA::readMiscReg(), gem5::RiscvISA::ISA::readMiscReg(), gem5::SparcISA::ISA::readMiscReg(), gem5::ArmISA::ISA::readMiscReg(), gem5::MipsISA::readRegOtherThread(), gem5::System::Threads::replace(), gem5::pseudo_inst::resetstats(), gem5::System::Threads::Thread::resume(), gem5::ArmISA::sendEvent(), sendFunctional(), gem5::SparcISA::ISA::setFSReg(), gem5::X86ISA::ISA::setMiscReg(), gem5::RiscvISA::ISA::setMiscReg(), gem5::MipsISA::ISA::setMiscReg(), gem5::SparcISA::ISA::setMiscReg(), gem5::MipsISA::setRegOtherThread(), gem5::Trace::TarmacContext::tarmacCpuName(), gem5::pseudo_inst::workbegin(), and gem5::pseudo_inst::workend().
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::BaseRemoteGDB::scheduleInstCommitEvent().
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::minor::Fetch2::evaluate(), gem5::GenericHtmFailureFault::invoke(), gem5::SparcISA::ISA::setMiscReg(), gem5::ArmISA::ISA::setMiscReg(), gem5::X86ISA::ISA::setThreadContext(), gem5::SimpleThread::takeOverFrom(), gem5::o3::ThreadContext::takeOverFrom(), and gem5::X86ISA::ISA::updateHandyM5Reg().
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Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::SimpleExecContext::getHtmTransactionUid(), gem5::o3::LSQUnit::getLatestHtmUid(), gem5::o3::LSQUnit::insertLoad(), gem5::GenericHtmFailureFault::invoke(), gem5::SimpleExecContext::newHtmTransactionUid(), and gem5::o3::LSQUnit::squash().
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Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::X86Linux::archClone(), gem5::ArmLinux::archClone(), gem5::RiscvLinux64::archClone(), gem5::SparcLinux::archClone(), gem5::PowerLinux::archClone(), gem5::RiscvLinux32::archClone(), gem5::MiscRegOp64::checkEL2Trap(), gem5::o3::ThreadContext::copyArchRegs(), gem5::ArmISA::copyVecRegs(), gem5::X86ISA::doCpuid(), gem5::ArmISA::ArmStaticInst::getCurSveVecLenInBits(), gem5::ArmISA::ISA::getSelfDebug(), gem5::CheckerCPU::init(), gem5::ArmISA::mcrMrc15TrapToHyp(), gem5::BaseCPU::registerThreadContexts(), gem5::serialize(), gem5::ArmISA::snsBankedIndex64(), gem5::BaseCPU::takeOverFrom(), and gem5::unserialize().
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::X86ISA::copyMiscRegs(), gem5::ArmISA::ISA::copyRegsFrom(), gem5::BaseKvmCPU::doMMIOAccess(), gem5::SparcISA::TLB::doMmuRegRead(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::BaseCPU::flushTLBs(), gem5::SparcISA::TLB::GetTsbPtr(), gem5::SparcISA::FastInstructionAccessMMUMiss::invoke(), gem5::SparcISA::FastDataAccessMMUMiss::invoke(), gem5::X86ISA::PageFault::invoke(), gem5::GPUComputeDriver::ioctl(), gem5::Trace::TarmacParserRecord::readMemNoEffect(), gem5::minor::LSQ::SplitDataRequest::sendNextFragmentToTranslation(), gem5::X86ISA::ISA::setMiscReg(), gem5::RiscvISA::ISA::setMiscReg(), gem5::minor::LSQ::SingleDataRequest::startAddrTranslation(), gem5::BaseCPU::takeOverFrom(), gem5::Trace::TarmacTracerRecordV8::TraceInstEntryV8::TraceInstEntryV8(), gem5::Trace::TarmacTracerRecordV8::TraceMemEntryV8::TraceMemEntryV8(), gem5::TranslatingPortProxy::tryTLBsOnce(), and gem5::tryTranslate().
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::_llseekFunc(), gem5::ArmISA::RemoteGDB::acc(), gem5::acceptFunc(), gem5::accessFunc(), gem5::bindFunc(), gem5::brkFunc(), gem5::chdirFunc(), gem5::chmodFunc(), gem5::chownFunc(), gem5::cloneFunc(), gem5::closeFunc(), gem5::BaseRemoteGDB::cmdDumpPageTable(), gem5::connectFunc(), gem5::dup2Func(), gem5::dupFunc(), gem5::X86ISA::EmuLinux::event(), gem5::eventfdFunc(), gem5::execveFunc(), gem5::exitImpl(), gem5::fallocateFunc(), gem5::fchmodFunc(), gem5::fchownFunc(), gem5::fcntl64Func(), gem5::fcntlFunc(), gem5::SETranslatingPortProxy::fixupAddr(), gem5::fstat64Func(), gem5::fstatat64Func(), gem5::fstatfsFunc(), gem5::fstatFunc(), gem5::ftruncate64Func(), gem5::ftruncateFunc(), gem5::futexFunc(), gem5::getcwdFunc(), gem5::getegidFunc(), gem5::geteuidFunc(), gem5::getgidFunc(), gem5::getpagesizeFunc(), gem5::getpeernameFunc(), gem5::getpgrpFunc(), gem5::getpidFunc(), gem5::getppidFunc(), gem5::getsocknameFunc(), gem5::getsockoptFunc(), gem5::gettidFunc(), gem5::getuidFunc(), gem5::GenericPageTableFault::invoke(), gem5::SparcISA::FastInstructionAccessMMUMiss::invoke(), gem5::SparcISA::FastDataAccessMMUMiss::invoke(), gem5::SparcISA::SpillNNormal::invoke(), gem5::SparcISA::FillNNormal::invoke(), gem5::SparcISA::TrapInstruction::invoke(), gem5::X86ISA::PageFault::invoke(), gem5::GPUComputeDriver::ioctl(), gem5::ioctlFunc(), gem5::SparcISA::SEWorkload::is64(), gem5::X86ISA::GpuTLB::issueTLBLookup(), gem5::linkFunc(), gem5::listenFunc(), gem5::lseekFunc(), gem5::lstat64Func(), gem5::lstatFunc(), gem5::mkdirFunc(), gem5::mknodFunc(), gem5::GPUComputeDriver::mmap(), gem5::Shader::mmap(), gem5::mmap2Func(), gem5::mmapFunc(), gem5::mremapFunc(), gem5::munmapFunc(), gem5::GPURenderDriver::open(), gem5::GPUComputeDriver::open(), gem5::openatFunc(), gem5::X86ISA::EmuLinux::pageFault(), gem5::pipe2Func(), gem5::pollFunc(), gem5::pread64Func(), gem5::pwrite64Func(), gem5::readFunc(), gem5::readlinkFunc(), gem5::readvFunc(), gem5::recvfromFunc(), gem5::X86ISA::GpuTLB::CpuSidePort::recvFunctional(), gem5::recvmsgFunc(), gem5::BaseCPU::registerThreadContexts(), gem5::renameFunc(), gem5::rmdirFunc(), gem5::selectFunc(), gem5::sendmsgFunc(), gem5::ComputeUnit::sendRequest(), gem5::sendtoFunc(), gem5::setpgidFunc(), gem5::setsockoptFunc(), gem5::X86ISA::setThreadArea32Func(), gem5::setTidAddressFunc(), gem5::shutdownFunc(), gem5::socketFunc(), gem5::socketpairFunc(), gem5::stat64Func(), gem5::statfsFunc(), gem5::statFunc(), gem5::symlinkFunc(), gem5::MipsISA::EmuLinux::syscall(), gem5::PowerISA::EmuLinux::syscall(), gem5::ArmISA::EmuLinux::syscall(), gem5::RiscvISA::EmuLinux::syscall(), gem5::ArmISA::EmuFreebsd::syscall(), gem5::X86ISA::EmuLinux::syscall(), gem5::SEWorkload::syscall(), gem5::SparcISA::EmuLinux::syscall32(), gem5::SparcISA::EmuLinux::syscall64(), gem5::sysinfoFunc(), gem5::takeOverFrom(), gem5::tgkillFunc(), gem5::X86ISA::TLB::translate(), gem5::RiscvISA::TLB::translate(), gem5::X86ISA::GpuTLB::translate(), gem5::SparcISA::TLB::translateData(), gem5::X86ISA::TLB::translateFunctional(), gem5::SparcISA::TLB::translateFunctional(), gem5::SparcISA::TLB::translateInst(), gem5::ArmISA::TLB::translateSe(), gem5::X86ISA::GpuTLB::translationReturn(), gem5::truncate64Func(), gem5::truncateFunc(), gem5::SparcISA::unameFunc(), gem5::X86ISA::unameFunc(), gem5::MipsISA::unameFunc(), gem5::PowerISA::unameFunc(), gem5::ArmISA::unameFunc32(), gem5::RiscvISA::unameFunc32(), gem5::RiscvISA::unameFunc64(), gem5::ArmISA::unameFunc64(), gem5::unlinkFunc(), gem5::utimesFunc(), gem5::wait4Func(), gem5::writeFunc(), and gem5::writevFunc().
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::_llseekFunc(), gem5::pseudo_inst::addsymbol(), gem5::pseudo_inst::arm(), gem5::ArmISA::TLBIOp::broadcast(), gem5::cloneFunc(), gem5::Linux::cpuOnline(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::BaseStackTrace::dump(), gem5::linux::dumpDmesg(), gem5::exitFutexWake(), gem5::exitImpl(), gem5::futexFunc(), gem5::ArmSemihosting::gatherHeapInfo(), gem5::ArmSystem::getArmSystem(), gem5::getcpuFunc(), gem5::getrlimitFunc(), gem5::System::Threads::insert(), gem5::PowerISA::UnimplementedOpcodeFault::invoke(), gem5::SESyscallFault::invoke(), gem5::PowerISA::AlignmentFault::invoke(), gem5::PowerISA::TrapFault::invoke(), gem5::GenericPageTableFault::invoke(), gem5::RiscvISA::Reset::invoke(), gem5::GenericAlignmentFault::invoke(), gem5::SparcISA::TrapInstruction::invoke(), gem5::ArmISA::Reset::invoke(), gem5::ArmISA::SupervisorCall::invoke(), gem5::RiscvISA::SyscallFault::invokeSE(), gem5::pseudo_inst::loadsymbol(), gem5::pollFunc(), gem5::ArmSemihosting::portProxy(), gem5::ArmISA::DumpStats::process(), quiesce(), quiesceTick(), gem5::pseudo_inst::readfile(), gem5::SparcISA::ISA::readFSReg(), gem5::ArmISA::ISA::readMiscReg(), gem5::schedGetaffinityFunc(), gem5::selectFunc(), gem5::SparcISA::ISA::setFSReg(), gem5::setpgidFunc(), gem5::takeOverFrom(), gem5::tgkillFunc(), gem5::DistIface::toggleSync(), gem5::SparcISA::TLB::translateFunctional(), gem5::pseudo_inst::triggerWorkloadEvent(), gem5::wait4Func(), gem5::pseudo_inst::wakeCPU(), gem5::pseudo_inst::workbegin(), and gem5::pseudo_inst::workend().
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Definition at line 100 of file thread_context.hh.
References useForClone.
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Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::_llseekFunc(), gem5::acceptFunc(), gem5::accessFunc(), gem5::pseudo_inst::addsymbol(), gem5::X86ISA::archPrctlFunc(), gem5::bindFunc(), gem5::chdirFunc(), gem5::chmodFunc(), gem5::chownFunc(), gem5::cloneFunc(), gem5::connectFunc(), gem5::linux::ThreadInfo::curTaskInfo(), gem5::linux::ThreadInfo::curTaskMmFromTaskStruct(), gem5::linux::ThreadInfo::curTaskNameFromTaskStruct(), gem5::linux::ThreadInfo::curTaskPIDFromTaskStruct(), gem5::linux::ThreadInfo::curTaskStartFromTaskStruct(), gem5::linux::ThreadInfo::curTaskTGIDFromTaskStruct(), gem5::linux::dumpDmesg(), gem5::execveFunc(), gem5::exitFutexWake(), gem5::SparcISA::SEWorkload::flushWindows(), gem5::fstatat64Func(), gem5::futexFunc(), gem5::guest_abi::Argument< Aapcs32, Composite, typename std::enable_if_t< IsAapcs32Composite< Composite >::value > >::get(), gem5::linux::ThreadInfo::get_data(), gem5::getcwdFunc(), gem5::gethostnameFunc(), gem5::getpeernameFunc(), gem5::SparcISA::getresuidFunc(), gem5::getsocknameFunc(), gem5::getsockoptFunc(), gem5::ArmLinuxProcess32::initState(), gem5::GPUComputeDriver::ioctl(), gem5::ioctlFunc(), gem5::linkFunc(), gem5::lstat64Func(), gem5::lstatFunc(), gem5::mkdirFunc(), gem5::mknodFunc(), gem5::openatFunc(), gem5::X86ISA::EmuLinux::pageFault(), gem5::pipe2Func(), gem5::pollFunc(), gem5::ArmSemihosting::portProxy(), gem5::pread64Func(), gem5::linux::printk(), gem5::pwrite64Func(), gem5::BaseRemoteGDB::read(), gem5::pseudo_inst::readfile(), gem5::readFunc(), gem5::readlinkFunc(), gem5::Trace::TarmacParserRecord::readMemNoEffect(), gem5::readvFunc(), gem5::recvfromFunc(), gem5::recvmsgFunc(), gem5::renameFunc(), gem5::Process::replicatePage(), gem5::rmdirFunc(), gem5::schedGetaffinityFunc(), gem5::sendmsgFunc(), gem5::sendtoFunc(), gem5::setsockoptFunc(), gem5::X86ISA::setThreadArea32Func(), gem5::ArmISA::setTLSFunc32(), gem5::socketpairFunc(), gem5::stat64Func(), gem5::statfsFunc(), gem5::statFunc(), gem5::symlinkFunc(), gem5::ArmISA::sysctlFunc(), gem5::timeFunc(), gem5::truncate64Func(), gem5::truncateFunc(), gem5::unlinkFunc(), gem5::utimesFunc(), gem5::wait4Func(), gem5::BaseRemoteGDB::write(), gem5::pseudo_inst::writefile(), gem5::writeFunc(), and gem5::writevFunc().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), and gem5::ArmV8KvmCPU::updateThreadContext().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
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pure virtual |
Set the status to Halted.
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::exitImpl().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::GenericHtmFailureFault::invoke().
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pure virtual |
Initialise the physical and virtual port proxies and tie them to the data port of the CPU.
tc ThreadContext for the virtual-to-physical translation
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::BaseKvmCPU::init(), and gem5::MinorCPU::init().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::BaseKvmCPU::doMMIOAccess(), gem5::RiscvISA::RiscvFault::invoke(), gem5::BaseCPU::mwaitAtomic(), gem5::X86ISA::TLB::translate(), gem5::X86ISA::GpuTLB::translate(), gem5::minor::Execute::tryPCEvents(), gem5::ArmV8KvmCPU::updateKvmState(), gem5::ArmKvmCPU::updateKvmStateCore(), and gem5::X86KvmCPU::updateKvmStateRegs().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::Trace::ArmNativeTrace::check().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::ArmISA::ISA::addressTranslation(), gem5::ArmISA::ISA::addressTranslation64(), gem5::GenericISA::M5DebugFault::advancePC(), gem5::ArmISA::SoftwareStep::advanceSS(), gem5::MipsProcess::argsInit(), gem5::PowerProcess::argsInit(), gem5::RiscvProcess::argsInit(), gem5::X86ISA::X86Process::argsInit(), gem5::ArmProcess::argsInit(), gem5::PowerISA::BranchOp::branchTarget(), gem5::PowerISA::BranchDispCondOp::branchTarget(), gem5::Trace::SparcNativeTrace::check(), gem5::cloneFunc(), gem5::BaseRemoteGDB::cmdAsyncCont(), gem5::BaseRemoteGDB::cmdAsyncStep(), gem5::BaseRemoteGDB::cmdCont(), gem5::BaseRemoteGDB::cmdStep(), gem5::minor::Execute::commit(), gem5::minor::Execute::commitInst(), compare(), gem5::RiscvISA::ISA::copyRegsFrom(), gem5::X86ISA::ISA::copyRegsFrom(), gem5::PowerISA::ISA::copyRegsFrom(), gem5::MipsISA::ISA::copyRegsFrom(), gem5::SparcISA::ISA::copyRegsFrom(), gem5::ArmISA::ISA::copyRegsFrom(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::X86ISA::EmuLinux::event(), gem5::minor::Execute::executeMemRefInst(), gem5::execveFunc(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), gem5::SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), gem5::X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), gem5::SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::getRegs(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), gem5::X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), gem5::SparcISA::SEWorkload::handleTrap(), gem5::PowerProcess::initState(), gem5::X86ISA::FsWorkload::initState(), gem5::o3::CPU::insertThread(), gem5::FaultBase::invoke(), gem5::PowerISA::UnimplementedOpcodeFault::invoke(), gem5::SparcISA::SparcFaultBase::invoke(), gem5::X86ISA::X86FaultBase::invoke(), gem5::SESyscallFault::invoke(), gem5::ReExec::invoke(), gem5::SparcISA::PowerOnReset::invoke(), gem5::X86ISA::X86Trap::invoke(), gem5::MipsISA::MipsFaultBase::invoke(), gem5::PowerISA::TrapFault::invoke(), gem5::SyscallRetryFault::invoke(), gem5::RiscvISA::RiscvFault::invoke(), gem5::RiscvISA::Reset::invoke(), gem5::MipsISA::ResetFault::invoke(), gem5::ArmISA::ArmFault::invoke(), gem5::SparcISA::SpillNNormal::invoke(), gem5::MipsISA::TlbFault< TlbInvalidFault >::invoke(), gem5::SparcISA::FillNNormal::invoke(), gem5::SparcISA::TrapInstruction::invoke(), gem5::X86ISA::PageFault::invoke(), gem5::ArmISA::Reset::invoke(), gem5::ArmISA::SupervisorCall::invoke(), gem5::X86ISA::InitInterrupt::invoke(), gem5::X86ISA::StartupInterrupt::invoke(), gem5::ArmISA::ArmFault::invoke64(), gem5::RiscvISA::RiscvFault::invokeSE(), gem5::RiscvISA::UnknownInstFault::invokeSE(), gem5::RiscvISA::IllegalInstFault::invokeSE(), gem5::RiscvISA::UnimplementedFault::invokeSE(), gem5::RiscvISA::IllegalFrmFault::invokeSE(), gem5::ioctlFunc(), gem5::mmapFunc(), gem5::SkipFuncBase::process(), gem5::pseudo_inst::pseudoInstWork(), gem5::Trace::TarmacParserRecord::readMemNoEffect(), gem5::ArmISA::ISA::readMiscReg(), gem5::ArmISA::HTMCheckpoint::restore(), gem5::ArmISA::SkipFunc::returnFromFuncIn(), gem5::ArmISA::HTMCheckpoint::save(), gem5::serialize(), gem5::MipsISA::MipsFaultBase::setExceptionState(), gem5::RiscvISA::ISA::setMiscReg(), gem5::ArmISA::ISA::setMiscReg(), setNPC(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), gem5::SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), gem5::X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), gem5::SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::setRegs(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), gem5::X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), gem5::X86ISA::EmuLinux::syscall(), gem5::minor::Execute::takeInterrupt(), gem5::ArmISA::SelfDebug::testBreakPoints(), gem5::minor::Execute::tryPCEvents(), gem5::minor::Execute::tryToBranch(), gem5::unserialize(), gem5::Trace::X86NativeTrace::ThreadState::update(), gem5::Trace::ArmNativeTrace::ThreadState::update(), gem5::ArmKvmCPU::updateTCStateCore(), gem5::ArmV8KvmCPU::updateThreadContext(), gem5::X86KvmCPU::updateThreadContextRegs(), gem5::ArmISA::ISA::vecRegRenameMode(), and gem5::minor::Fetch1::wakeupFetch().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::Iris::ThreadContext.
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::Iris::ThreadContext.
Referenced by gem5::ArmISA::SkipFunc::returnFromFuncIn(), and gem5::ArmISA::ISA::setMiscReg().
void gem5::ThreadContext::quiesce | ( | ) |
Quiesce thread context.
Definition at line 144 of file thread_context.cc.
References contextId(), getSystemPtr(), gem5::System::Threads::quiesce(), and gem5::System::threads.
Referenced by gem5::pseudo_inst::quiesce(), and gem5::DistIface::toggleSync().
void gem5::ThreadContext::quiesceTick | ( | Tick | resume | ) |
Quiesce, suspend, and schedule activate at resume.
Definition at line 151 of file thread_context.cc.
References contextId(), getSystemPtr(), gem5::System::Threads::quiesceTick(), and gem5::System::threads.
Referenced by gem5::free_bsd::onUDelay(), gem5::linux::onUDelay(), gem5::pseudo_inst::quiesceCycles(), gem5::pseudo_inst::quiesceNs(), gem5::pseudo_inst::quiesceSkip(), and gem5::DistIface::toggleSync().
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by compare(), gem5::ArmISA::ISA::copyRegsFrom(), gem5::X86ISA::getRFlags(), gem5::ArmISA::ArmFault::invoke(), gem5::ArmISA::ArmFault::invoke64(), gem5::ArmISA::ISA::readMiscReg(), gem5::Trace::ArmNativeTrace::ThreadState::update(), gem5::Trace::TarmacTracerRecord::TraceRegEntry::updateCC(), gem5::ArmV8KvmCPU::updateKvmState(), and gem5::Trace::TarmacTracerRecord::TraceRegEntry::updateMisc().
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, gem5::o3::ThreadContext, gem5::fastmodel::CortexA76TC, and gem5::fastmodel::CortexR52TC.
Referenced by gem5::X86ISA::ISA::copyRegsFrom(), and gem5::serialize().
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by compare(), gem5::RiscvISA::ISA::copyRegsFrom(), gem5::PowerISA::ISA::copyRegsFrom(), gem5::SparcISA::ISA::copyRegsFrom(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::getRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), gem5::MipsISA::readRegOtherThread(), gem5::Trace::X86NativeTrace::ThreadState::update(), gem5::Trace::TarmacTracerRecord::TraceRegEntry::updateFloat(), and gem5::updateKvmStateFPUCommon().
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::fastmodel::CortexR52TC.
Referenced by gem5::PowerISA::BranchOp::branchTarget(), gem5::PowerISA::BranchDispCondOp::branchTarget(), gem5::PowerISA::BranchRegCondOp::branchTarget(), gem5::ArmSemihosting::call32(), gem5::ArmSemihosting::call64(), gem5::Trace::SparcNativeTrace::check(), compare(), gem5::RiscvISA::ISA::copyRegsFrom(), gem5::PowerISA::ISA::copyRegsFrom(), gem5::SparcISA::ISA::copyRegsFrom(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::TimingExprReadIntReg::eval(), gem5::SparcISA::SEWorkload::flushWindows(), gem5::guest_abi::Argument< SparcPseudoInstABI, uint64_t >::get(), gem5::guest_abi::Argument< X86PseudoInstABI, uint64_t >::get(), gem5::guest_abi::Argument< ABI, Arg, typename std::enable_if_t< std::is_base_of< GenericSyscallABI64, ABI >::value &&std::is_integral< Arg >::value > >::get(), gem5::guest_abi::Argument< ABI, Arg, typename std::enable_if_t< std::is_integral< Arg >::value &&!ABI::template IsWide< Arg >::value > >::get(), gem5::guest_abi::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)<=sizeof(uint32_t)) > >::get(), gem5::guest_abi::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)<=8)> >::get(), gem5::guest_abi::Argument< Aapcs32, Composite, typename std::enable_if_t< IsAapcs32Composite< Composite >::value > >::get(), gem5::guest_abi::Argument< Aapcs64, Composite, typename std::enable_if_t< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value > >::get(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), gem5::SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), gem5::X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), gem5::SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::getRegs(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), gem5::X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), gem5::ArmISA::DumpStats::getTaskDetails(), gem5::ArmISA::DumpStats64::getTaskDetails(), gem5::ArmISA::ArmFault::invoke(), gem5::GenericSyscallABI32::mergeRegs(), gem5::guest_abi::Result< Aapcs32, Composite, typename std::enable_if_t< IsAapcs32Composite< Composite >::value > >::prepare(), gem5::ArmISA::ISA::readMiscReg(), gem5::MipsISA::readRegOtherThread(), gem5::ArmISA::SkipFunc::returnFromFuncIn(), gem5::ArmISA::HTMCheckpoint::save(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::setRegs(), gem5::guest_abi::Result< PowerISA::SEWorkload::SyscallABI, SyscallReturn >::store(), gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< SparcISA::SEWorkload::BaseSyscallABI, ABI >::value > >::store(), gem5::guest_abi::Result< Aapcs64, Composite, typename std::enable_if_t< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value > >::store(), gem5::MipsISA::EmuLinux::syscall(), gem5::PowerISA::EmuLinux::syscall(), gem5::ArmISA::EmuLinux::syscall(), gem5::RiscvISA::EmuLinux::syscall(), gem5::ArmISA::EmuFreebsd::syscall(), gem5::X86ISA::EmuLinux::syscall(), gem5::SparcISA::EmuLinux::syscall32(), gem5::SparcISA::EmuLinux::syscall64(), gem5::Trace::X86NativeTrace::ThreadState::update(), gem5::Trace::ArmNativeTrace::ThreadState::update(), gem5::Trace::TarmacTracerRecord::TraceRegEntry::updateInt(), and gem5::ArmV8KvmCPU::updateKvmState().
Flat register interfaces.
Some architectures have different registers visible in different modes. Such architectures "flatten" a register (see flattenRegId()) to map it into the gem5 register file. This interface provides a flat interface to the underlying register file, which allows for example serialization code to access all registers.
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, gem5::o3::ThreadContext, gem5::fastmodel::CortexR52TC, and gem5::fastmodel::CortexA76TC.
Referenced by gem5::X86ISA::ISA::copyRegsFrom(), gem5::MipsISA::ISA::copyRegsFrom(), gem5::ArmISA::ISA::copyRegsFrom(), gem5::fastmodel::CortexA76TC::readIntRegFlat(), gem5::serialize(), and gem5::ArmKvmCPU::updateKvmStateCore().
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pure virtual |
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::pseudo_inst::quiesceTime().
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pure virtual |
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::pseudo_inst::quiesceTime().
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::ArmISA::AArch32isUndefinedGenericTimer(), gem5::ArmISA::addPAC(), gem5::ArmISA::addPACDA(), gem5::ArmISA::addPACDB(), gem5::ArmISA::addPACGA(), gem5::ArmISA::addPACIA(), gem5::ArmISA::addPACIB(), gem5::ArmISA::VectorCatch::addressMatching(), gem5::ArmProcess64::armHwcapImpl(), gem5::ArmISA::authDA(), gem5::ArmISA::authDB(), gem5::ArmISA::authIA(), gem5::ArmISA::authIB(), gem5::MipsISA::MipsFaultBase::base(), gem5::ArmISA::calculateBottomPACBit(), gem5::ArmISA::calculateTBI(), gem5::ArmISA::canReadAArch64SysReg(), gem5::ArmISA::canWriteAArch64SysReg(), gem5::ArmISA::ArmStaticInst::checkAdvSIMDOrFPEnabled32(), gem5::MiscRegOp64::checkEL1Trap(), gem5::MiscRegOp64::checkEL2Trap(), gem5::MiscRegOp64::checkEL3Trap(), gem5::ArmISA::ArmStaticInst::checkFPAdvSIMDTrap64(), gem5::ArmISA::Interrupts::checkInterrupts(), gem5::ArmISA::TLB::checkPAN(), gem5::ArmISA::ArmStaticInst::checkSveEnabled(), gem5::ArmISA::computeAddrTop(), gem5::ArmISA::condGenericTimerCommonEL0SystemAccessTrapEL2(), gem5::ArmISA::condGenericTimerCommonEL1SystemAccessTrapEL2(), gem5::ArmISA::condGenericTimerPhysEL1SystemAccessTrapEL2(), gem5::ArmISA::condGenericTimerPhysHypTrap(), gem5::ArmISA::condGenericTimerSystemAccessTrapEL1(), gem5::X86ISA::copyMiscRegs(), gem5::ArmISA::debugTargetFrom(), gem5::SparcISA::TLB::doMmuRegRead(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::RiscvISA::TLB::doTranslate(), gem5::ArmKvmCPU::dumpKvmStateCoProc(), gem5::ArmISA::PrefetchAbort::ec(), gem5::ArmISA::DataAbort::ec(), gem5::ArmISA::EL2Enabled(), gem5::ArmISA::ELIsInHost(), gem5::ArmISA::ELStateUsingAArch32K(), gem5::ArmISA::VectorCatch::exceptionTrapping(), gem5::MiscRegImplDefined64::execute(), gem5::SparcISA::SEWorkload::flushWindows(), gem5::ArmISA::ArmStaticInst::generalExceptionsToAArch64(), gem5::ArmISA::BrkPoint::getAddrfromReg(), gem5::ArmISA::WatchPoint::getAddrfromReg(), gem5::ArmISA::BrkPoint::getContextfromReg(), gem5::ArmISA::BrkPoint::getControlReg(), gem5::ArmISA::Interrupts::getInterrupt(), gem5::RiscvISA::TLB::getMemPriv(), gem5::SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), gem5::SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), gem5::ArmISA::getRestoredITBits(), gem5::ArmISA::ArmFault::getVector(), gem5::ArmISA::Reset::getVector(), gem5::ArmISA::ArmFault::getVector64(), gem5::ArmISA::VectorCatch::getVectorBase(), gem5::ArmISA::TLB::getVMID(), gem5::ArmISA::BrkPoint::getVMIDfromReg(), gem5::RiscvISA::Interrupts::globalMask(), gem5::ArmISA::HaveLVA(), gem5::ArmISA::HavePACExt(), gem5::ArmISA::HaveSecureEL2Ext(), gem5::ArmISA::HaveVirtHostExt(), gem5::ArmISA::illegalExceptionReturn(), gem5::ArmISA::inAArch64(), gem5::ArmISA::SelfDebug::init(), gem5::ArmProcess32::initState(), gem5::ArmProcess64::initState(), gem5::RiscvISA::RiscvFault::invoke(), gem5::RiscvISA::Reset::invoke(), gem5::MipsISA::CoprocessorUnusableFault::invoke(), gem5::ArmISA::ArmFault::invoke(), gem5::ArmISA::Reset::invoke(), gem5::X86ISA::InitInterrupt::invoke(), gem5::X86ISA::StartupInterrupt::invoke(), gem5::ArmISA::AbortFault< DataAbort >::invoke(), gem5::ArmISA::ArmFault::invoke64(), gem5::X86KvmCPU::ioctlRun(), gem5::ArmISA::SelfDebug::isDebugEnabled(), gem5::ArmISA::SelfDebug::isDebugEnabledForEL32(), gem5::ArmISA::isGenericTimerCommonEL0HypTrap(), gem5::ArmISA::isGenericTimerCommonEL0SystemAccessTrapEL2(), gem5::ArmISA::isGenericTimerPhysEL0SystemAccessTrapEL2(), gem5::ArmISA::isGenericTimerPhysEL1SystemAccessTrapEL2(), gem5::ArmISA::isGenericTimerSystemAccessTrapEL1(), gem5::ArmISA::isGenericTimerSystemAccessTrapEL3(), gem5::ArmISA::isGenericTimerVirtSystemAccessTrapEL2(), gem5::ArmISA::isSecure(), gem5::ArmISA::isSecureBelowEL3(), gem5::ArmISA::IsSecureEL2Enabled(), gem5::ArmISA::isUnpriviledgeAccess(), gem5::ArmISA::ArmStaticInst::isWFxTrapping(), gem5::ArmISA::longDescFormatInUse(), gem5::ArmISA::mcrMrc15TrapToHyp(), gem5::ArmISA::mcrrMrrc15TrapToHyp(), gem5::ArmISA::TableWalker::memAttrs(), gem5::ArmISA::TableWalker::memAttrsAArch64(), gem5::ArmISA::TableWalker::memAttrsLPAE(), gem5::ArmISA::ArmFaultVals< FastInterrupt >::offset(), gem5::MipsISA::TlbRefillFault::offset(), gem5::ArmISA::TLBIALL::operator()(), gem5::ArmISA::TLBIALLEL::operator()(), gem5::ArmISA::TLBIVMALL::operator()(), gem5::ArmISA::TLBIASID::operator()(), gem5::ArmISA::TLBIMVAA::operator()(), gem5::ArmISA::TLBIMVA::operator()(), gem5::X86ISA::EmuLinux::pageFault(), gem5::ArmISA::TableWalker::processWalk(), gem5::ArmISA::TableWalker::processWalkAArch64(), gem5::ArmISA::TableWalker::processWalkLPAE(), gem5::ArmISA::purifyTaggedAddr(), gem5::ArmISA::readMPIDR(), gem5::MipsISA::readRegOtherThread(), gem5::ArmISA::s1TranslationRegime(), gem5::ArmISA::HTMCheckpoint::save(), gem5::ArmISA::sendEvent(), gem5::Iris::Interrupts::serialize(), gem5::MipsISA::MipsFaultBase::setExceptionState(), gem5::ArmISA::ISA::setMiscReg(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), gem5::MipsISA::TlbFault< TlbInvalidFault >::setTlbExceptionState(), gem5::ArmISA::snsBankedIndex(), gem5::ArmISA::snsBankedIndex64(), gem5::ArmISA::ArmStaticInst::softwareBreakpoint32(), gem5::ArmISA::SPAlignmentCheckEnabled(), gem5::ArmV8KvmCPU::startup(), gem5::ArmISA::stripPAC(), gem5::ArmISA::Interrupts::takeInt(), gem5::ArmISA::WatchPoint::test(), gem5::ArmISA::BrkPoint::testAddrMatch(), gem5::ArmISA::BrkPoint::testAddrMissMatch(), gem5::ArmISA::BrkPoint::testContextMatch(), gem5::ArmISA::BrkPoint::testVMIDMatch(), gem5::RiscvISA::TLB::translate(), gem5::ArmISA::TLB::translateMmuOff(), gem5::Trace::ArmNativeTrace::ThreadState::update(), gem5::ArmISA::ArmFault::update(), gem5::ArmV8KvmCPU::updateKvmState(), gem5::ArmKvmCPU::updateKvmStateCore(), gem5::updateKvmStateFPUCommon(), gem5::X86KvmCPU::updateKvmStateMSRs(), gem5::X86KvmCPU::updateKvmStateRegs(), gem5::X86KvmCPU::updateKvmStateSRegs(), gem5::ArmKvmCPU::updateKvmStateVFP(), gem5::ArmISA::TLB::updateMiscReg(), gem5::ArmISA::upperAndLowerRange(), and gem5::ArmISA::TableWalker::walk().
Implemented in gem5::fastmodel::CortexR52TC, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::ArmISA::AbortFault< DataAbort >::abortDisable(), gem5::ArmISA::Interrupt::abortDisable(), gem5::ArmISA::FastInterrupt::abortDisable(), gem5::X86ISA::archPrctlFunc(), gem5::MipsISA::Interrupts::checkInterrupts(), gem5::SparcISA::Interrupts::checkInterrupts(), gem5::ArmISA::ArmStaticInst::checkSETENDEnabled(), compare(), gem5::ArmISA::condGenericTimerCommonEL1SystemAccessTrapEL2(), gem5::SparcISA::copyMiscRegs(), gem5::X86ISA::copyMiscRegs(), gem5::MipsISA::ISA::copyRegsFrom(), gem5::SparcISA::ISA::copyRegsFrom(), gem5::ArmISA::ISA::copyRegsFrom(), gem5::ArmISA::currOpMode(), gem5::ArmISA::debugTargetFrom(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::ArmKvmCPU::dumpKvmStateCoProc(), gem5::SparcISA::enterREDState(), gem5::X86ISA::TLB::finalizePhysical(), gem5::ArmISA::FastInterrupt::fiqDisable(), gem5::MipsISA::getCauseIP(), gem5::SparcISA::getHyperVector(), gem5::MipsISA::Interrupts::getInterrupt(), gem5::SparcISA::Interrupts::getInterrupt(), gem5::SparcISA::getPrivVector(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), gem5::X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), gem5::X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), gem5::X86ISA::getRFlags(), gem5::ArmISA::ArmFault::getVector(), gem5::ArmISA::Reset::getVector(), gem5::X86KvmCPU::handleIOMiscReg32(), gem5::X86KvmCPU::handleKvmExitIO(), gem5::ArmISA::SelfDebug::init(), gem5::X86ISA::FsWorkload::initState(), gem5::MipsISA::Interrupts::interruptsPending(), gem5::Iris::ISA::inUserMode(), gem5::SparcISA::SparcFaultBase::invoke(), gem5::X86ISA::X86FaultBase::invoke(), gem5::SparcISA::PowerOnReset::invoke(), gem5::MipsISA::ResetFault::invoke(), gem5::SparcISA::FastInstructionAccessMMUMiss::invoke(), gem5::ArmISA::ArmFault::invoke(), gem5::SparcISA::FastDataAccessMMUMiss::invoke(), gem5::X86ISA::PageFault::invoke(), gem5::ArmISA::VirtualDataAbort::invoke(), gem5::ArmISA::isBigEndian64(), gem5::MipsISA::InterruptFault::offset(), gem5::MipsISA::Interrupts::onCpuTimerInterrupt(), gem5::X86ISA::GpuTLB::pagingProtectionChecks(), gem5::SparcISA::ISA::processHSTickCompare(), gem5::SparcISA::ISA::processSTickCompare(), gem5::ArmISA::UndefinedInstruction::routeToHyp(), gem5::ArmISA::SupervisorCall::routeToHyp(), gem5::ArmISA::SupervisorTrap::routeToHyp(), gem5::ArmISA::PrefetchAbort::routeToHyp(), gem5::ArmISA::DataAbort::routeToHyp(), gem5::ArmISA::Interrupt::routeToHyp(), gem5::ArmISA::FastInterrupt::routeToHyp(), gem5::ArmISA::PCAlignmentFault::routeToHyp(), gem5::ArmISA::SPAlignmentFault::routeToHyp(), gem5::ArmISA::SystemError::routeToHyp(), gem5::ArmISA::SoftwareBreakpoint::routeToHyp(), gem5::ArmISA::HardwareBreakpoint::routeToHyp(), gem5::ArmISA::Watchpoint::routeToHyp(), gem5::ArmISA::SoftwareStepFault::routeToHyp(), gem5::ArmISA::IllegalInstSetStateFault::routeToHyp(), gem5::ArmISA::PrefetchAbort::routeToMonitor(), gem5::ArmISA::DataAbort::routeToMonitor(), gem5::ArmISA::Interrupt::routeToMonitor(), gem5::ArmISA::FastInterrupt::routeToMonitor(), gem5::ArmISA::SystemError::routeToMonitor(), gem5::Iris::ISA::serialize(), gem5::Iris::Interrupts::serialize(), gem5::MipsISA::setCauseIP(), gem5::setKvmDTableReg(), gem5::setKvmSegmentReg(), gem5::ArmISA::ISA::setMiscReg(), gem5::X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), gem5::X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), gem5::PMP::shouldCheckPMP(), gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< SparcISA::SEWorkload::BaseSyscallABI, ABI >::value > >::store(), gem5::X86ISA::GpuTLB::tlbLookup(), gem5::X86ISA::TLB::translate(), gem5::X86ISA::GpuTLB::translate(), gem5::SparcISA::TLB::translateFunctional(), gem5::X86ISA::TLB::translateInt(), gem5::X86ISA::GpuTLB::translateInt(), gem5::Trace::ArmNativeTrace::ThreadState::update(), gem5::ArmISA::ArmFault::update(), gem5::Trace::TarmacTracerRecord::TraceRegEntry::updateInt(), gem5::ArmKvmCPU::updateKvmStateCoProc(), gem5::updateKvmStateFPUCommon(), gem5::X86KvmCPU::updateKvmStateFPULegacy(), gem5::X86KvmCPU::updateKvmStateFPUXSave(), gem5::Trace::TarmacTracerRecord::TraceRegEntry::updateMisc(), and gem5::ArmKvmCPU::updateTCStateCore().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
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pure virtual |
Implemented in gem5::SimpleThread, gem5::o3::ThreadContext, gem5::Iris::ThreadContext, and gem5::CheckerThreadContext< TC >.
Referenced by gem5::ArmISA::copyVecRegs().
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pure virtual |
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::serialize().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::fastmodel::CortexR52TC.
Referenced by compare(), gem5::guest_abi::Argument< Aapcs32Vfp, Float, typename std::enable_if_t< std::is_floating_point< Float >::value > >::get(), gem5::guest_abi::Argument< Aapcs32Vfp, HA, typename std::enable_if_t< IsAapcs32HomogeneousAggregate< HA >::value > >::get(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), gem5::ArmISA::HTMCheckpoint::save(), gem5::guest_abi::Result< Aapcs32Vfp, Float, typename std::enable_if_t< std::is_floating_point< Float >::value > >::store(), gem5::guest_abi::Result< Aapcs32Vfp, HA, typename std::enable_if_t< IsAapcs32HomogeneousAggregate< HA >::value > >::store(), gem5::Trace::ArmNativeTrace::ThreadState::update(), gem5::ArmV8KvmCPU::updateKvmState(), and gem5::Trace::TarmacTracerRecordV8::TraceRegEntryV8::updateVec().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::ArmISA::copyVecRegs(), and gem5::serialize().
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inlinevirtual |
Reimplemented in gem5::Iris::ThreadContext, and gem5::CheckerThreadContext< TC >.
Definition at line 187 of file thread_context.hh.
Referenced by gem5::CheckerThreadContext< TC >::regStats().
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::o3::ElasticTrace::regProbeListeners(), and gem5::BaseRemoteGDB::scheduleInstCommitEvent().
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Reimplemented in gem5::Iris::ThreadContext.
Definition at line 135 of file thread_context.cc.
References getCpuPtr(), and gem5::BaseCPU::getDataPort().
Referenced by gem5::PortProxy::PortProxy().
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::ArmISA::ISA::copyRegsFrom(), gem5::ArmISA::ISA::setMiscReg(), gem5::X86ISA::setRFlags(), gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< ArmISA::EmuFreebsd::BaseSyscallABI, ABI >::value > >::store(), and gem5::ArmV8KvmCPU::updateThreadContext().
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, gem5::o3::ThreadContext, gem5::fastmodel::CortexA76TC, and gem5::fastmodel::CortexR52TC.
Referenced by gem5::X86ISA::ISA::copyRegsFrom(), and gem5::unserialize().
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pure virtual |
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::System::Threads::insert(), and gem5::takeOverFrom().
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::RiscvISA::ISA::copyRegsFrom(), gem5::PowerISA::ISA::copyRegsFrom(), gem5::SparcISA::ISA::copyRegsFrom(), gem5::MipsISA::setRegOtherThread(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::setRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), and gem5::updateThreadContextFPUCommon().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::Iris::ThreadContext.
Referenced by gem5::ArmISA::ISA::startup().
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::fastmodel::CortexR52TC.
Referenced by gem5::X86Linux::archClone(), gem5::RiscvLinux64::archClone(), gem5::SparcLinux::archClone(), gem5::PowerLinux::archClone(), gem5::ArmLinux32::archClone(), gem5::RiscvLinux32::archClone(), gem5::ArmLinux64::archClone(), gem5::MipsProcess::argsInit(), gem5::PowerProcess::argsInit(), gem5::RiscvProcess::argsInit(), gem5::X86ISA::X86Process::argsInit(), gem5::ArmProcess::argsInit(), gem5::RiscvISA::ISA::copyRegsFrom(), gem5::PowerISA::ISA::copyRegsFrom(), gem5::SparcISA::ISA::copyRegsFrom(), gem5::SparcISA::SEWorkload::flushWindows(), gem5::PowerProcess::initState(), gem5::SparcProcess::initState(), gem5::X86ISA::X86FaultBase::invoke(), gem5::ArmISA::ArmFault::invoke(), gem5::X86ISA::InitInterrupt::invoke(), gem5::ArmISA::HTMCheckpoint::restore(), gem5::ArmISA::ISA::setMiscReg(), gem5::MipsISA::setRegOtherThread(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), gem5::SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), gem5::X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), gem5::SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::setRegs(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), gem5::X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), gem5::guest_abi::Result< SparcPseudoInstABI, T >::store(), gem5::guest_abi::Result< X86PseudoInstABI, T >::store(), gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< ArmISA::EmuLinux::BaseSyscallABI, ABI >::value > >::store(), gem5::guest_abi::Result< RiscvISA::SEWorkload::SyscallABI, SyscallReturn >::store(), gem5::guest_abi::Result< MipsISA::SEWorkload::SyscallABI, SyscallReturn >::store(), gem5::guest_abi::Result< PowerISA::SEWorkload::SyscallABI, SyscallReturn >::store(), gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< ArmISA::EmuFreebsd::BaseSyscallABI, ABI >::value > >::store(), gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< X86Linux::SyscallABI, ABI >::value > >::store(), gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< SparcISA::SEWorkload::BaseSyscallABI, ABI >::value > >::store(), gem5::guest_abi::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)< sizeof(uint32_t))> >::store(), gem5::guest_abi::Result< Aapcs32, Integer, typename std::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)==sizeof(uint32_t))> >::store(), gem5::guest_abi::Result< Aapcs32, Integer, typename std::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)==sizeof(uint64_t))> >::store(), gem5::guest_abi::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)<=8)> >::store(), gem5::guest_abi::Result< Aapcs32, Composite, typename std::enable_if_t< IsAapcs32Composite< Composite >::value > >::store(), gem5::guest_abi::Result< Aapcs64, Composite, typename std::enable_if_t< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value > >::store(), gem5::guest_abi::Result< ArmSemihosting::Abi32, ArmSemihosting::RetErrno >::store(), gem5::guest_abi::Result< ArmSemihosting::Abi64, ArmSemihosting::RetErrno >::store(), and gem5::ArmV8KvmCPU::updateThreadContext().
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, gem5::fastmodel::CortexR52TC, and gem5::fastmodel::CortexA76TC.
Referenced by gem5::X86ISA::ISA::copyRegsFrom(), gem5::MipsISA::ISA::copyRegsFrom(), gem5::ArmISA::ISA::copyRegsFrom(), gem5::fastmodel::CortexA76TC::setIntRegFlat(), gem5::unserialize(), gem5::ArmKvmCPU::updateTCStateCore(), and gem5::ArmV8KvmCPU::updateThreadContext().
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::Iris::ThreadContext.
Referenced by gem5::ArmLinux::archClone(), gem5::SparcLinux::archClone(), gem5::SparcISA::copyMiscRegs(), gem5::X86ISA::copyMiscRegs(), gem5::SparcISA::ISA::copyRegsFrom(), gem5::ArmISA::ISA::copyRegsFrom(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::SparcISA::enterREDState(), gem5::SparcISA::SEWorkload::flushWindows(), gem5::X86KvmCPU::handleIOMiscReg32(), gem5::SparcProcess::initState(), gem5::Sparc32Process::initState(), gem5::ArmProcess32::initState(), gem5::X86ISA::FsWorkload::initState(), gem5::ArmProcess64::initState(), gem5::Sparc64Process::initState(), gem5::X86ISA::X86_64Process::initState(), gem5::X86ISA::I386Process::initState(), gem5::X86ISA::installSegDesc(), gem5::SparcISA::PowerOnReset::invoke(), gem5::RiscvISA::RiscvFault::invoke(), gem5::RiscvISA::Reset::invoke(), gem5::MipsISA::ResetFault::invoke(), gem5::ArmISA::ArmFault::invoke(), gem5::X86ISA::PageFault::invoke(), gem5::ArmISA::Reset::invoke(), gem5::X86ISA::InitInterrupt::invoke(), gem5::X86ISA::StartupInterrupt::invoke(), gem5::ArmISA::AbortFault< DataAbort >::invoke(), gem5::ArmISA::PCAlignmentFault::invoke(), gem5::ArmISA::HardwareBreakpoint::invoke(), gem5::ArmISA::Watchpoint::invoke(), gem5::ArmISA::ArmSev::invoke(), gem5::ArmISA::ArmFault::invoke64(), gem5::X86KvmCPU::ioctlRun(), gem5::ArmISA::HTMCheckpoint::restore(), gem5::Iris::Interrupts::serialize(), gem5::setContextSegment(), gem5::GenericTimer::setMiscReg(), gem5::ArmISA::ISA::setMiscReg(), gem5::MipsISA::setRegOtherThread(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), gem5::X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), gem5::X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), gem5::X86ISA::setRFlags(), gem5::ArmISA::ArmFault::setSyndrome(), gem5::ArmISA::setTLSFunc32(), gem5::ArmISA::setTLSFunc64(), gem5::ArmKvmCPU::updateTCStateCore(), gem5::ArmKvmCPU::updateTCStateVFP(), gem5::ArmV8KvmCPU::updateThreadContext(), gem5::X86KvmCPU::updateThreadContext(), and gem5::X86KvmCPU::updateThreadContextMSRs().
Implemented in gem5::fastmodel::CortexR52TC, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::Iris::ThreadContext.
Referenced by gem5::X86Linux::archClone(), gem5::SparcLinux::archClone(), gem5::X86ISA::archPrctlFunc(), gem5::SparcISA::copyMiscRegs(), gem5::X86ISA::copyMiscRegs(), gem5::MipsISA::ISA::copyRegsFrom(), gem5::ArmISA::ISA::copyRegsFrom(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::SparcProcess::initState(), gem5::X86ISA::X86_64Process::initState(), gem5::X86ISA::I386Process::initState(), gem5::SparcISA::PowerOnReset::invoke(), gem5::MipsISA::CoprocessorUnusableFault::invoke(), gem5::MipsISA::AddressFault< TlbInvalidFault >::invoke(), gem5::ArmISA::ArmFault::invoke(), gem5::ArmISA::VirtualDataAbort::invoke(), gem5::MipsISA::setCauseIP(), gem5::MipsISA::MipsFaultBase::setExceptionState(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), gem5::MipsISA::setThreadAreaFunc(), gem5::MipsISA::TlbFault< TlbInvalidFault >::setTlbExceptionState(), gem5::ArmKvmCPU::updateTCStateCoProc(), gem5::ArmKvmCPU::updateTCStateCore(), gem5::ArmV8KvmCPU::updateThreadContext(), gem5::X86KvmCPU::updateThreadContextFPU(), gem5::updateThreadContextFPUCommon(), and gem5::X86KvmCPU::updateThreadContextXSave().
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inline |
Definition at line 241 of file thread_context.hh.
References pcState(), and gem5::X86ISA::val.
Referenced by gem5::BaseKvmCPU::doMMIOAccess(), gem5::execveFunc(), and gem5::CheckerThreadContext< TC >::setNPC().
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pure virtual |
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::cloneFunc(), and gem5::execveFunc().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::o3::CPU::exitThreads(), gem5::o3::CPU::insertThread(), and gem5::takeOverFrom().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::takeOverFrom().
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inline |
Definition at line 102 of file thread_context.hh.
References useForClone.
Referenced by gem5::cloneFunc().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::Iris::ThreadContext.
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pure virtual |
Implemented in gem5::SimpleThread, gem5::o3::ThreadContext, gem5::Iris::ThreadContext, and gem5::CheckerThreadContext< TC >.
Referenced by gem5::ArmISA::copyVecRegs().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::ArmISA::HTMCheckpoint::restore().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::unserialize().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::Iris::ThreadContext.
Referenced by gem5::ArmISA::HTMCheckpoint::restore(), gem5::guest_abi::Result< Aapcs32Vfp, Float, typename std::enable_if_t< std::is_floating_point< Float >::value > >::store(), and gem5::guest_abi::Result< Aapcs32Vfp, HA, typename std::enable_if_t< IsAapcs32HomogeneousAggregate< HA >::value > >::store().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::CheckerThreadContext< TC >, gem5::o3::ThreadContext, and gem5::Iris::ThreadContext.
Referenced by gem5::ArmISA::copyVecRegs(), and gem5::unserialize().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::o3::ThreadContext, and gem5::CheckerThreadContext< TC >.
Referenced by gem5::ArmISA::getAff1(), gem5::ArmISA::getAff2(), gem5::FVPBasePwrCtrl::getCorePwrStatus(), gem5::ArmISA::getMPIDR(), gem5::FVPBasePwrCtrl::powerCoreOff(), gem5::FVPBasePwrCtrl::powerCoreOn(), and gem5::FVPBasePwrCtrl::write().
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pure virtual |
Implemented in gem5::Iris::ThreadContext, gem5::SimpleThread, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::minor::Execute::commitInst(), gem5::SimpleThread::copyState(), gem5::BaseKvmCPU::drainResume(), gem5::execveFunc(), gem5::exitImpl(), gem5::System::Threads::findFree(), gem5::minor::Fetch1::getScheduledThread(), gem5::minor::Execute::issue(), gem5::System::Threads::numRunning(), gem5::SparcISA::ISA::processHSTickCompare(), gem5::SparcISA::ISA::processSTickCompare(), gem5::BaseRemoteGDB::scheduleInstCommitEvent(), gem5::setpgidFunc(), gem5::takeOverFrom(), gem5::DistIface::toggleSync(), gem5::minor::Execute::tryToBranch(), and gem5::pseudo_inst::wakeCPU().
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pure virtual |
Set the status to Suspended.
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::cloneFunc(), gem5::X86ISA::MicroHalt::execute(), gem5::SparcISA::ISA::setFSReg(), gem5::GPUComputeDriver::sleepCPU(), and gem5::FutexMap::suspend_bitset().
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pure virtual |
Implemented in gem5::CheckerThreadContext< TC >, gem5::SimpleThread, gem5::Iris::ThreadContext, and gem5::o3::ThreadContext.
Referenced by gem5::BaseCPU::takeOverFrom().
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pure virtual |
Implemented in gem5::SimpleThread, gem5::Iris::ThreadContext, gem5::CheckerThreadContext< TC >, and gem5::o3::ThreadContext.
Referenced by gem5::cloneFunc(), gem5::SimpleThread::copyState(), gem5::ArmISA::getAff0(), gem5::ArmISA::Reset::invoke(), gem5::ArmISA::AbortFault< DataAbort >::invoke(), gem5::ArmISA::SystemError::invoke(), gem5::ArmISA::ArmSev::invoke(), gem5::RiscvISA::ISA::readMiscReg(), gem5::ArmISA::ISA::readMiscReg(), gem5::ArmISA::sendEvent(), gem5::RiscvISA::ISA::setMiscReg(), gem5::takeOverFrom(), and gem5::BaseCPU::takeOverFrom().
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static |
Definition at line 47 of file guest_abi.test.cc.
Referenced by TEST().
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Definition at line 46 of file guest_abi.test.cc.
Referenced by TEST().
double gem5::ThreadContext::floatResult = DefaultFloatResult |
Definition at line 50 of file guest_abi.test.cc.
Referenced by gem5::guest_abi::Result< TestABI_1D, Ret, typename std::enable_if_t< std::is_floating_point< Ret >::value > >::store(), gem5::guest_abi::Result< TestABI_2D, Ret, typename std::enable_if_t< std::is_floating_point< Ret >::value > >::store(), and TEST().
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static |
Definition at line 44 of file guest_abi.test.cc.
Referenced by gem5::guest_abi::Argument< TestABI_1D, Arg, typename std::enable_if_t< std::is_floating_point< Arg >::value > >::get(), gem5::guest_abi::Argument< TestABI_2D, Arg, typename std::enable_if_t< std::is_floating_point< Arg >::value > >::get(), test2DVoid(), and testIntVoid().
int gem5::ThreadContext::intOffset = 0 |
Definition at line 52 of file guest_abi.test.cc.
Referenced by TEST(), and testTcInit().
int gem5::ThreadContext::intResult = DefaultIntResult |
Definition at line 49 of file guest_abi.test.cc.
Referenced by gem5::guest_abi::Result< TestABI_1D, int >::store(), gem5::guest_abi::Result< TestABI_2D, int >::store(), and TEST().
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Definition at line 43 of file guest_abi.test.cc.
Referenced by gem5::guest_abi::Argument< TestABI_1D, int >::get(), gem5::guest_abi::Argument< TestABI_Prepare, int >::get(), gem5::guest_abi::Argument< TestABI_2D, int >::get(), gem5::guest_abi::Argument< TestABI_TcInit, int >::get(), test2DVoid(), testIntVoid(), testPrepareInt(), testPrepareVoid(), and testTcInit().
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protected |
Definition at line 96 of file thread_context.hh.
Referenced by getUseForClone(), and setUseForClone().