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44 #ifndef __CPU_MINOR_SCOREBOARD_HH__
45 #define __CPU_MINOR_SCOREBOARD_HH__
88 typedef unsigned short int Index;
const unsigned vecRegOffset
@ VecElemClass
Vector Register Native Elem lane.
@ CCRegClass
Condition-code register.
void markupInstDests(MinorDynInstPtr inst, Cycles retire_time, ThreadContext *thread_context, bool mark_unpredictable)
Mark up an instruction's effects by incrementing numResults counts.
@ FloatRegClass
Floating-point register.
std::vector< Index > numUnpredictableResults
Count of the number of results which can't be predicted.
const unsigned numRegs
The number of registers in the Scoreboard.
bool canInstIssue(MinorDynInstPtr inst, const std::vector< Cycles > *src_reg_relative_latencies, const std::vector< bool > *cant_forward_from_fu_indices, Cycles now, ThreadContext *thread_context)
Can this instruction be issued.
const unsigned intRegOffset
std::vector< Index > numResults
Count of the number of in-flight instructions that have results for each register.
const BaseISA::RegClasses regClasses
Scoreboard(const std::string &name, const BaseISA::RegClasses ®_classes)
Cycles is a wrapper class for representing cycle counts, i.e.
Interface for things with names.
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual std::string name() const
void minorTrace() const
MinorTraceIF interface.
std::vector< int > fuIndices
Index of the FU generating this result.
void clearInstDests(MinorDynInstPtr inst, bool clear_unpredictable)
Clear down the dependencies for this instruction.
bool findIndex(const RegId ®, Index &scoreboard_index)
Sets scoreboard_index to the index into numResults of the given register index.
std::vector< InstSeqNum > writingInst
The execute sequence number of the most recent inst to generate this register value.
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
unsigned short int Index
Type to use when indexing numResults.
const unsigned ccRegOffset
A scoreboard of register dependencies including, for each register: The number of in-flight instructi...
std::vector< Cycles > returnCycle
The estimated cycle number that the result will be presented.
InstSeqNum execSeqNumToWaitFor(MinorDynInstPtr inst, ThreadContext *thread_context)
Returns the exec sequence number of the most recent inst on which the given inst depends.
@ IntRegClass
Integer register.
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
const unsigned vecPredRegOffset
const unsigned floatRegOffset
Register ID: describe an architectural register with its class and index.
Generated on Tue Sep 21 2021 12:25:01 for gem5 by doxygen 1.8.17