gem5::BaseSimpleCPU Class Reference

#include <base.hh>

Inheritance diagram for gem5::BaseSimpleCPU:

Public Member Functions
	BaseSimpleCPU (const BaseSimpleCPUParams &params)
virtual	~BaseSimpleCPU ()
void	wakeup (ThreadID tid) override
void	checkForInterrupts ()
void	setupFetchRequest (const RequestPtr &req)
void	serviceInstCountEvents ()
void	preExecute ()
void	postExecute ()
void	advancePC (const Fault &fault)
void	haltContext (ThreadID thread_num) override
void	resetStats () override
virtual Fault	readMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >())
virtual Fault	initiateMemRead (Addr addr, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >())
virtual Fault	writeMem (uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable=std::vector< bool >())
virtual Fault	amoMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op)
virtual Fault	initiateMemAMO (Addr addr, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op)
void	countInst ()
Counter	totalInsts () const override
Counter	totalOps () const override
void	serializeThread (CheckpointOut &cp, ThreadID tid) const override
void	unserializeThread (CheckpointIn &cp, ThreadID tid) override
virtual Fault	initiateHtmCmd (Request::Flags flags)=0
	Hardware transactional memory commands (HtmCmds), e.g. More...

Public Attributes
Trace::InstRecord *	traceData
CheckerCPU *	checker
std::vector< SimpleExecContext * >	threadInfo
std::list< ThreadID >	activeThreads
StaticInstPtr	curStaticInst
	Current instruction. More...
StaticInstPtr	curMacroStaticInst

Protected Types
enum	Status {   Idle, Running, Faulting, ITBWaitResponse,   IcacheRetry, IcacheWaitResponse, IcacheWaitSwitch, DTBWaitResponse,   DcacheRetry, DcacheWaitResponse, DcacheWaitSwitch }

Protected Member Functions
void	checkPcEventQueue ()
void	swapActiveThread ()
void	traceFault ()
	Handler used when encountering a fault; its purpose is to tear down the InstRecord. More...

Protected Attributes
ThreadID	curThread
branch_prediction::BPredUnit *	branchPred
const RegIndex	zeroReg
Status	_status
std::unique_ptr< PCStateBase >	preExecuteTempPC

Detailed Description

Definition at line 83 of file base.hh.

Member Enumeration Documentation

Status

enum gem5::BaseSimpleCPU::Status

protected

Enumerator
Idle
Running
Faulting
ITBWaitResponse
IcacheRetry
IcacheWaitResponse
IcacheWaitSwitch
DTBWaitResponse
DcacheRetry
DcacheWaitResponse
DcacheWaitSwitch

Definition at line 110 of file base.hh.

Constructor & Destructor Documentation

BaseSimpleCPU()

gem5::BaseSimpleCPU::BaseSimpleCPU

(

const BaseSimpleCPUParams &

params

)

Definition at line 84 of file base.cc.

References checker, fatal, gem5::FullSystem, gem5::SimpleThread::getTC(), gem5::ArmISA::i, gem5::MipsISA::p, gem5::CheckerCPU::setSystem(), and threadInfo.

~BaseSimpleCPU()

gem5::BaseSimpleCPU::~BaseSimpleCPU ( )

virtual

Definition at line 187 of file base.cc.

Member Function Documentation

advancePC()

void gem5::BaseSimpleCPU::advancePC

(

const Fault &

fault

)

Definition at line 462 of file base.cc.

References gem5::StaticInst::advancePC(), gem5::PCStateBase::branching(), branchPred, curMacroStaticInst, curStaticInst, curThread, gem5::SimpleThread::decoder, gem5::SimpleExecContext::execContextStats, gem5::SimpleExecContext::fetchOffset, gem5::StaticInst::isControl(), gem5::StaticInst::isLastMicroop(), gem5::NoFault, gem5::nullStaticInstPtr, gem5::SimpleExecContext::ExecContextStats::numBranchMispred, gem5::SimpleThread::pcState(), gem5::SimpleExecContext::predPC, gem5::InstDecoder::reset(), gem5::branch_prediction::BPredUnit::squash(), gem5::SimpleExecContext::thread, threadInfo, and gem5::branch_prediction::BPredUnit::update().

Referenced by gem5::TimingSimpleCPU::advanceInst(), and gem5::AtomicSimpleCPU::tick().

amoMem()

virtual Fault gem5::BaseSimpleCPU::amoMem ( Addr  addr, uint8_t *  data, unsigned  size, Request::Flags  flags, AtomicOpFunctorPtr  amo_op  )

inlinevirtual

Reimplemented in gem5::AtomicSimpleCPU.

Definition at line 173 of file base.hh.

References panic.

Referenced by gem5::SimpleExecContext::amoMem().

checkForInterrupts()

void gem5::BaseSimpleCPU::checkForInterrupts

(

)

Definition at line 250 of file base.cc.

References curThread, gem5::SimpleThread::decoder, DPRINTF, gem5::SimpleExecContext::fetchOffset, gem5::SimpleThread::getTC(), gem5::SimpleExecContext::inHtmTransactionalState(), gem5::NoFault, gem5::InstDecoder::reset(), gem5::SimpleExecContext::thread, and threadInfo.

Referenced by gem5::TimingSimpleCPU::fetch(), and gem5::AtomicSimpleCPU::tick().

checkPcEventQueue()

void gem5::BaseSimpleCPU::checkPcEventQueue ( )

protected

Definition at line 125 of file base.cc.

References curThread, gem5::MipsISA::pc, and threadInfo.

Referenced by gem5::TimingSimpleCPU::fetch(), and gem5::AtomicSimpleCPU::tick().

countInst()

void gem5::BaseSimpleCPU::countInst

(

)

Definition at line 153 of file base.cc.

References curStaticInst, curThread, gem5::SimpleExecContext::execContextStats, gem5::StaticInst::isLastMicroop(), gem5::StaticInst::isMicroop(), gem5::SimpleExecContext::numInst, gem5::SimpleExecContext::ExecContextStats::numInsts, gem5::SimpleExecContext::numOp, gem5::SimpleExecContext::ExecContextStats::numOps, and threadInfo.

Referenced by gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), and gem5::AtomicSimpleCPU::tick().

haltContext()

void gem5::BaseSimpleCPU::haltContext ( ThreadID  thread_num )

override

Definition at line 192 of file base.cc.

initiateHtmCmd()

virtual Fault gem5::BaseSimpleCPU::initiateHtmCmd ( Request::Flags  flags )

pure virtual

Hardware transactional memory commands (HtmCmds), e.g.

start a transaction and commit a transaction, are memory operations but are neither really (true) loads nor stores. For this reason the interface is extended and initiateHtmCmd() is used to instigate the command.

Implemented in gem5::TimingSimpleCPU, and gem5::AtomicSimpleCPU.

Referenced by gem5::SimpleExecContext::initiateHtmCmd().

initiateMemAMO()

virtual Fault gem5::BaseSimpleCPU::initiateMemAMO ( Addr  addr, unsigned  size, Request::Flags  flags, AtomicOpFunctorPtr  amo_op  )

inlinevirtual

Reimplemented in gem5::TimingSimpleCPU.

Definition at line 180 of file base.hh.

References panic.

Referenced by gem5::SimpleExecContext::initiateMemAMO().

initiateMemRead()

virtual Fault gem5::BaseSimpleCPU::initiateMemRead ( Addr  addr, unsigned  size, Request::Flags  flags, const std::vector< bool > &  byte_enable = std::vector<bool>()  )

inlinevirtual

Reimplemented in gem5::TimingSimpleCPU.

Definition at line 158 of file base.hh.

References panic.

Referenced by gem5::SimpleExecContext::initiateMemRead().

postExecute()

void gem5::BaseSimpleCPU::postExecute

(

)

Definition at line 387 of file base.cc.

References curStaticInst, curThread, gem5::Trace::InstRecord::dump(), gem5::SimpleExecContext::execContextStats, gem5::FullSystem, gem5::StaticInst::isAtomic(), gem5::StaticInst::isCall(), gem5::StaticInst::isCondCtrl(), gem5::StaticInst::isControl(), gem5::StaticInst::isFloating(), gem5::StaticInst::isInteger(), gem5::StaticInst::isLoad(), gem5::StaticInst::isMemRef(), gem5::StaticInst::isReturn(), gem5::StaticInst::isStore(), gem5::StaticInst::isVector(), gem5::SimpleExecContext::ExecContextStats::numBranches, gem5::SimpleExecContext::ExecContextStats::numCallsReturns, gem5::SimpleExecContext::ExecContextStats::numCondCtrlInsts, gem5::SimpleExecContext::ExecContextStats::numFpAluAccesses, gem5::SimpleExecContext::ExecContextStats::numFpInsts, gem5::SimpleExecContext::ExecContextStats::numIntAluAccesses, gem5::SimpleExecContext::ExecContextStats::numIntInsts, gem5::SimpleExecContext::numLoad, gem5::SimpleExecContext::ExecContextStats::numLoadInsts, gem5::SimpleExecContext::ExecContextStats::numMemRefs, gem5::SimpleExecContext::ExecContextStats::numStoreInsts, gem5::SimpleExecContext::ExecContextStats::numVecAluAccesses, gem5::SimpleExecContext::ExecContextStats::numVecInsts, gem5::StaticInst::opClass(), gem5::SimpleExecContext::ExecContextStats::statExecutedInstType, threadInfo, and traceData.

Referenced by gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), gem5::AtomicSimpleCPU::tick(), and gem5::TimingSimpleCPU::translationFault().

preExecute()

void gem5::BaseSimpleCPU::preExecute

(

)

Definition at line 305 of file base.cc.

References branchPred, curMacroStaticInst, curStaticInst, curThread, gem5::curTick(), decoder, gem5::SimpleThread::decoder, gem5::SimpleExecContext::execContextStats, gem5::StaticInst::fetchMicroop(), gem5::SimpleExecContext::fetchOffset, gem5::SimpleThread::getTC(), gem5::StaticInst::isControl(), gem5::StaticInst::isMacroop(), gem5::isRomMicroPC(), gem5::SimpleExecContext::ExecContextStats::numPredictedBranches, gem5::SimpleThread::pcState(), gem5::branch_prediction::BPredUnit::predict(), gem5::SimpleExecContext::predPC, preExecuteTempPC, gem5::SimpleThread::setIntReg(), gem5::SimpleExecContext::setMemAccPredicate(), gem5::SimpleExecContext::setPredicate(), gem5::SimpleExecContext::stayAtPC, gem5::SimpleExecContext::thread, threadInfo, traceData, and zeroReg.

Referenced by gem5::TimingSimpleCPU::completeIfetch(), and gem5::AtomicSimpleCPU::tick().

readMem()

virtual Fault gem5::BaseSimpleCPU::readMem ( Addr  addr, uint8_t *  data, unsigned  size, Request::Flags  flags, const std::vector< bool > &  byte_enable = std::vector<bool>()  )

inlinevirtual

Reimplemented in gem5::AtomicSimpleCPU.

Definition at line 151 of file base.hh.

References panic.

Referenced by gem5::SimpleExecContext::readMem().

resetStats()

void gem5::BaseSimpleCPU::resetStats ( )

override

Definition at line 200 of file base.cc.

References _status, Idle, and threadInfo.

serializeThread()

void gem5::BaseSimpleCPU::serializeThread ( CheckpointOut &  cp, ThreadID  tid  ) const

override

Definition at line 209 of file base.cc.

References _status, Idle, Running, and threadInfo.

serviceInstCountEvents()

void gem5::BaseSimpleCPU::serviceInstCountEvents

(

)

Definition at line 298 of file base.cc.

References gem5::SimpleThread::comInstEventQueue, curThread, gem5::SimpleExecContext::numInst, gem5::EventQueue::serviceEvents(), gem5::SimpleExecContext::thread, and threadInfo.

Referenced by gem5::TimingSimpleCPU::advanceInst(), and gem5::AtomicSimpleCPU::tick().

setupFetchRequest()

void gem5::BaseSimpleCPU::setupFetchRequest

(

const RequestPtr &

req

)

Definition at line 281 of file base.cc.

References curThread, decoder, gem5::SimpleThread::decoder, DPRINTF, gem5::SimpleExecContext::fetchOffset, gem5::Request::INST_FETCH, gem5::PCStateBase::instAddr(), gem5::SimpleThread::pcState(), gem5::SimpleExecContext::thread, and threadInfo.

Referenced by gem5::TimingSimpleCPU::fetch(), and gem5::AtomicSimpleCPU::tick().

swapActiveThread()

void gem5::BaseSimpleCPU::swapActiveThread ( )

protected

Definition at line 137 of file base.cc.

References activeThreads, curStaticInst, curThread, gem5::StaticInst::isDelayedCommit(), and threadInfo.

Referenced by gem5::TimingSimpleCPU::fetch(), and gem5::AtomicSimpleCPU::tick().

totalInsts()

Counter gem5::BaseSimpleCPU::totalInsts ( ) const

override

Definition at line 166 of file base.cc.

References threadInfo.

totalOps()

Counter gem5::BaseSimpleCPU::totalOps ( ) const

override

Definition at line 177 of file base.cc.

References threadInfo.

traceFault()

void gem5::BaseSimpleCPU::traceFault ( )

protected

Handler used when encountering a fault; its purpose is to tear down the InstRecord.

If a fault is meant to be traced, the handler won't delete the record and it will annotate the record as coming from a faulting instruction.

Definition at line 239 of file base.cc.

References gem5::Trace::InstRecord::setFaulting(), and traceData.

Referenced by gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), gem5::AtomicSimpleCPU::tick(), and gem5::TimingSimpleCPU::translationFault().

unserializeThread()

void gem5::BaseSimpleCPU::unserializeThread ( CheckpointIn &  cp, ThreadID  tid  )

override

Definition at line 217 of file base.cc.

References threadInfo.

wakeup()

void gem5::BaseSimpleCPU::wakeup ( ThreadID  tid )

override

Definition at line 228 of file base.cc.

References DPRINTF, gem5::ThreadContext::Suspended, and threadInfo.

Referenced by gem5::AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), gem5::AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(), gem5::TimingSimpleCPU::DcachePort::recvFunctionalSnoop(), gem5::TimingSimpleCPU::DcachePort::recvTimingSnoopReq(), gem5::TimingSimpleCPU::threadSnoop(), and gem5::AtomicSimpleCPU::threadSnoop().

writeMem()

virtual Fault gem5::BaseSimpleCPU::writeMem ( uint8_t *  data, unsigned  size, Addr  addr, Request::Flags  flags, uint64_t *  res, const std::vector< bool > &  byte_enable = std::vector<bool>()  )

inlinevirtual

Reimplemented in gem5::TimingSimpleCPU, and gem5::AtomicSimpleCPU.

Definition at line 165 of file base.hh.

References panic.

Referenced by gem5::SimpleExecContext::writeMem().

Member Data Documentation

_status

Status gem5::BaseSimpleCPU::_status

protected

Definition at line 125 of file base.hh.

Referenced by gem5::AtomicSimpleCPU::activateContext(), gem5::TimingSimpleCPU::activateContext(), gem5::TimingSimpleCPU::advanceInst(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), gem5::TimingSimpleCPU::drain(), gem5::AtomicSimpleCPU::drainResume(), gem5::TimingSimpleCPU::drainResume(), gem5::TimingSimpleCPU::fetch(), gem5::TimingSimpleCPU::finishTranslation(), gem5::TimingSimpleCPU::handleReadPacket(), gem5::TimingSimpleCPU::handleWritePacket(), gem5::TimingSimpleCPU::initiateMemAMO(), gem5::TimingSimpleCPU::initiateMemRead(), gem5::TimingSimpleCPU::FetchTranslation::markDelayed(), gem5::TimingSimpleCPU::IcachePort::recvReqRetry(), gem5::TimingSimpleCPU::DcachePort::recvReqRetry(), resetStats(), gem5::TimingSimpleCPU::sendData(), gem5::TimingSimpleCPU::sendFetch(), serializeThread(), gem5::AtomicSimpleCPU::suspendContext(), gem5::TimingSimpleCPU::suspendContext(), gem5::AtomicSimpleCPU::switchOut(), gem5::TimingSimpleCPU::switchOut(), gem5::AtomicSimpleCPU::tick(), and gem5::TimingSimpleCPU::writeMem().

activeThreads

std::list<ThreadID> gem5::BaseSimpleCPU::activeThreads

Definition at line 103 of file base.hh.

Referenced by gem5::AtomicSimpleCPU::activateContext(), gem5::TimingSimpleCPU::activateContext(), gem5::AtomicSimpleCPU::drain(), gem5::TimingSimpleCPU::drain(), gem5::AtomicSimpleCPU::drainResume(), gem5::TimingSimpleCPU::drainResume(), gem5::AtomicSimpleCPU::suspendContext(), gem5::TimingSimpleCPU::suspendContext(), and swapActiveThread().

branchPred

branch_prediction::BPredUnit* gem5::BaseSimpleCPU::branchPred

protected

Definition at line 87 of file base.hh.

Referenced by advancePC(), and preExecute().

checker

CheckerCPU* gem5::BaseSimpleCPU::checker

Definition at line 100 of file base.hh.

Referenced by BaseSimpleCPU().

curMacroStaticInst

StaticInstPtr gem5::BaseSimpleCPU::curMacroStaticInst

Definition at line 107 of file base.hh.

Referenced by advancePC(), gem5::TimingSimpleCPU::fetch(), preExecute(), and gem5::AtomicSimpleCPU::tick().

curStaticInst

StaticInstPtr gem5::BaseSimpleCPU::curStaticInst

Current instruction.

Definition at line 106 of file base.hh.

Referenced by advancePC(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), countInst(), gem5::TimingSimpleCPU::fetch(), postExecute(), preExecute(), swapActiveThread(), and gem5::AtomicSimpleCPU::tick().

curThread

ThreadID gem5::BaseSimpleCPU::curThread

protected

Definition at line 86 of file base.hh.

Referenced by gem5::TimingSimpleCPU::advanceInst(), advancePC(), gem5::AtomicSimpleCPU::amoMem(), checkForInterrupts(), checkPcEventQueue(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), countInst(), gem5::TimingSimpleCPU::fetch(), gem5::NonCachingSimpleCPU::fetchInstMem(), gem5::AtomicSimpleCPU::fetchInstMem(), gem5::AtomicSimpleCPU::genMemFragmentRequest(), gem5::TimingSimpleCPU::handleReadPacket(), gem5::TimingSimpleCPU::handleWritePacket(), gem5::TimingSimpleCPU::initiateHtmCmd(), gem5::TimingSimpleCPU::initiateMemAMO(), gem5::TimingSimpleCPU::initiateMemRead(), gem5::AtomicSimpleCPU::isCpuDrained(), gem5::TimingSimpleCPU::isCpuDrained(), postExecute(), preExecute(), gem5::AtomicSimpleCPU::readMem(), gem5::TimingSimpleCPU::sendData(), gem5::TimingSimpleCPU::sendFetch(), gem5::TimingSimpleCPU::sendSplitData(), serviceInstCountEvents(), setupFetchRequest(), gem5::TimingSimpleCPU::suspendContext(), swapActiveThread(), gem5::TimingSimpleCPU::switchOut(), gem5::AtomicSimpleCPU::tick(), gem5::AtomicSimpleCPU::writeMem(), and gem5::TimingSimpleCPU::writeMem().

preExecuteTempPC

std::unique_ptr<PCStateBase> gem5::BaseSimpleCPU::preExecuteTempPC

protected

Definition at line 135 of file base.hh.

Referenced by preExecute().

threadInfo

std::vector<SimpleExecContext*> gem5::BaseSimpleCPU::threadInfo

Definition at line 102 of file base.hh.

Referenced by gem5::AtomicSimpleCPU::activateContext(), gem5::TimingSimpleCPU::activateContext(), gem5::TimingSimpleCPU::advanceInst(), advancePC(), gem5::AtomicSimpleCPU::amoMem(), BaseSimpleCPU(), checkForInterrupts(), checkPcEventQueue(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), countInst(), gem5::AtomicSimpleCPU::drainResume(), gem5::TimingSimpleCPU::drainResume(), gem5::TimingSimpleCPU::fetch(), gem5::NonCachingSimpleCPU::fetchInstMem(), gem5::AtomicSimpleCPU::fetchInstMem(), gem5::AtomicSimpleCPU::genMemFragmentRequest(), gem5::TimingSimpleCPU::handleReadPacket(), gem5::TimingSimpleCPU::handleWritePacket(), gem5::TimingSimpleCPU::htmSendAbortSignal(), gem5::TimingSimpleCPU::initiateHtmCmd(), gem5::TimingSimpleCPU::initiateMemAMO(), gem5::TimingSimpleCPU::initiateMemRead(), gem5::AtomicSimpleCPU::isCpuDrained(), gem5::TimingSimpleCPU::isCpuDrained(), postExecute(), preExecute(), gem5::AtomicSimpleCPU::readMem(), gem5::AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), gem5::AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(), gem5::TimingSimpleCPU::DcachePort::recvTimingSnoopReq(), resetStats(), gem5::TimingSimpleCPU::sendData(), gem5::TimingSimpleCPU::sendFetch(), gem5::TimingSimpleCPU::sendSplitData(), serializeThread(), serviceInstCountEvents(), setupFetchRequest(), gem5::AtomicSimpleCPU::suspendContext(), gem5::TimingSimpleCPU::suspendContext(), swapActiveThread(), gem5::TimingSimpleCPU::switchOut(), gem5::TimingSimpleCPU::threadSnoop(), gem5::AtomicSimpleCPU::threadSnoop(), gem5::AtomicSimpleCPU::tick(), totalInsts(), totalOps(), unserializeThread(), wakeup(), gem5::AtomicSimpleCPU::writeMem(), and gem5::TimingSimpleCPU::writeMem().

traceData

Trace::InstRecord* gem5::BaseSimpleCPU::traceData

Definition at line 99 of file base.hh.

Referenced by gem5::AtomicSimpleCPU::amoMem(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), gem5::TimingSimpleCPU::htmSendAbortSignal(), gem5::TimingSimpleCPU::initiateHtmCmd(), gem5::TimingSimpleCPU::initiateMemAMO(), gem5::TimingSimpleCPU::initiateMemRead(), postExecute(), preExecute(), gem5::AtomicSimpleCPU::readMem(), gem5::SimpleExecContext::setPredicate(), gem5::AtomicSimpleCPU::tick(), traceFault(), gem5::TimingSimpleCPU::translationFault(), gem5::AtomicSimpleCPU::writeMem(), and gem5::TimingSimpleCPU::writeMem().

zeroReg

const RegIndex gem5::BaseSimpleCPU::zeroReg

protected

Definition at line 89 of file base.hh.

Referenced by preExecute().

---

The documentation for this class was generated from the following files:

• cpu/simple/base.hh
• cpu/simple/base.cc