gem5::AtomicSimpleCPU Class Reference

#include <atomic.hh>

Inheritance diagram for gem5::AtomicSimpleCPU:

Classes
class	AtomicCPUDPort
class	AtomicCPUPort
	An AtomicCPUPort overrides the default behaviour of the recvAtomicSnoop and ignores the packet instead of panicking. More...

Public Member Functions
	AtomicSimpleCPU (const AtomicSimpleCPUParams &params)
virtual	~AtomicSimpleCPU ()
void	init () override
DrainState	drain () override
void	drainResume () override
void	switchOut () override
void	takeOverFrom (BaseCPU *old_cpu) override
void	verifyMemoryMode () const override
void	activateContext (ThreadID thread_num) override
void	suspendContext (ThreadID thread_num) override
bool	genMemFragmentRequest (const RequestPtr &req, Addr frag_addr, int size, Request::Flags flags, const std::vector< bool > &byte_enable, int &frag_size, int &size_left) const
	Helper function used to set up the request for a single fragment of a memory access. More...
Fault	readMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) override
Fault	initiateHtmCmd (Request::Flags flags) override
	Hardware transactional memory commands (HtmCmds), e.g. More...
void	htmSendAbortSignal (ThreadID tid, uint64_t htm_uid, HtmFailureFaultCause cause) override
Fault	writeMem (uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable=std::vector< bool >()) override
Fault	amoMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op) override
void	regProbePoints () override
void	printAddr (Addr a)
	Print state of address in memory system via PrintReq (for debugging). More...
Public Member Functions inherited from gem5::BaseSimpleCPU
	BaseSimpleCPU (const BaseSimpleCPUParams &params)
virtual	~BaseSimpleCPU ()
void	wakeup (ThreadID tid) override
void	checkForInterrupts ()
void	setupFetchRequest (const RequestPtr &req)
void	serviceInstCountEvents ()
void	preExecute ()
void	postExecute ()
void	advancePC (const Fault &fault)
void	haltContext (ThreadID thread_num) override
void	resetStats () override
virtual Fault	initiateMemRead (Addr addr, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >())
virtual Fault	initiateMemAMO (Addr addr, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op)
void	countInst ()
Counter	totalInsts () const override
Counter	totalOps () const override
void	serializeThread (CheckpointOut &cp, ThreadID tid) const override
void	unserializeThread (CheckpointIn &cp, ThreadID tid) override

Protected Member Functions
void	tick ()
bool	isCpuDrained () const
	Check if a system is in a drained state. More...
bool	tryCompleteDrain ()
	Try to complete a drain request. More...
virtual Tick	sendPacket (RequestPort &port, const PacketPtr &pkt)
virtual Tick	fetchInstMem ()
Port &	getDataPort () override
	Return a reference to the data port. More...
Port &	getInstPort () override
	Return a reference to the instruction port. More...
void	threadSnoop (PacketPtr pkt, ThreadID sender)
	Perform snoop for other cpu-local thread contexts. More...
Protected Member Functions inherited from gem5::BaseSimpleCPU
void	checkPcEventQueue ()
void	swapActiveThread ()
void	traceFault ()
	Handler used when encountering a fault; its purpose is to tear down the InstRecord. More...

Protected Attributes
EventFunctionWrapper	tickEvent
const int	width
bool	locked
const bool	simulate_data_stalls
const bool	simulate_inst_stalls
AtomicCPUPort	icachePort
AtomicCPUDPort	dcachePort
RequestPtr	ifetch_req
RequestPtr	data_read_req
RequestPtr	data_write_req
RequestPtr	data_amo_req
bool	dcache_access
Tick	dcache_latency
ProbePointArg< std::pair< SimpleThread *, const StaticInstPtr > > *	ppCommit
	Probe Points. More...
Protected Attributes inherited from gem5::BaseSimpleCPU
ThreadID	curThread
branch_prediction::BPredUnit *	branchPred
const RegIndex	zeroReg
Status	_status
std::unique_ptr< PCStateBase >	preExecuteTempPC

Additional Inherited Members
Public Attributes inherited from gem5::BaseSimpleCPU
Trace::InstRecord *	traceData
CheckerCPU *	checker
std::vector< SimpleExecContext * >	threadInfo
std::list< ThreadID >	activeThreads
StaticInstPtr	curStaticInst
	Current instruction. More...
StaticInstPtr	curMacroStaticInst
Protected Types inherited from gem5::BaseSimpleCPU
enum	Status {   Idle, Running, Faulting, ITBWaitResponse,   IcacheRetry, IcacheWaitResponse, IcacheWaitSwitch, DTBWaitResponse,   DcacheRetry, DcacheWaitResponse, DcacheWaitSwitch }

Detailed Description

Definition at line 53 of file atomic.hh.

Constructor & Destructor Documentation

AtomicSimpleCPU()

gem5::AtomicSimpleCPU::AtomicSimpleCPU

(

const AtomicSimpleCPUParams &

params

)

Definition at line 75 of file atomic.cc.

References tick().

~AtomicSimpleCPU()

gem5::AtomicSimpleCPU::~AtomicSimpleCPU ( )

virtual

Definition at line 95 of file atomic.cc.

References gem5::Event::scheduled(), and tickEvent.

Member Function Documentation

activateContext()

void gem5::AtomicSimpleCPU::activateContext ( ThreadID  thread_num )

override

Definition at line 221 of file atomic.cc.

References gem5::BaseSimpleCPU::_status, gem5::BaseSimpleCPU::activeThreads, DPRINTF, gem5::BaseSimpleCPU::Running, gem5::Event::scheduled(), gem5::BaseSimpleCPU::threadInfo, and tickEvent.

amoMem()

Fault gem5::AtomicSimpleCPU::amoMem ( Addr  addr, uint8_t *  data, unsigned  size, Request::Flags  flags, AtomicOpFunctorPtr  amo_op  )

overridevirtual

Reimplemented from gem5::BaseSimpleCPU.

Definition at line 549 of file atomic.cc.

References gem5::X86ISA::addr, gem5::BaseSimpleCPU::curThread, data, data_amo_req, gem5::Packet::dataStatic(), dcache_access, dcache_latency, dcachePort, gem5::SimpleThread::getTC(), gem5::PCStateBase::instAddr(), gem5::Packet::isError(), gem5::Packet::makeWriteCmd(), gem5::SimpleThread::mmu, gem5::Request::NO_ACCESS, gem5::NoFault, panic_if, gem5::SimpleThread::pcState(), gem5::roundDown(), sendPacket(), gem5::Trace::InstRecord::setMem(), gem5::SimpleExecContext::thread, gem5::BaseSimpleCPU::threadInfo, gem5::BaseSimpleCPU::traceData, gem5::BaseMMU::translateAtomic(), and gem5::BaseMMU::Write.

drain()

DrainState gem5::AtomicSimpleCPU::drain ( )

override

Definition at line 103 of file atomic.cc.

References gem5::BaseSimpleCPU::activeThreads, DPRINTF, gem5::Drained, gem5::Draining, isCpuDrained(), gem5::Event::scheduled(), and tickEvent.

drainResume()

void gem5::AtomicSimpleCPU::drainResume ( )

override

Definition at line 143 of file atomic.cc.

References gem5::BaseSimpleCPU::_status, gem5::ThreadContext::Active, gem5::BaseSimpleCPU::activeThreads, DPRINTF, gem5::BaseSimpleCPU::Idle, gem5::BaseSimpleCPU::Running, gem5::Event::scheduled(), gem5::BaseSimpleCPU::threadInfo, tickEvent, and verifyMemoryMode().

fetchInstMem()

Tick gem5::AtomicSimpleCPU::fetchInstMem ( )

protectedvirtual

Reimplemented in gem5::NonCachingSimpleCPU.

Definition at line 744 of file atomic.cc.

References gem5::BaseSimpleCPU::curThread, gem5::Packet::dataStatic(), decoder, icachePort, ifetch_req, gem5::Packet::isError(), gem5::MemCmd::ReadReq, sendPacket(), and gem5::BaseSimpleCPU::threadInfo.

Referenced by gem5::NonCachingSimpleCPU::fetchInstMem(), and tick().

genMemFragmentRequest()

bool gem5::AtomicSimpleCPU::genMemFragmentRequest	(	const RequestPtr &	req,
		Addr	frag_addr,
		int	size,
		Request::Flags	flags,
		const std::vector< bool > &	byte_enable,
		int &	frag_size,
		int &	size_left
	)		const

Helper function used to set up the request for a single fragment of a memory access.

Takes care of setting up the appropriate byte-enable mask for the fragment, given the mask for the entire memory access.

Parameters

	req	Pointer to the Request object to populate.
	frag_addr	Start address of the fragment.
	size	Total size of the memory access in bytes.
	flags	Request flags.
	byte_enable	Byte-enable mask for the entire memory access.
[out]	frag_size	Fragment size.
[in,out]	size_left	Size left to be processed in the memory access.

Returns

True if the byte-enable mask for the fragment is not all-false.

Definition at line 335 of file atomic.cc.

References gem5::addrBlockOffset(), gem5::BaseSimpleCPU::curThread, gem5::isAnyActiveElement(), and gem5::BaseSimpleCPU::threadInfo.

Referenced by readMem(), and writeMem().

getDataPort()

Port& gem5::AtomicSimpleCPU::getDataPort ( )

inlineoverrideprotected

Return a reference to the data port.

Definition at line 179 of file atomic.hh.

References dcachePort.

getInstPort()

Port& gem5::AtomicSimpleCPU::getInstPort ( )

inlineoverrideprotected

Return a reference to the instruction port.

Definition at line 182 of file atomic.hh.

References icachePort.

htmSendAbortSignal()

void gem5::AtomicSimpleCPU::htmSendAbortSignal ( ThreadID  tid, uint64_t  htm_uid, HtmFailureFaultCause  cause  )

inlineoverride

Definition at line 234 of file atomic.hh.

References panic.

init()

void gem5::AtomicSimpleCPU::init ( )

override

Definition at line 64 of file atomic.cc.

References data_amo_req, data_read_req, data_write_req, ifetch_req, and gem5::statistics::init.

initiateHtmCmd()

Fault gem5::AtomicSimpleCPU::initiateHtmCmd ( Request::Flags  flags )

inlineoverridevirtual

Hardware transactional memory commands (HtmCmds), e.g.

start a transaction and commit a transaction, are memory operations but are neither really (true) loads nor stores. For this reason the interface is extended and initiateHtmCmd() is used to instigate the command.

Implements gem5::BaseSimpleCPU.

Definition at line 227 of file atomic.hh.

References panic.

isCpuDrained()

bool gem5::AtomicSimpleCPU::isCpuDrained ( ) const

inlineprotected

Check if a system is in a drained state.

We need to drain if:

• We are in the middle of a microcode sequence as some CPUs (e.g., HW accelerated CPUs) can't be started in the middle of a gem5 microcode sequence.

• The CPU is in a LLSC region. This shouldn't normally happen as these are executed atomically within a single tick() call. The only way this can happen at the moment is if there is an event in the PC event queue that affects the CPU state while it is in an LLSC region.

• Stay at PC is true.

Definition at line 92 of file atomic.hh.

References gem5::BaseSimpleCPU::curThread, locked, gem5::PCStateBase::microPC(), gem5::SimpleThread::pcState(), gem5::SimpleExecContext::stayAtPC, gem5::SimpleExecContext::thread, and gem5::BaseSimpleCPU::threadInfo.

Referenced by drain(), switchOut(), and tryCompleteDrain().

printAddr()

void gem5::AtomicSimpleCPU::printAddr

(

Addr

a

)

Print state of address in memory system via PrintReq (for debugging).

Definition at line 770 of file atomic.cc.

References gem5::ArmISA::a, dcachePort, and gem5::RequestPort::printAddr().

readMem()

Fault gem5::AtomicSimpleCPU::readMem ( Addr  addr, uint8_t *  data, unsigned  size, Request::Flags  flags, const std::vector< bool > &  byte_enable = std::vector<bool>()  )

overridevirtual

Reimplemented from gem5::BaseSimpleCPU.

Definition at line 363 of file atomic.cc.

References gem5::X86ISA::addr, gem5::BaseSimpleCPU::curThread, data, data_read_req, gem5::Packet::dataStatic(), dcache_access, dcache_latency, dcachePort, genMemFragmentRequest(), gem5::SimpleThread::getIsaPtr(), gem5::SimpleThread::getTC(), gem5::BaseISA::handleLockedRead(), gem5::Packet::isError(), locked, gem5::Packet::makeReadCmd(), gem5::SimpleThread::mmu, gem5::Request::NO_ACCESS, gem5::NoFault, gem5::BaseMMU::Read, sendPacket(), gem5::Trace::InstRecord::setMem(), gem5::SimpleExecContext::thread, gem5::BaseSimpleCPU::threadInfo, gem5::BaseSimpleCPU::traceData, and gem5::BaseMMU::translateAtomic().

regProbePoints()

void gem5::AtomicSimpleCPU::regProbePoints ( )

override

Definition at line 761 of file atomic.cc.

References ppCommit.

sendPacket()

Tick gem5::AtomicSimpleCPU::sendPacket ( RequestPort &  port, const PacketPtr &  pkt  )

protectedvirtual

Reimplemented in gem5::NonCachingSimpleCPU.

Definition at line 273 of file atomic.cc.

References gem5::RequestPort::sendAtomic().

Referenced by amoMem(), fetchInstMem(), readMem(), and writeMem().

suspendContext()

void gem5::AtomicSimpleCPU::suspendContext ( ThreadID  thread_num )

override

Definition at line 247 of file atomic.cc.

References gem5::BaseSimpleCPU::_status, gem5::BaseSimpleCPU::activeThreads, DPRINTF, gem5::BaseSimpleCPU::Idle, gem5::BaseSimpleCPU::Running, gem5::Event::scheduled(), gem5::BaseSimpleCPU::threadInfo, and tickEvent.

switchOut()

void gem5::AtomicSimpleCPU::switchOut ( )

override

Definition at line 193 of file atomic.cc.

References gem5::BaseSimpleCPU::_status, gem5::BaseSimpleCPU::Idle, isCpuDrained(), gem5::BaseSimpleCPU::Running, gem5::Event::scheduled(), and tickEvent.

takeOverFrom()

void gem5::AtomicSimpleCPU::takeOverFrom ( BaseCPU *  old_cpu )

override

Definition at line 204 of file atomic.cc.

References gem5::Event::scheduled(), gem5::takeOverFrom(), and tickEvent.

threadSnoop()

void gem5::AtomicSimpleCPU::threadSnoop ( PacketPtr  pkt, ThreadID  sender  )

protected

Perform snoop for other cpu-local thread contexts.

Definition at line 125 of file atomic.cc.

References gem5::AtomicSimpleCPU::AtomicCPUDPort::cacheBlockMask, gem5::Packet::cmdString(), dcachePort, DPRINTF, gem5::Packet::getAddr(), gem5::BaseSimpleCPU::threadInfo, and gem5::BaseSimpleCPU::wakeup().

Referenced by writeMem().

tick()

void gem5::AtomicSimpleCPU::tick ( )

protected

Definition at line 613 of file atomic.cc.

References gem5::BaseSimpleCPU::_status, gem5::BaseSimpleCPU::advancePC(), gem5::BaseSimpleCPU::checkForInterrupts(), gem5::BaseSimpleCPU::checkPcEventQueue(), gem5::BaseSimpleCPU::countInst(), gem5::BaseSimpleCPU::curMacroStaticInst, gem5::BaseSimpleCPU::curStaticInst, gem5::BaseSimpleCPU::curThread, gem5::curTick(), data_amo_req, data_read_req, data_write_req, dcache_access, dcache_latency, gem5::divCeil(), DPRINTF, gem5::BaseMMU::Execute, gem5::StaticInst::execute(), fetchInstMem(), gem5::SimpleThread::getTC(), gem5::ArmISA::i, gem5::BaseSimpleCPU::Idle, ifetch_req, gem5::StaticInst::isDelayedCommit(), gem5::StaticInst::isFirstMicroop(), gem5::StaticInst::isMicroop(), gem5::isRomMicroPC(), locked, gem5::SimpleThread::mmu, gem5::NoFault, gem5::MipsISA::pc, gem5::SimpleThread::pcState(), gem5::BaseSimpleCPU::postExecute(), ppCommit, gem5::BaseSimpleCPU::preExecute(), gem5::BaseSimpleCPU::serviceInstCountEvents(), gem5::BaseSimpleCPU::setupFetchRequest(), simulate_data_stalls, simulate_inst_stalls, gem5::SimpleExecContext::stayAtPC, gem5::BaseSimpleCPU::swapActiveThread(), gem5::SimpleExecContext::thread, gem5::BaseSimpleCPU::threadInfo, tickEvent, gem5::BaseSimpleCPU::traceData, gem5::BaseSimpleCPU::traceFault(), gem5::BaseMMU::translateAtomic(), tryCompleteDrain(), and width.

Referenced by AtomicSimpleCPU().

tryCompleteDrain()

bool gem5::AtomicSimpleCPU::tryCompleteDrain ( )

protected

Try to complete a drain request.

Returns

true if the CPU is drained, false otherwise.

Definition at line 176 of file atomic.cc.

References DPRINTF, gem5::Draining, and isCpuDrained().

Referenced by tick().

verifyMemoryMode()

void gem5::AtomicSimpleCPU::verifyMemoryMode ( ) const

override

Definition at line 213 of file atomic.cc.

References fatal_if, and gem5::X86ISA::system.

Referenced by drainResume().

writeMem()

Fault gem5::AtomicSimpleCPU::writeMem ( uint8_t *  data, unsigned  size, Addr  addr, Request::Flags  flags, uint64_t *  res, const std::vector< bool > &  byte_enable = std::vector<bool>()  )

overridevirtual

Reimplemented from gem5::BaseSimpleCPU.

Definition at line 440 of file atomic.cc.

References gem5::X86ISA::addr, gem5::AtomicSimpleCPU::AtomicCPUDPort::cacheBlockMask, gem5::BaseSimpleCPU::curThread, data, data_write_req, gem5::Packet::dataStatic(), dcache_access, dcache_latency, dcachePort, genMemFragmentRequest(), gem5::Packet::getConstPtr(), gem5::SimpleThread::getIsaPtr(), gem5::SimpleThread::getTC(), gem5::BaseISA::handleLockedWrite(), gem5::Packet::isError(), locked, gem5::Packet::makeWriteCmd(), gem5::SimpleThread::mmu, gem5::Request::NO_ACCESS, gem5::NoFault, sendPacket(), gem5::Trace::InstRecord::setMem(), gem5::Request::STORE_NO_DATA, gem5::SimpleExecContext::thread, gem5::BaseSimpleCPU::threadInfo, threadSnoop(), gem5::BaseSimpleCPU::traceData, gem5::BaseMMU::translateAtomic(), and gem5::BaseMMU::Write.

Member Data Documentation

data_amo_req

RequestPtr gem5::AtomicSimpleCPU::data_amo_req

protected

Definition at line 168 of file atomic.hh.

Referenced by amoMem(), init(), and tick().

data_read_req

RequestPtr gem5::AtomicSimpleCPU::data_read_req

protected

Definition at line 166 of file atomic.hh.

Referenced by init(), readMem(), and tick().

data_write_req

RequestPtr gem5::AtomicSimpleCPU::data_write_req

protected

Definition at line 167 of file atomic.hh.

Referenced by init(), tick(), and writeMem().

dcache_access

bool gem5::AtomicSimpleCPU::dcache_access

protected

Definition at line 170 of file atomic.hh.

Referenced by amoMem(), readMem(), tick(), and writeMem().

dcache_latency

Tick gem5::AtomicSimpleCPU::dcache_latency

protected

Definition at line 171 of file atomic.hh.

Referenced by amoMem(), readMem(), tick(), and writeMem().

dcachePort

AtomicCPUDPort gem5::AtomicSimpleCPU::dcachePort

protected

Definition at line 162 of file atomic.hh.

Referenced by amoMem(), getDataPort(), printAddr(), readMem(), threadSnoop(), and writeMem().

icachePort

AtomicCPUPort gem5::AtomicSimpleCPU::icachePort

protected

Definition at line 161 of file atomic.hh.

Referenced by fetchInstMem(), and getInstPort().

ifetch_req

RequestPtr gem5::AtomicSimpleCPU::ifetch_req

protected

Definition at line 165 of file atomic.hh.

Referenced by gem5::NonCachingSimpleCPU::fetchInstMem(), fetchInstMem(), init(), and tick().

locked

bool gem5::AtomicSimpleCPU::locked

protected

Definition at line 66 of file atomic.hh.

Referenced by isCpuDrained(), readMem(), tick(), and writeMem().

ppCommit

ProbePointArg<std::pair<SimpleThread *, const StaticInstPtr> >* gem5::AtomicSimpleCPU::ppCommit

protected

Probe Points.

Definition at line 174 of file atomic.hh.

Referenced by regProbePoints(), and tick().

simulate_data_stalls

const bool gem5::AtomicSimpleCPU::simulate_data_stalls

protected

Definition at line 67 of file atomic.hh.

Referenced by tick().

simulate_inst_stalls

const bool gem5::AtomicSimpleCPU::simulate_inst_stalls

protected

Definition at line 68 of file atomic.hh.

Referenced by tick().

tickEvent

EventFunctionWrapper gem5::AtomicSimpleCPU::tickEvent

protected

Definition at line 63 of file atomic.hh.

Referenced by activateContext(), drain(), drainResume(), suspendContext(), switchOut(), takeOverFrom(), tick(), and ~AtomicSimpleCPU().

width

const int gem5::AtomicSimpleCPU::width

protected

Definition at line 65 of file atomic.hh.

Referenced by tick().

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The documentation for this class was generated from the following files:

• cpu/simple/atomic.hh
• cpu/simple/atomic.cc