gem5::ArmISA::TLBIMVA Class Reference

TLB Invalidate by VA. More...

#include <tlbi_op.hh>

Inheritance diagram for gem5::ArmISA::TLBIMVA:

Public Member Functions
	TLBIMVA (TranslationRegime _target_regime, SecurityState _ss, Addr _addr, uint16_t _asid, bool last_level, Attr _attr=Attr::None)
void	operator() (ThreadContext *tc) override
bool	matchEntry (TlbEntry *entry, vmid_t curr_vmid) const override
Public Member Functions inherited from gem5::ArmISA::TLBIOp
	TLBIOp (TranslationRegime _target_regime, SecurityState _ss, Attr _attr)
virtual	~TLBIOp ()
void	broadcast (ThreadContext *tc)
	Broadcast the TLB Invalidate operation to all TLBs in the Arm system.
bool	match (TlbEntry *entry, vmid_t curr_vmid) const
virtual bool	stage1Flush () const
	Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract class.
virtual bool	stage2Flush () const
	Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class.

Public Attributes
Addr	addr
uint16_t	asid
bool	lastLevel
Public Attributes inherited from gem5::ArmISA::TLBIOp
SecurityState	ss
TranslationRegime	targetRegime
Attr	attr

Protected Member Functions
TlbEntry::KeyType	lookupGen (vmid_t vmid) const

Additional Inherited Members
Public Types inherited from gem5::ArmISA::TLBIOp
enum class	Attr { None , ExcludeXS }

Detailed Description

TLB Invalidate by VA.

Definition at line 299 of file tlbi_op.hh.

Constructor & Destructor Documentation

TLBIMVA()

gem5::ArmISA::TLBIMVA::TLBIMVA ( TranslationRegime  _target_regime, SecurityState  _ss, Addr  _addr, uint16_t  _asid, bool  last_level, Attr  _attr = Attr::None  )

inline

Definition at line 305 of file tlbi_op.hh.

Member Function Documentation

lookupGen()

TlbEntry::KeyType gem5::ArmISA::TLBIMVA::lookupGen ( vmid_t  vmid ) const

protected

Definition at line 243 of file tlbi_op.cc.

References addr, asid, gem5::ArmISA::TLBTypes::KeyType::asn, gem5::ArmISA::TLBTypes::KeyType::functional, gem5::ArmISA::TLBTypes::KeyType::ignoreAsn, gem5::ArmISA::TLBTypes::KeyType::mode, gem5::BaseMMU::Read, gem5::ArmISA::TLBTypes::KeyType::ss, gem5::ArmISA::TLBIOp::ss, gem5::ArmISA::TLBTypes::KeyType::targetRegime, gem5::ArmISA::TLBIOp::targetRegime, gem5::ArmISA::TLBTypes::KeyType::va, and gem5::ArmISA::TLBTypes::KeyType::vmid.

Referenced by matchEntry(), and gem5::ArmISA::TLBIRMVA::matchEntry().

matchEntry()

bool gem5::ArmISA::TLBIMVA::matchEntry ( TlbEntry *  entry, vmid_t  curr_vmid  ) const

overridevirtual

Implements gem5::ArmISA::TLBIOp.

Reimplemented in gem5::ArmISA::TLBIRMVA.

Definition at line 270 of file tlbi_op.cc.

References lastLevel, lookupGen(), and gem5::ArmISA::te.

Referenced by gem5::ArmISA::ITLBIMVA::matchEntry(), and gem5::ArmISA::DTLBIMVA::matchEntry().

operator()()

void gem5::ArmISA::TLBIMVA::operator() ( ThreadContext *  tc )

overridevirtual

Reimplemented from gem5::ArmISA::TLBIOp.

Definition at line 259 of file tlbi_op.cc.

References gem5::ArmISA::MMU::flushStage1(), gem5::ThreadContext::getCheckerCpuPtr(), and gem5::ArmISA::getMMUPtr().

Member Data Documentation

addr

Addr gem5::ArmISA::TLBIMVA::addr

Definition at line 316 of file tlbi_op.hh.

Referenced by lookupGen().

asid

uint16_t gem5::ArmISA::TLBIMVA::asid

Definition at line 317 of file tlbi_op.hh.

Referenced by lookupGen().

lastLevel

bool gem5::ArmISA::TLBIMVA::lastLevel

Definition at line 318 of file tlbi_op.hh.

Referenced by matchEntry(), and gem5::ArmISA::TLBIRMVA::matchEntry().

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The documentation for this class was generated from the following files:

• arch/arm/tlbi_op.hh
• arch/arm/tlbi_op.cc