gem5::PciBus Class Reference

A PCI bus is a non-coherent crossbar with a special port that is used to catch configuration accesses that do not map to any device. More...

#include <bus.hh>

Inheritance diagram for gem5::PciBus:

Public Member Functions
	PARAMS (PciBus)
	PciBus (const Params &p)
Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	A function used to return the port associated with this object.
Public Member Functions inherited from gem5::NoncoherentXBar
	NoncoherentXBar (const NoncoherentXBarParams &p)
virtual	~NoncoherentXBar ()
Public Member Functions inherited from gem5::BaseXBar
virtual	~BaseXBar ()
void	regStats () override
	Callback to set stat parameters.
Public Member Functions inherited from gem5::ClockedObject
	ClockedObject (const ClockedObjectParams &p)
void	serialize (CheckpointOut &cp) const override
	Serialize an object.
void	unserialize (CheckpointIn &cp) override
	Unserialize an object.
Public Member Functions inherited from gem5::SimObject
const Params &	params () const
	SimObject (const Params &p)
virtual	~SimObject ()
virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected.
virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.
virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.
virtual void	regProbePoints ()
	Register probe points for this object.
virtual void	regProbeListeners ()
	Register probe listeners for this object.
ProbeManager *	getProbeManager ()
	Get the probe manager for this object.
virtual void	startup ()
	startup() is the final initialization call before simulation.
DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.
virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.
virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.
void	serialize (CheckpointOut &cp) const override
	Serialize an object.
void	unserialize (CheckpointIn &cp) override
	Unserialize an object.
Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const
void	schedule (Event &event, Tick when)
void	deschedule (Event &event)
void	reschedule (Event &event, Tick when, bool always=false)
void	schedule (Event *event, Tick when)
void	deschedule (Event *event)
void	reschedule (Event *event, Tick when, bool always=false)
void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.
void	setCurTick (Tick newVal)
	EventManager (EventManager &em)
	Event manger manages events in the event queue.
	EventManager (EventManager *em)
	EventManager (EventQueue *eq)
Public Member Functions inherited from gem5::Serializable
	Serializable ()
virtual	~Serializable ()
void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.
void	serializeSection (CheckpointOut &cp, const std::string &name) const
void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.
void	unserializeSection (CheckpointIn &cp, const std::string &name)
Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.
virtual void	notifyFork ()
	Notify a child process of a fork.
Public Member Functions inherited from gem5::statistics::Group
	Group (Group *parent, const char *name=nullptr)
	Construct a new statistics group.
virtual	~Group ()
virtual void	resetStats ()
	Callback to reset stats.
virtual void	preDumpStats ()
	Callback before stats are dumped.
void	addStat (statistics::Info *info)
	Register a stat with this group.
const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.
const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.
void	addStatGroup (const char *name, Group *block)
	Add a stat block as a child of this block.
const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.
void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.
	Group ()=delete
	Group (const Group &)=delete
Group &	operator= (const Group &)=delete
Public Member Functions inherited from gem5::Named
	Named (std::string_view name_)
virtual	~Named ()=default
virtual std::string	name () const
Public Member Functions inherited from gem5::Clocked
void	updateClockPeriod ()
	Update the tick to the current tick.
Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.
Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge.
Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.
uint64_t	frequency () const
Tick	clockPeriod () const
double	voltage () const
Cycles	ticksToCycles (Tick t) const
Tick	cyclesToTicks (Cycles c) const

Protected Member Functions
void	recvRangeChange (PortID mem_side_port_id) override
	Function called by the port when the crossbar is recieving a range change.
PortID	findPort (AddrRange addr_range, PacketPtr pkt=nullptr) override
	Find which port connected to this crossbar (if any) should be given a packet with this address range.
Protected Member Functions inherited from gem5::NoncoherentXBar
virtual bool	recvTimingReq (PacketPtr pkt, PortID cpu_side_port_id)
virtual bool	recvTimingResp (PacketPtr pkt, PortID mem_side_port_id)
void	recvReqRetry (PortID mem_side_port_id)
Tick	recvAtomicBackdoor (PacketPtr pkt, PortID cpu_side_port_id, MemBackdoorPtr *backdoor=nullptr)
void	recvFunctional (PacketPtr pkt, PortID cpu_side_port_id)
void	recvMemBackdoorReq (const MemBackdoorReq &req, MemBackdoorPtr &backdoor)
Protected Member Functions inherited from gem5::BaseXBar
PortID	findPort (PacketPtr pkt)
AddrRangeList	getAddrRanges () const
	Return the address ranges the crossbar is responsible for.
void	calcPacketTiming (PacketPtr pkt, Tick header_delay)
	Calculate the timing parameters for the packet.
	BaseXBar (const BaseXBarParams &p)
Protected Member Functions inherited from gem5::Drainable
	Drainable ()
virtual	~Drainable ()
virtual void	drainResume ()
	Resume execution after a successful drain.
void	signalDrainDone () const
	Signal that an object is drained.
Protected Member Functions inherited from gem5::Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters.
	Clocked (Clocked &)=delete
Clocked &	operator= (Clocked &)=delete
virtual	~Clocked ()
	Virtual destructor due to inheritance.
void	resetClock () const
	Reset the object's clock using the current global tick value.
virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.

Protected Attributes
PortID	configErrorPortID
AddrRange	configRange
Protected Attributes inherited from gem5::NoncoherentXBar
std::vector< ReqLayer * >	reqLayers
	Declare the layers of this crossbar, one vector for requests and one for responses.
std::vector< RespLayer * >	respLayers
Protected Attributes inherited from gem5::BaseXBar
const Cycles	frontendLatency
	Cycles of front-end pipeline including the delay to accept the request and to decode the address.
const Cycles	forwardLatency
const Cycles	responseLatency
const Cycles	headerLatency
	Cycles the layer is occupied processing the packet header.
const uint32_t	width
	the width of the xbar in bytes
AddrRangeMap< PortID, 3 >	portMap
std::unordered_map< RequestPtr, PortID >	routeTo
	Remember where request packets came from so that we can route responses to the appropriate port.
AddrRangeList	xbarRanges
	all contigous ranges seen by this crossbar
AddrRange	defaultRange
std::vector< bool >	gotAddrRanges
	Remember for each of the memory-side ports of the crossbar if we got an address range from the connected CPU-side ports.
bool	gotAllAddrRanges
std::vector< QueuedResponsePort * >	cpuSidePorts
	The memory-side ports and CPU-side ports of the crossbar.
std::vector< RequestPort * >	memSidePorts
PortID	defaultPortID
	Port that handles requests that don't match any of the interfaces.
const bool	useDefaultRange
	If true, use address range provided by default device.
statistics::Vector	transDist
	Stats for transaction distribution and data passing through the crossbar.
statistics::Vector2d	pktCount
statistics::Vector2d	pktSize
Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.
Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Additional Inherited Members
Public Types inherited from gem5::ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject.
Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params
Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.
static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.
static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.
static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.
Public Attributes inherited from gem5::ClockedObject
PowerState *	powerState

Detailed Description

A PCI bus is a non-coherent crossbar with a special port that is used to catch configuration accesses that do not map to any device.

Such accesses are forwarded to a PciConfigError device that will respond with an error code.

The default port must be connected to the bridge going from downstream to upstream.

Definition at line 56 of file bus.hh.

Constructor & Destructor Documentation

PciBus()

gem5::PciBus::PciBus

(

const Params &

p

)

Definition at line 47 of file bus.cc.

References configErrorPortID, gem5::csprintf(), gem5::BaseXBar::memSidePorts, name(), gem5::NoncoherentXBar::NoncoherentXBar(), gem5::MipsISA::p, and gem5::NoncoherentXBar::reqLayers.

Referenced by PARAMS().

Member Function Documentation

findPort()

PortID gem5::PciBus::findPort ( AddrRange addr_range, PacketPtr pkt = nullptr )

overrideprotectedvirtual

Find which port connected to this crossbar (if any) should be given a packet with this address range.

Parameters

addr_range	Address range to find port for.
pkt	Packet that containing the address range.

Returns

id of port that the packet should be sent ou of.

Reimplemented from gem5::BaseXBar.

Definition at line 85 of file bus.cc.

References configErrorPortID, configRange, gem5::BaseXBar::defaultPortID, gem5::BaseXBar::findPort(), and gem5::AddrRange::isSubset().

getPort()

Port & gem5::PciBus::getPort ( const std::string & if_name, PortID idx = InvalidPortID )

overridevirtual

A function used to return the port associated with this object.

Reimplemented from gem5::BaseXBar.

Definition at line 60 of file bus.cc.

References configErrorPortID, gem5::BaseXBar::getPort(), and gem5::BaseXBar::memSidePorts.

PARAMS()

gem5::PciBus::PARAMS

(

PciBus

)

References gem5::InvalidPortID, gem5::MipsISA::p, and PciBus().

recvRangeChange()

void gem5::PciBus::recvRangeChange ( PortID mem_side_port_id )

overrideprotectedvirtual

Function called by the port when the crossbar is recieving a range change.

Function called by the port when the crossbar is receiving a range change.

Parameters

mem_side_port_id

id of the port that received the change

Reimplemented from gem5::BaseXBar.

Definition at line 70 of file bus.cc.

References configErrorPortID, configRange, DPRINTF, gem5::BaseXBar::memSidePorts, and gem5::BaseXBar::recvRangeChange().

Member Data Documentation

configErrorPortID

PortID gem5::PciBus::configErrorPortID

protected

Definition at line 70 of file bus.hh.

Referenced by findPort(), getPort(), PciBus(), and recvRangeChange().

configRange

AddrRange gem5::PciBus::configRange

protected

Definition at line 71 of file bus.hh.

Referenced by findPort(), and recvRangeChange().

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The documentation for this class was generated from the following files:

• dev/pci/bus.hh
• dev/pci/bus.cc