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gem5 [DEVELOP-FOR-25.0]
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#include <VIPERSequencer.hh>
Public Types | |
| typedef VIPERSequencerParams | Params |
Public Types inherited from gem5::ruby::Sequencer | |
| typedef RubySequencerParams | Params |
Public Types inherited from gem5::ruby::RubyPort | |
| typedef RubyPortParams | Params |
Public Types inherited from gem5::ClockedObject | |
| using | Params = ClockedObjectParams |
| Parameters of ClockedObject. | |
Public Types inherited from gem5::SimObject | |
| typedef SimObjectParams | Params |
Public Member Functions | |
| VIPERSequencer (const Params &p) | |
| ~VIPERSequencer () | |
Public Member Functions inherited from gem5::ruby::Sequencer | |
| Sequencer (const Params &) | |
| ~Sequencer () | |
| void | writeCallbackScFail (Addr address, DataBlock &data) |
| Proxy function to writeCallback that first invalidates the line address in the local monitor. | |
| virtual void | wakeup () |
| void | resetStats () override |
| Callback to reset stats. | |
| void | collateStats () |
| void | writeCallback (Addr address, DataBlock &data, const bool externalHit=false, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0), const bool noCoales=false) |
| void | writeUniqueCallback (Addr address, DataBlock &data) |
| void | readCallback (Addr address, DataBlock &data, const bool externalHit=false, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0)) |
| void | atomicCallback (Addr address, DataBlock &data, const bool externalHit=false, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0)) |
| void | unaddressedCallback (Addr unaddressedReqId, RubyRequestType requestType, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0)) |
| void | completeHitCallback (std::vector< PacketPtr > &list) |
| void | invL1Callback () |
| void | invL1 () |
| RequestStatus | makeRequest (PacketPtr pkt) override |
| virtual bool | empty () const |
| int | outstandingCount () const override |
| bool | isDeadlockEventScheduled () const override |
| void | descheduleDeadlockEvent () override |
| virtual void | print (std::ostream &out) const |
| void | markRemoved () |
| void | evictionCallback (Addr address) |
| int | coreId () const |
| virtual int | functionalWrite (Packet *func_pkt) override |
| void | recordRequestType (SequencerRequestType requestType) |
| statistics::Histogram & | getOutstandReqHist () |
| statistics::Histogram & | getLatencyHist () |
| statistics::Histogram & | getTypeLatencyHist (uint32_t t) |
| statistics::Histogram & | getHitLatencyHist () |
| statistics::Histogram & | getHitTypeLatencyHist (uint32_t t) |
| statistics::Histogram & | getHitMachLatencyHist (uint32_t t) |
| statistics::Histogram & | getHitTypeMachLatencyHist (uint32_t r, uint32_t t) |
| statistics::Histogram & | getMissLatencyHist () |
| statistics::Histogram & | getMissTypeLatencyHist (uint32_t t) |
| statistics::Histogram & | getMissMachLatencyHist (uint32_t t) const |
| statistics::Histogram & | getMissTypeMachLatencyHist (uint32_t r, uint32_t t) const |
| statistics::Histogram & | getIssueToInitialDelayHist (uint32_t t) const |
| statistics::Histogram & | getInitialToForwardDelayHist (const MachineType t) const |
| statistics::Histogram & | getForwardRequestToFirstResponseHist (const MachineType t) const |
| statistics::Histogram & | getFirstResponseToCompletionDelayHist (const MachineType t) const |
| statistics::Counter | getIncompleteTimes (const MachineType t) const |
| bool | llscCheckMonitor (const Addr) |
| Searches for cache line address in the global monitor tagged with this Sequencer object's version id. | |
| void | llscClearLocalMonitor () |
| Removes all addresses from the local monitor. | |
Public Member Functions inherited from gem5::ruby::RubyPort | |
| RubyPort (const Params &p) | |
| virtual | ~RubyPort () |
| void | init () override |
| init() is called after all C++ SimObjects have been created and all ports are connected. | |
| Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
| Get a port with a given name and index. | |
| void | setController (AbstractController *_cntrl) |
| uint32_t | getId () |
| DrainState | drain () override |
| Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight. | |
| bool | isCPUSequencer () |
| Addr | getOffset (Addr addr) const |
| Addr | makeLineAddress (Addr addr) const |
| std::string | printAddress (Addr addr) const |
Public Member Functions inherited from gem5::ClockedObject | |
| ClockedObject (const ClockedObjectParams &p) | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. | |
Public Member Functions inherited from gem5::SimObject | |
| const Params & | params () const |
| SimObject (const Params &p) | |
| virtual | ~SimObject () |
| virtual void | loadState (CheckpointIn &cp) |
| loadState() is called on each SimObject when restoring from a checkpoint. | |
| virtual void | initState () |
| initState() is called on each SimObject when not restoring from a checkpoint. | |
| virtual void | regProbePoints () |
| Register probe points for this object. | |
| virtual void | regProbeListeners () |
| Register probe listeners for this object. | |
| ProbeManager * | getProbeManager () |
| Get the probe manager for this object. | |
| virtual void | startup () |
| startup() is the final initialization call before simulation. | |
| DrainState | drain () override |
| Provide a default implementation of the drain interface for objects that don't need draining. | |
| virtual void | memWriteback () |
| Write back dirty buffers to memory using functional writes. | |
| virtual void | memInvalidate () |
| Invalidate the contents of memory buffers. | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. | |
Public Member Functions inherited from gem5::EventManager | |
| EventQueue * | eventQueue () const |
| void | schedule (Event &event, Tick when) |
| void | deschedule (Event &event) |
| void | reschedule (Event &event, Tick when, bool always=false) |
| void | schedule (Event *event, Tick when) |
| void | deschedule (Event *event) |
| void | reschedule (Event *event, Tick when, bool always=false) |
| void | wakeupEventQueue (Tick when=(Tick) -1) |
| This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
| void | setCurTick (Tick newVal) |
| EventManager (EventManager &em) | |
| Event manger manages events in the event queue. | |
| EventManager (EventManager *em) | |
| EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
| Serializable () | |
| virtual | ~Serializable () |
| void | serializeSection (CheckpointOut &cp, const char *name) const |
| Serialize an object into a new section. | |
| void | serializeSection (CheckpointOut &cp, const std::string &name) const |
| void | unserializeSection (CheckpointIn &cp, const char *name) |
| Unserialize an a child object. | |
| void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
| DrainState | drainState () const |
| Return the current drain state of an object. | |
| virtual void | notifyFork () |
| Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
| Group (Group *parent, const char *name=nullptr) | |
| Construct a new statistics group. | |
| virtual | ~Group () |
| virtual void | regStats () |
| Callback to set stat parameters. | |
| virtual void | preDumpStats () |
| Callback before stats are dumped. | |
| void | addStat (statistics::Info *info) |
| Register a stat with this group. | |
| const std::map< std::string, Group * > & | getStatGroups () const |
| Get all child groups associated with this object. | |
| const std::vector< Info * > & | getStats () const |
| Get all stats associated with this object. | |
| void | addStatGroup (const char *name, Group *block) |
| Add a stat block as a child of this block. | |
| const Info * | resolveStat (std::string name) const |
| Resolve a stat by its name within this group. | |
| void | mergeStatGroup (Group *block) |
| Merge the contents (stats & children) of a block to this block. | |
| Group ()=delete | |
| Group (const Group &)=delete | |
| Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
| Named (std::string_view name_) | |
| virtual | ~Named ()=default |
| virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
| void | updateClockPeriod () |
| Update the tick to the current tick. | |
| Tick | clockEdge (Cycles cycles=Cycles(0)) const |
| Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. | |
| Cycles | curCycle () const |
| Determine the current cycle, corresponding to a tick aligned to a clock edge. | |
| Tick | nextCycle () const |
| Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. | |
| uint64_t | frequency () const |
| Tick | clockPeriod () const |
| double | voltage () const |
| Cycles | ticksToCycles (Tick t) const |
| Tick | cyclesToTicks (Cycles c) const |
Private Member Functions | |
| void | hitCallback (SequencerRequest *srequest, DataBlock &data, bool llscSuccess, const MachineType mach, const bool externalHit, const Cycles initialRequestTime, const Cycles forwardRequestTime, const Cycles firstResponseTime, const bool was_coalesced) |
| bool | processReadCallback (SequencerRequest &seq_req, DataBlock &data, const bool rubyRequest, bool externalHit, const MachineType mach, Cycles initialRequestTime, Cycles forwardRequestTime, Cycles firstResponseTime) |
Additional Inherited Members | |
Static Public Member Functions inherited from gem5::SimObject | |
| static void | serializeAll (const std::string &cpt_dir) |
| Create a checkpoint by serializing all SimObjects in the system. | |
| static SimObject * | find (const char *name) |
| Find the SimObject with the given name and return a pointer to it. | |
| static void | setSimObjectResolver (SimObjectResolver *resolver) |
| There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
| static SimObjectResolver * | getSimObjectResolver () |
| There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
| static const std::string & | currentSection () |
| Gets the fully-qualified name of the active section. | |
| static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
| Generate a checkpoint file so that the serialization can be routed to it. | |
Public Attributes inherited from gem5::ClockedObject | |
| PowerState * | powerState |
Protected Member Functions inherited from gem5::ruby::Sequencer | |
| void | issueRequest (PacketPtr pkt, RubyRequestType type) |
| void | recordMissLatency (SequencerRequest *srequest, bool llscSuccess, const MachineType respondingMach, bool isExternalHit, Cycles initialRequestTime, Cycles forwardRequestTime, Cycles firstResponseTime) |
| virtual RequestStatus | insertRequest (PacketPtr pkt, RubyRequestType primary_type, RubyRequestType secondary_type) |
Protected Member Functions inherited from gem5::ruby::RubyPort | |
| void | trySendRetries () |
| void | ruby_hit_callback (PacketPtr pkt) |
| void | ruby_unaddressed_callback (PacketPtr pkt) |
| void | ruby_stale_translation_callback (Addr txnId) |
| void | testDrainComplete () |
| void | ruby_eviction_callback (Addr address) |
| bool | recvTimingResp (PacketPtr pkt, PortID request_port_id) |
| Called by the PIO port when receiving a timing response. | |
Protected Member Functions inherited from gem5::Drainable | |
| Drainable () | |
| virtual | ~Drainable () |
| virtual void | drainResume () |
| Resume execution after a successful drain. | |
| void | signalDrainDone () const |
| Signal that an object is drained. | |
Protected Member Functions inherited from gem5::Clocked | |
| Clocked (ClockDomain &clk_domain) | |
| Create a clocked object and set the clock domain based on the parameters. | |
| Clocked (Clocked &)=delete | |
| Clocked & | operator= (Clocked &)=delete |
| virtual | ~Clocked () |
| Virtual destructor due to inheritance. | |
| void | resetClock () const |
| Reset the object's clock using the current global tick value. | |
| virtual void | clockPeriodUpdated () |
| A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. | |
Protected Attributes inherited from gem5::ruby::Sequencer | |
| std::unordered_map< Addr, std::list< SequencerRequest > > | m_RequestTable |
| std::unordered_map< uint64_t, SequencerRequest > | m_UnaddressedRequestTable |
| Cycles | m_deadlock_threshold |
| RubySystem * | m_ruby_system |
Protected Attributes inherited from gem5::ruby::RubyPort | |
| RubySystem * | m_ruby_system |
| uint32_t | m_version |
| AbstractController * | m_controller |
| MessageBuffer * | m_mandatory_q_ptr |
| bool | m_usingRubyTester |
| System * | system |
| std::vector< MemResponsePort * > | response_ports |
Protected Attributes inherited from gem5::SimObject | |
| const SimObjectParams & | _params |
| Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
| EventQueue * | eventq |
| A pointer to this object's event queue. | |
Definition at line 46 of file VIPERSequencer.hh.
| typedef VIPERSequencerParams gem5::ruby::VIPERSequencer::Params |
Definition at line 49 of file VIPERSequencer.hh.
| gem5::ruby::VIPERSequencer::VIPERSequencer | ( | const Params & | p | ) |
Definition at line 45 of file VIPERSequencer.cc.
References gem5::MipsISA::p, and gem5::ruby::Sequencer::Sequencer().
| gem5::ruby::VIPERSequencer::~VIPERSequencer | ( | ) |
Definition at line 51 of file VIPERSequencer.cc.
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privatevirtual |
Reimplemented from gem5::ruby::Sequencer.
Definition at line 56 of file VIPERSequencer.cc.
References gem5::Clocked::curCycle(), data, DPRINTF, gem5::Packet::findNextSenderState(), gem5::ruby::Sequencer::hitCallback(), gem5::ruby::Sequencer::m_ruby_system, gem5::ruby::SequencerRequest::m_type, gem5::ruby::RubyPort::m_usingRubyTester, gem5::ruby::SequencerRequest::pkt, gem5::ruby::RubyPort::ruby_hit_callback(), gem5::Packet::setData(), and gem5::ruby::RubyPort::testDrainComplete().
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privatevirtual |
Reimplemented from gem5::ruby::Sequencer.
Definition at line 91 of file VIPERSequencer.cc.
References data, gem5::ruby::Sequencer::issueRequest(), gem5::ruby::SequencerRequest::m_second_type, gem5::ruby::SequencerRequest::m_type, gem5::ruby::SequencerRequest::pkt, and gem5::ruby::Sequencer::processReadCallback().