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remote_gdb.cc
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39 
40 #include "arch/x86/remote_gdb.hh"
41 
42 #include <sys/signal.h>
43 #include <unistd.h>
44 
45 #include <string>
46 
47 #include "arch/x86/mmu.hh"
48 #include "arch/x86/pagetable_walker.hh"
49 #include "arch/x86/process.hh"
50 #include "arch/x86/regs/int.hh"
51 #include "arch/x86/regs/misc.hh"
52 #include "base/loader/object_file.hh"
53 #include "base/logging.hh"
54 #include "base/remote_gdb.hh"
55 #include "base/socket.hh"
56 #include "base/trace.hh"
57 #include "cpu/base.hh"
58 #include "cpu/thread_context.hh"
59 #include "debug/GDBAcc.hh"
60 #include "mem/page_table.hh"
61 #include "sim/full_system.hh"
62 #include "sim/workload.hh"
63 
64 namespace gem5
65 {
66 
67 using namespace X86ISA;
68 
69 RemoteGDB::RemoteGDB(System *_system, ListenSocketConfig _listen_config) :
70  BaseRemoteGDB(_system, _listen_config),
71  regCache32(this), regCache64(this)
72 {}
73 
74 bool
75 RemoteGDB::acc(Addr va, size_t len)
76 {
77  if (FullSystem) {
78  Walker *walker = dynamic_cast<MMU *>(
79  context()->getMMUPtr())->getDataWalker();
80  unsigned logBytes;
81  Fault fault = walker->startFunctional(context(), va, logBytes,
82  BaseMMU::Read);
83  if (fault != NoFault)
84  return false;
85 
86  Addr endVa = va + len - 1;
87  if ((va & ~mask(logBytes)) == (endVa & ~mask(logBytes)))
88  return true;
89 
90  fault = walker->startFunctional(context(), endVa, logBytes,
91  BaseMMU::Read);
92  return fault == NoFault;
93  } else {
94  return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
95  }
96 }
97 
98 BaseGdbRegCache*
99 RemoteGDB::gdbRegs()
100 {
101  // First, try to figure out which type of register cache to return based
102  // on the architecture reported by the workload.
103  if (system()->workload) {
104  auto arch = system()->workload->getArch();
105  if (arch == loader::X86_64) {
106  return &regCache64;
107  } else if (arch == loader::I386) {
108  return &regCache32;
109  } else if (arch != loader::UnknownArch) {
110  panic("Unrecognized workload arch %s.",
111  loader::archToString(arch));
112  }
113  }
114 
115  // If that didn't work, decide based on the current mode of the context.
116  HandyM5Reg m5reg = context()->readMiscRegNoEffect(misc_reg::M5Reg);
117  if (m5reg.submode == SixtyFourBitMode)
118  return &regCache64;
119  else
120  return &regCache32;
121 }
122 
123 
124 
125 void
126 RemoteGDB::AMD64GdbRegCache::getRegs(ThreadContext *context)
127 {
128  DPRINTF(GDBAcc, "getRegs in remotegdb \n");
129  r.rax = context->getReg(int_reg::Rax);
130  r.rbx = context->getReg(int_reg::Rbx);
131  r.rcx = context->getReg(int_reg::Rcx);
132  r.rdx = context->getReg(int_reg::Rdx);
133  r.rsi = context->getReg(int_reg::Rsi);
134  r.rdi = context->getReg(int_reg::Rdi);
135  r.rbp = context->getReg(int_reg::Rbp);
136  r.rsp = context->getReg(int_reg::Rsp);
137  r.r8 = context->getReg(int_reg::R8);
138  r.r9 = context->getReg(int_reg::R9);
139  r.r10 = context->getReg(int_reg::R10);
140  r.r11 = context->getReg(int_reg::R11);
141  r.r12 = context->getReg(int_reg::R12);
142  r.r13 = context->getReg(int_reg::R13);
143  r.r14 = context->getReg(int_reg::R14);
144  r.r15 = context->getReg(int_reg::R15);
145  r.rip = context->pcState().instAddr();
146  r.eflags = context->readMiscRegNoEffect(misc_reg::Rflags);
147  r.cs = context->readMiscRegNoEffect(misc_reg::Cs);
148  r.ss = context->readMiscRegNoEffect(misc_reg::Ss);
149  r.ds = context->readMiscRegNoEffect(misc_reg::Ds);
150  r.es = context->readMiscRegNoEffect(misc_reg::Es);
151  r.fs = context->readMiscRegNoEffect(misc_reg::Fs);
152  r.gs = context->readMiscRegNoEffect(misc_reg::Gs);
153 }
154 
155 void
156 RemoteGDB::X86GdbRegCache::getRegs(ThreadContext *context)
157 {
158  DPRINTF(GDBAcc, "getRegs in remotegdb \n");
159  r.eax = context->getReg(int_reg::Rax);
160  r.ecx = context->getReg(int_reg::Rcx);
161  r.edx = context->getReg(int_reg::Rdx);
162  r.ebx = context->getReg(int_reg::Rbx);
163  r.esp = context->getReg(int_reg::Rsp);
164  r.ebp = context->getReg(int_reg::Rbp);
165  r.esi = context->getReg(int_reg::Rsi);
166  r.edi = context->getReg(int_reg::Rdi);
167  r.eip = context->pcState().instAddr();
168  r.eflags = context->readMiscRegNoEffect(misc_reg::Rflags);
169  r.cs = context->readMiscRegNoEffect(misc_reg::Cs);
170  r.ss = context->readMiscRegNoEffect(misc_reg::Ss);
171  r.ds = context->readMiscRegNoEffect(misc_reg::Ds);
172  r.es = context->readMiscRegNoEffect(misc_reg::Es);
173  r.fs = context->readMiscRegNoEffect(misc_reg::Fs);
174  r.gs = context->readMiscRegNoEffect(misc_reg::Gs);
175 }
176 
177 void
178 RemoteGDB::AMD64GdbRegCache::setRegs(ThreadContext *context) const
179 {
180  DPRINTF(GDBAcc, "setRegs in remotegdb \n");
181  context->setReg(int_reg::Rax, r.rax);
182  context->setReg(int_reg::Rbx, r.rbx);
183  context->setReg(int_reg::Rcx, r.rcx);
184  context->setReg(int_reg::Rdx, r.rdx);
185  context->setReg(int_reg::Rsi, r.rsi);
186  context->setReg(int_reg::Rdi, r.rdi);
187  context->setReg(int_reg::Rbp, r.rbp);
188  context->setReg(int_reg::Rsp, r.rsp);
189  context->setReg(int_reg::R8, r.r8);
190  context->setReg(int_reg::R9, r.r9);
191  context->setReg(int_reg::R10, r.r10);
192  context->setReg(int_reg::R11, r.r11);
193  context->setReg(int_reg::R12, r.r12);
194  context->setReg(int_reg::R13, r.r13);
195  context->setReg(int_reg::R14, r.r14);
196  context->setReg(int_reg::R15, r.r15);
197  context->pcState(r.rip);
198  context->setMiscReg(misc_reg::Rflags, r.eflags);
199  if (r.cs != context->readMiscRegNoEffect(misc_reg::Cs))
200  warn("Remote gdb: Ignoring update to CS.\n");
201  if (r.ss != context->readMiscRegNoEffect(misc_reg::Ss))
202  warn("Remote gdb: Ignoring update to SS.\n");
203  if (r.ds != context->readMiscRegNoEffect(misc_reg::Ds))
204  warn("Remote gdb: Ignoring update to DS.\n");
205  if (r.es != context->readMiscRegNoEffect(misc_reg::Es))
206  warn("Remote gdb: Ignoring update to ES.\n");
207  if (r.fs != context->readMiscRegNoEffect(misc_reg::Fs))
208  warn("Remote gdb: Ignoring update to FS.\n");
209  if (r.gs != context->readMiscRegNoEffect(misc_reg::Gs))
210  warn("Remote gdb: Ignoring update to GS.\n");
211 }
212 
213 void
214 RemoteGDB::X86GdbRegCache::setRegs(ThreadContext *context) const
215 {
216  DPRINTF(GDBAcc, "setRegs in remotegdb \n");
217  context->setReg(int_reg::Rax, r.eax);
218  context->setReg(int_reg::Rcx, r.ecx);
219  context->setReg(int_reg::Rdx, r.edx);
220  context->setReg(int_reg::Rbx, r.ebx);
221  context->setReg(int_reg::Rsp, r.esp);
222  context->setReg(int_reg::Rbp, r.ebp);
223  context->setReg(int_reg::Rsi, r.esi);
224  context->setReg(int_reg::Rdi, r.edi);
225  context->pcState(r.eip);
226  context->setMiscReg(misc_reg::Rflags, r.eflags);
227  if (r.cs != context->readMiscRegNoEffect(misc_reg::Cs))
228  warn("Remote gdb: Ignoring update to CS.\n");
229  if (r.ss != context->readMiscRegNoEffect(misc_reg::Ss))
230  warn("Remote gdb: Ignoring update to SS.\n");
231  if (r.ds != context->readMiscRegNoEffect(misc_reg::Ds))
232  warn("Remote gdb: Ignoring update to DS.\n");
233  if (r.es != context->readMiscRegNoEffect(misc_reg::Es))
234  warn("Remote gdb: Ignoring update to ES.\n");
235  if (r.fs != context->readMiscRegNoEffect(misc_reg::Fs))
236  warn("Remote gdb: Ignoring update to FS.\n");
237  if (r.gs != context->readMiscRegNoEffect(misc_reg::Gs))
238  warn("Remote gdb: Ignoring update to GS.\n");
239 }
240 
241 } // namespace gem5
gem5::PCStateBase::instAddr
Addr instAddr() const
Returns the memory address of the instruction this PC points to.
Definition: pcstate.hh:107
gem5::BaseMMU::Read
@ Read
Definition: mmu.hh:56
socket.hh
gem5::SparcISA::RemoteGDB::gdbRegs
BaseGdbRegCache * gdbRegs()
gem5::NoFault
constexpr decltype(nullptr) NoFault
Definition: types.hh:253
gem5::X86ISA::misc_reg::Es
@ Es
Definition: misc.hh:307
warn
#define warn(...)
Definition: logging.hh:256
mmu.hh
gem5::X86ISA::int_reg::Rsi
constexpr RegId Rsi
Definition: int.hh:138
gem5::X86ISA::int_reg::Rbp
constexpr RegId Rbp
Definition: int.hh:137
gem5::ThreadContext::getReg
virtual RegVal getReg(const RegId &reg) const
Definition: thread_context.cc:180
remote_gdb.hh
gem5::ThreadContext::getMMUPtr
virtual BaseMMU * getMMUPtr()=0
gem5::ThreadContext::pcState
virtual const PCStateBase & pcState() const =0
gem5::loader::X86_64
@ X86_64
Definition: object_file.hh:67
pagetable_walker.hh
gem5::X86ISA::RemoteGDB::RemoteGDB
RemoteGDB(System *system, ListenSocketConfig _listen_config)
gem5::System::workload
Workload * workload
OS kernel.
Definition: system.hh:326
gem5::EmulationPageTable::lookup
const Entry * lookup(Addr vaddr)
Lookup function.
Definition: page_table.cc:133
gem5::VegaISA::r
Bitfield< 5 > r
Definition: pagetable.hh:60
gem5::SparcISA::RemoteGDB::acc
bool acc(Addr addr, size_t len)
gem5::X86ISA::SixtyFourBitMode
@ SixtyFourBitMode
Definition: types.hh:204
gem5::X86ISA::int_reg::Rcx
constexpr RegId Rcx
Definition: int.hh:133
gem5::Workload::getArch
virtual loader::Arch getArch() const =0
gem5::mask
constexpr uint64_t mask(unsigned nbits)
Generate a 64-bit mask of 'nbits' 1s, right justified.
Definition: bitfield.hh:63
gem5::ArmISA::int_reg::R8
constexpr RegId R8
Definition: int.hh:194
gem5::SparcISA::RemoteGDB::regCache64
SPARC64GdbRegCache regCache64
Definition: remote_gdb.hh:108
gem5::X86ISA::misc_reg::Rflags
@ Rflags
Definition: misc.hh:145
gem5::ArmISA::int_reg::R11
constexpr RegId R11
Definition: int.hh:197
gem5::X86ISA::int_reg::Rsp
constexpr RegId Rsp
Definition: int.hh:136
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248
workload.hh
gem5::X86ISA::int_reg::Rdx
constexpr RegId Rdx
Definition: int.hh:134
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:210
int.hh
gem5::Process::pTable
EmulationPageTable * pTable
Definition: process.hh:184
gem5::SparcISA::RemoteGDB::regCache32
SPARCGdbRegCache regCache32
Definition: remote_gdb.hh:107
gem5::ArmISA::int_reg::R10
constexpr RegId R10
Definition: int.hh:196
len
uint16_t len
Definition: helpers.cc:62
remote_gdb.hh
gem5::ArmISA::int_reg::R12
constexpr RegId R12
Definition: int.hh:198
gem5::loader::archToString
const char * archToString(Arch arch)
Definition: object_file.cc:57
gem5::ThreadContext::readMiscRegNoEffect
virtual RegVal readMiscRegNoEffect(RegIndex misc_reg) const =0
gem5::X86ISA::misc_reg::Ss
@ Ss
Definition: misc.hh:309
gem5::X86ISA::int_reg::Rbx
constexpr RegId Rbx
Definition: int.hh:135
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::ArmISA::int_reg::R14
constexpr RegId R14
Definition: int.hh:200
gem5::ArmISA::va
Bitfield< 8 > va
Definition: misc_types.hh:330
full_system.hh
gem5::ThreadContext::getProcessPtr
virtual Process * getProcessPtr()=0
gem5::FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition: root.cc:220
gem5::loader::UnknownArch
@ UnknownArch
Definition: object_file.hh:63
process.hh
base.hh
gem5::X86ISA::misc_reg::Fs
@ Fs
Definition: misc.hh:311
gem5::ThreadContext::setMiscReg
virtual void setMiscReg(RegIndex misc_reg, RegVal val)=0
gem5::X86ISA::misc_reg::Cs
@ Cs
Definition: misc.hh:308
gem5::X86ISA::int_reg::Rdi
constexpr RegId Rdi
Definition: int.hh:139
gem5::X86ISA::int_reg::Rax
constexpr RegId Rax
Definition: int.hh:132
logging.hh
gem5::ArmISA::int_reg::R15
constexpr RegId R15
Definition: int.hh:201
gem5::loader::I386
@ I386
Definition: object_file.hh:68
gem5::BaseRemoteGDB::context
ThreadContext * context()
Definition: remote_gdb.hh:443
gem5::BaseRemoteGDB::system
System * system()
Definition: remote_gdb.hh:444
trace.hh
page_table.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::X86ISA::misc_reg::M5Reg
@ M5Reg
Definition: misc.hh:148
misc.hh
object_file.hh
thread_context.hh
gem5::X86ISA::misc_reg::Ds
@ Ds
Definition: misc.hh:310
gem5::ArmISA::int_reg::R13
constexpr RegId R13
Definition: int.hh:199
gem5::X86ISA::misc_reg::Gs
@ Gs
Definition: misc.hh:312
gem5::ArmISA::int_reg::R9
constexpr RegId R9
Definition: int.hh:195
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:188
gem5::ThreadContext::setReg
virtual void setReg(const RegId &reg, RegVal val)
Definition: thread_context.cc:188
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