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intel_8254_timer.hh
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28 
29 #ifndef __DEV_8254_HH__
30 #define __DEV_8254_HH__
31 
32 #include <array>
33 #include <iostream>
34 #include <string>
35 
36 #include "base/bitunion.hh"
37 #include "base/types.hh"
38 #include "base/trace.hh"
39 #include "debug/Intel8254Timer.hh"
40 #include "sim/eventq.hh"
41 #include "sim/serialize.hh"
42 
43 namespace gem5
44 {
45 
48 {
49  protected:
50  BitUnion8(CtrlReg)
51  Bitfield<7, 6> sel;
52  Bitfield<5, 4> rw;
53  Bitfield<3, 1> mode;
54  Bitfield<0> bcd;
55  EndBitUnion(CtrlReg)
56 
57  BitUnion8(ReadBackCommandVal)
58  Bitfield<4> status; // Active low.
59  Bitfield<5> count; // Active low.
60  SubBitUnion(select, 3, 1)
61  Bitfield<3> cnt2;
62  Bitfield<2> cnt1;
63  Bitfield<1> cnt0;
65  EndBitUnion(ReadBackCommandVal)
66 
67  enum SelectVal
68  {
69  SelectCounter0,
70  SelectCounter1,
71  SelectCounter2,
72  ReadBackCommand
73  };
74 
76  {
81  };
82 
83  enum ModeVal
84  {
91  };
92 
94  class Counter
95  {
97  class CounterEvent : public Event
98  {
99  private:
103 
104  public:
106 
108  void process();
109 
111  virtual const char *description() const;
112 
113  friend class Counter;
114 
115  void setTo(int clocks);
116 
117  int clocksLeft();
118 
119  Tick getInterval();
120  };
121 
122  private:
123  std::string _name;
124  const std::string &name() const { return _name; }
125 
126  unsigned int num;
127 
129 
131  bool running;
132 
134  uint16_t initial_count;
135 
137  uint16_t latched_count;
138 
140  uint16_t period;
141 
144 
146  uint8_t mode;
147 
150 
152  bool latch_on;
153 
155  enum {LSB, MSB};
156 
159 
162 
163  public:
164  Counter(Intel8254Timer *p, const std::string &name, unsigned int num);
165 
166  unsigned int index() const { return num; }
167 
169  void latchCount();
170 
172  int currentCount();
173 
175  void setRW(int rw_val);
176 
178  void setMode(int mode_val);
179 
181  void setBCD(int bcd_val);
182 
184  uint8_t read();
185 
187  void write(const uint8_t data);
188 
190  bool outputHigh();
191 
197  void serialize(const std::string &base, CheckpointOut &cp) const;
198 
205  void unserialize(const std::string &base, CheckpointIn &cp);
206 
208  void startup();
209  };
210 
211  protected:
212  std::string _name;
213  const std::string &name() const { return _name; }
214 
216  std::array<Counter, 3> counters;
217 
218  virtual void
219  counterInterrupt(unsigned int num)
220  {
221  DPRINTF(Intel8254Timer, "Timer interrupt from counter %d.\n", num);
222  }
223 
224  public:
225 
226  virtual
228  {}
229 
230  Intel8254Timer(EventManager *em, const std::string &name);
231 
233  void writeControl(const CtrlReg data);
234 
235  uint8_t
236  readCounter(unsigned int num)
237  {
238  assert(num < 3);
239  return counters[num].read();
240  }
241 
242  void
243  writeCounter(unsigned int num, const uint8_t data)
244  {
245  assert(num < 3);
246  counters[num].write(data);
247  }
248 
249  bool
250  outputHigh(unsigned int num)
251  {
252  assert(num < 3);
253  return counters[num].outputHigh();
254  }
255 
261  void serialize(const std::string &base, CheckpointOut &cp) const;
262 
269  void unserialize(const std::string &base, CheckpointIn &cp);
270 
272  void startup();
273 };
274 
275 } // namespace gem5
276 
277 #endif // __DEV_8254_HH__
gem5::Intel8254Timer::SoftwareStrobe
@ SoftwareStrobe
Definition: intel_8254_timer.hh:89
gem5::Intel8254Timer::SubBitUnion
SubBitUnion(select, 3, 1) Bitfield< 3 > cnt2
gem5::Intel8254Timer::Counter::MSB
@ MSB
Definition: intel_8254_timer.hh:155
data
const char data[]
Definition: circlebuf.test.cc:48
serialize.hh
gem5::Intel8254Timer::Counter::latchCount
void latchCount()
Latch the current count (if one is not already latched)
Definition: intel_8254_timer.cc:113
gem5::Intel8254Timer::mode
Bitfield< 3, 1 > mode
Definition: intel_8254_timer.hh:53
gem5::Intel8254Timer::~Intel8254Timer
virtual ~Intel8254Timer()
Definition: intel_8254_timer.hh:227
gem5::Intel8254Timer::Counter::mode
uint8_t mode
Current mode of operation.
Definition: intel_8254_timer.hh:146
gem5::Intel8254Timer
Programmable Interval Timer (Intel 8254)
Definition: intel_8254_timer.hh:47
gem5::Intel8254Timer::RateGen
@ RateGen
Definition: intel_8254_timer.hh:87
gem5::Intel8254Timer::Counter::CounterEvent::interval
Tick interval
Definition: intel_8254_timer.hh:102
gem5::Intel8254Timer::_name
std::string _name
Definition: intel_8254_timer.hh:212
gem5::Intel8254Timer::Counter::CounterEvent::process
void process()
Event process.
Definition: intel_8254_timer.cc:287
gem5::Intel8254Timer::Counter::_name
std::string _name
Definition: intel_8254_timer.hh:123
gem5::Intel8254Timer::Counter::currentCount
int currentCount()
Get the current count for this counter.
Definition: intel_8254_timer.cc:124
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::Intel8254Timer::bcd
Bitfield< 0 > bcd
Definition: intel_8254_timer.hh:54
gem5::Intel8254Timer::startup
void startup()
Start ticking.
Definition: intel_8254_timer.cc:95
gem5::Intel8254Timer::writeCounter
void writeCounter(unsigned int num, const uint8_t data)
Definition: intel_8254_timer.hh:243
gem5::Intel8254Timer::LatchCommand
@ LatchCommand
Definition: intel_8254_timer.hh:77
gem5::Intel8254Timer::Counter
Counter element for PIT.
Definition: intel_8254_timer.hh:94
gem5::Intel8254Timer::Counter::CounterEvent::counter
Counter * counter
Pointer back to Counter.
Definition: intel_8254_timer.hh:101
gem5::X86ISA::base
Bitfield< 51, 12 > base
Definition: pagetable.hh:141
gem5::Intel8254Timer::Counter::CounterEvent::CounterEvent
CounterEvent(Counter *)
Definition: intel_8254_timer.cc:280
gem5::Intel8254Timer::Counter::name
const std::string & name() const
Definition: intel_8254_timer.hh:124
gem5::Intel8254Timer::EndBitUnion
EndBitUnion(CtrlReg) BitUnion8(ReadBackCommandVal) Bitfield< 4 > status
gem5::Intel8254Timer::BitUnion8
BitUnion8(CtrlReg) Bitfield< 7
gem5::Intel8254Timer::Counter::initial_count
uint16_t initial_count
Initial count value.
Definition: intel_8254_timer.hh:134
gem5::Intel8254Timer::counters
std::array< Counter, 3 > counters
PIT has three seperate counters.
Definition: intel_8254_timer.hh:216
gem5::Intel8254Timer::Counter::parent
Intel8254Timer * parent
Pointer to container.
Definition: intel_8254_timer.hh:161
gem5::X86ISA::em
Bitfield< 2 > em
Definition: misc.hh:607
gem5::EventManager
Definition: eventq.hh:980
gem5::Intel8254Timer::OneShot
@ OneShot
Definition: intel_8254_timer.hh:86
gem5::VegaISA::p
Bitfield< 54 > p
Definition: pagetable.hh:70
gem5::Intel8254Timer::Counter::CounterEvent::description
virtual const char * description() const
Event description.
Definition: intel_8254_timer.cc:322
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:210
gem5::Event
Definition: eventq.hh:254
gem5::Intel8254Timer::TwoPhase
@ TwoPhase
Definition: intel_8254_timer.hh:80
gem5::Intel8254Timer::Counter::setMode
void setMode(int mode_val)
Set operational mode.
Definition: intel_8254_timer.cc:211
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::Intel8254Timer::MsbOnly
@ MsbOnly
Definition: intel_8254_timer.hh:79
bitunion.hh
gem5::Intel8254Timer::Counter::num
unsigned int num
Definition: intel_8254_timer.hh:126
gem5::Intel8254Timer::EndSubBitUnion
EndSubBitUnion(select) EndBitUnion(ReadBackCommandVal) enum SelectVal
Definition: intel_8254_timer.hh:64
gem5::Intel8254Timer::counterInterrupt
virtual void counterInterrupt(unsigned int num)
Definition: intel_8254_timer.hh:219
gem5::Intel8254Timer::cnt1
Bitfield< 2 > cnt1
Definition: intel_8254_timer.hh:62
gem5::Intel8254Timer::readCounter
uint8_t readCounter(unsigned int num)
Definition: intel_8254_timer.hh:236
gem5::Intel8254Timer::outputHigh
bool outputHigh(unsigned int num)
Definition: intel_8254_timer.hh:250
gem5::Intel8254Timer::name
const std::string & name() const
Definition: intel_8254_timer.hh:213
gem5::Intel8254Timer::serialize
void serialize(const std::string &base, CheckpointOut &cp) const
Serialize this object to the given output stream.
Definition: intel_8254_timer.cc:77
gem5::Intel8254Timer::Counter::latched_count
uint16_t latched_count
Latched count.
Definition: intel_8254_timer.hh:137
gem5::Intel8254Timer::Counter::CounterEvent::clocksLeft
int clocksLeft()
Definition: intel_8254_timer.cc:314
gem5::Intel8254Timer::Counter::CounterEvent
Event for counter interrupt.
Definition: intel_8254_timer.hh:97
gem5::Intel8254Timer::ModeVal
ModeVal
Definition: intel_8254_timer.hh:83
gem5::Intel8254Timer::Counter::CounterEvent::setTo
void setTo(int clocks)
Definition: intel_8254_timer.cc:304
gem5::Intel8254Timer::Counter::read
uint8_t read()
Read a count byte.
Definition: intel_8254_timer.cc:138
gem5::Intel8254Timer::Counter::write_byte
uint8_t write_byte
Definition: intel_8254_timer.hh:158
gem5::Intel8254Timer::Counter::event
CounterEvent event
Definition: intel_8254_timer.hh:128
gem5::Intel8254Timer::count
Bitfield< 5 > count
Definition: intel_8254_timer.hh:59
gem5::Intel8254Timer::Counter::Counter
Counter(Intel8254Timer *p, const std::string &name, unsigned int num)
Definition: intel_8254_timer.cc:102
gem5::Intel8254Timer::cnt0
Bitfield< 1 > cnt0
Definition: intel_8254_timer.hh:63
gem5::Intel8254Timer::Counter::output_high
bool output_high
Output goes high when the counter reaches zero.
Definition: intel_8254_timer.hh:149
gem5::Intel8254Timer::HardwareStrobe
@ HardwareStrobe
Definition: intel_8254_timer.hh:90
gem5::Intel8254Timer::Counter::CounterEvent::getInterval
Tick getInterval()
Definition: intel_8254_timer.cc:328
gem5::Intel8254Timer::Counter::startup
void startup()
Start ticking.
Definition: intel_8254_timer.cc:271
types.hh
gem5::Intel8254Timer::Counter::LSB
@ LSB
Definition: intel_8254_timer.hh:155
gem5::Intel8254Timer::Counter::index
unsigned int index() const
Definition: intel_8254_timer.hh:166
gem5::Intel8254Timer::InitTc
@ InitTc
Definition: intel_8254_timer.hh:85
gem5::Intel8254Timer::rw
Bitfield< 5, 4 > rw
Definition: intel_8254_timer.hh:52
gem5::Intel8254Timer::SquareWave
@ SquareWave
Definition: intel_8254_timer.hh:88
gem5::Intel8254Timer::Counter::unserialize
void unserialize(const std::string &base, CheckpointIn &cp)
Reconstruct the state of this object from a checkpoint.
Definition: intel_8254_timer.cc:253
gem5::Intel8254Timer::ReadWriteVal
ReadWriteVal
Definition: intel_8254_timer.hh:75
gem5::Intel8254Timer::Counter::setRW
void setRW(int rw_val)
Set the read/write mode.
Definition: intel_8254_timer.cc:204
gem5::Intel8254Timer::Intel8254Timer
Intel8254Timer(EventManager *em, const std::string &name)
Definition: intel_8254_timer.cc:39
gem5::Intel8254Timer::Counter::serialize
void serialize(const std::string &base, CheckpointOut &cp) const
Serialize this object to the given output stream.
Definition: intel_8254_timer.cc:234
gem5::Intel8254Timer::Counter::latch_on
bool latch_on
State of the count latch.
Definition: intel_8254_timer.hh:152
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::Intel8254Timer::Counter::read_byte
uint8_t read_byte
Determine which byte of a 16-bit count value to read/write.
Definition: intel_8254_timer.hh:158
trace.hh
gem5::Intel8254Timer::Counter::outputHigh
bool outputHigh()
Is the output high?
Definition: intel_8254_timer.cc:228
gem5::Intel8254Timer::sel
sel
Definition: intel_8254_timer.hh:51
gem5::Intel8254Timer::unserialize
void unserialize(const std::string &base, CheckpointIn &cp)
Reconstruct the state of this object from a checkpoint.
Definition: intel_8254_timer.cc:86
gem5::Intel8254Timer::Counter::period
uint16_t period
Interrupt period.
Definition: intel_8254_timer.hh:140
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::Intel8254Timer::writeControl
void writeControl(const CtrlReg data)
Write control word.
Definition: intel_8254_timer.cc:48
gem5::Intel8254Timer::LsbOnly
@ LsbOnly
Definition: intel_8254_timer.hh:78
gem5::Intel8254Timer::Counter::setBCD
void setBCD(int bcd_val)
Set count encoding.
Definition: intel_8254_timer.cc:221
gem5::Intel8254Timer::Counter::write
void write(const uint8_t data)
Write a count byte.
Definition: intel_8254_timer.cc:172
gem5::Intel8254Timer::Counter::offset
Tick offset
When to start ticking.
Definition: intel_8254_timer.hh:143
gem5::Intel8254Timer::Counter::running
bool running
True after startup is called.
Definition: intel_8254_timer.hh:131
gem5::ArmISA::status
Bitfield< 5, 0 > status
Definition: misc_types.hh:480
eventq.hh

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