gem5  v21.1.0.2
gem5::PowerISA::FloatOp Member List

This is the complete list of members for gem5::PowerISA::FloatOp, including all inherited members.

_destRegIdxPtrgem5::StaticInstprivate
_numCCDestRegsgem5::StaticInstprotected
_numDestRegsgem5::StaticInstprotected
_numFPDestRegsgem5::StaticInstprotected
_numIntDestRegsgem5::StaticInstprotected
_numSrcRegsgem5::StaticInstprotected
_numVecDestRegsgem5::StaticInstprotected
_numVecElemDestRegsgem5::StaticInstprotected
_numVecPredDestRegsgem5::StaticInstprotected
_opClassgem5::StaticInstprotected
_srcRegIdxPtrgem5::StaticInstprivate
advancePC(PowerISA::PCState &pcState) const overridegem5::PowerISA::PowerStaticInstinlineprotected
gem5::StaticInst::advancePC(TheISA::PCState &pc_state) const =0gem5::StaticInstpure virtual
asBytes(void *buf, size_t max_size) overridegem5::PowerISA::PowerStaticInstinlineprotectedvirtual
branchTarget(const TheISA::PCState &pc) constgem5::StaticInstvirtual
branchTarget(ThreadContext *tc) constgem5::StaticInstvirtual
buildRetPC(const PCState &curPC, const PCState &callPC) const overridegem5::PowerISA::PowerStaticInstinlineprotected
gem5::StaticInst::buildRetPC(const TheISA::PCState &cur_pc, const TheISA::PCState &call_pc) constgem5::StaticInstinlinevirtual
cachedDisassemblygem5::StaticInstmutableprotected
completeAcc(Packet *pkt, ExecContext *xc, Trace::InstRecord *trace_data) constgem5::StaticInstinlinevirtual
countgem5::RefCountedmutableprivate
decref() constgem5::RefCountedinline
destRegIdx(int i) constgem5::StaticInstinline
disassemble(Addr pc, const loader::SymbolTable *symtab=nullptr) constgem5::StaticInstvirtual
execute(ExecContext *xc, Trace::InstRecord *traceData) const =0gem5::StaticInstpure virtual
fetchMicroop(MicroPC upc) constgem5::StaticInstvirtual
flagsgem5::StaticInstprotected
FloatOp(const char *mnem, MachInst _machInst, OpClass __opClass)gem5::PowerISA::FloatOpinlineprotected
generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const overridegem5::PowerISA::FloatOpprotectedvirtual
getEMI() constgem5::StaticInstinlinevirtual
getName()gem5::StaticInstinline
hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc, TheISA::PCState &tgt) constgem5::StaticInst
incref() constgem5::RefCountedinline
initiateAcc(ExecContext *xc, Trace::InstRecord *traceData) constgem5::StaticInstinlinevirtual
insertCRField(uint32_t cr, uint32_t bf, uint32_t value) constgem5::PowerISA::PowerStaticInstinlineprotected
isAtomic() constgem5::StaticInstinline
isCall() constgem5::StaticInstinline
isCondCtrl() constgem5::StaticInstinline
isControl() constgem5::StaticInstinline
isDataPrefetch() constgem5::StaticInstinline
isDelayedCommit() constgem5::StaticInstinline
isDenormalized(uint32_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
isDirectCtrl() constgem5::StaticInstinline
isFirstMicroop() constgem5::StaticInstinline
isFloating() constgem5::StaticInstinline
isFullMemBarrier() constgem5::StaticInstinline
isHtmCancel() constgem5::StaticInstinline
isHtmCmd() constgem5::StaticInstinline
isHtmStart() constgem5::StaticInstinline
isHtmStop() constgem5::StaticInstinline
isIndirectCtrl() constgem5::StaticInstinline
isInfinity(uint32_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
isInstPrefetch() constgem5::StaticInstinline
isInteger() constgem5::StaticInstinline
isLastMicroop() constgem5::StaticInstinline
isLoad() constgem5::StaticInstinline
isMacroop() constgem5::StaticInstinline
isMemRef() constgem5::StaticInstinline
isMicroop() constgem5::StaticInstinline
isNan(uint32_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
isNan(uint64_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
isNan(float val) constgem5::PowerISA::FloatOpinlineprotected
isNan(double val) constgem5::PowerISA::FloatOpinlineprotected
isNegative(uint32_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
isNonSpeculative() constgem5::StaticInstinline
isNop() constgem5::StaticInstinline
isNormalized(uint32_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
isPrefetch() constgem5::StaticInstinline
isQnan(uint32_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
isQuiesce() constgem5::StaticInstinline
isReadBarrier() constgem5::StaticInstinline
isReturn() constgem5::StaticInstinline
isSerializeAfter() constgem5::StaticInstinline
isSerializeBefore() constgem5::StaticInstinline
isSerializing() constgem5::StaticInstinline
isSnan(uint32_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
isSquashAfter() constgem5::StaticInstinline
isStore() constgem5::StaticInstinline
isStoreConditional() constgem5::StaticInstinline
isSyscall() constgem5::StaticInstinline
isUncondCtrl() constgem5::StaticInstinline
isUnverifiable() constgem5::StaticInstinline
isVector() constgem5::StaticInstinline
isWriteBarrier() constgem5::StaticInstinline
isZero(uint32_t val_bits) constgem5::PowerISA::FloatOpinlineprotected
machInstgem5::PowerISA::PowerStaticInstprotected
makeCRField(double a, double b) constgem5::PowerISA::FloatOpinlineprotected
mnemonicgem5::StaticInstprotected
nullStaticInstPtrgem5::StaticInststatic
numCCDestRegs() constgem5::StaticInstinline
numDestRegs() constgem5::StaticInstinline
numFPDestRegs() constgem5::StaticInstinline
numIntDestRegs() constgem5::StaticInstinline
numSrcRegs() constgem5::StaticInstinline
numVecDestRegs() constgem5::StaticInstinline
numVecElemDestRegs() constgem5::StaticInstinline
numVecPredDestRegs() constgem5::StaticInstinline
opClass() constgem5::StaticInstinline
operator=(const RefCounted &)gem5::RefCountedprivate
PowerStaticInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass)gem5::PowerISA::PowerStaticInstinlineprotected
printFlags(std::ostream &outs, const std::string &separator) constgem5::StaticInst
printReg(std::ostream &os, RegId reg) constgem5::PowerISA::PowerStaticInstprotected
rcgem5::PowerISA::FloatOpprotected
RefCounted(const RefCounted &)gem5::RefCountedprivate
RefCounted()gem5::RefCountedinline
RegIdArrayPtr typedefgem5::StaticInst
setDelayedCommit()gem5::StaticInstinline
setDestRegIdx(int i, const RegId &val)gem5::StaticInstinline
setFirstMicroop()gem5::StaticInstinline
setFlag(Flags f)gem5::StaticInstinline
setLastMicroop()gem5::StaticInstinline
setRegIdxArrays(RegIdArrayPtr src, RegIdArrayPtr dest)gem5::StaticInstinlineprotected
setSrcRegIdx(int i, const RegId &val)gem5::StaticInstinline
simpleAsBytes(void *buf, size_t max_size, const T &t)gem5::StaticInstinlineprotected
srcRegIdx(int i) constgem5::StaticInstinline
StaticInst(const char *_mnemonic, OpClass op_class)gem5::StaticInstinlineprotected
~RefCounted()gem5::RefCountedinlinevirtual
~StaticInst()gem5::StaticInstinlinevirtual

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