gem5 v24.0.0.0
|
#include <reg_bank.hh>
Classes | |
class | Register |
class | RegisterAdder |
class | RegisterBase |
class | RegisterBuf |
class | RegisterLBuf |
class | RegisterRao |
class | RegisterRaz |
class | RegisterRoFill |
Public Types | |
using | Register8 = Register<uint8_t> |
using | Register8LE = Register<uint8_t, ByteOrder::little> |
using | Register8BE = Register<uint8_t, ByteOrder::big> |
using | Register16 = Register<uint16_t> |
using | Register16LE = Register<uint16_t, ByteOrder::little> |
using | Register16BE = Register<uint16_t, ByteOrder::big> |
using | Register32 = Register<uint32_t> |
using | Register32LE = Register<uint32_t, ByteOrder::little> |
using | Register32BE = Register<uint32_t, ByteOrder::big> |
using | Register64 = Register<uint64_t> |
using | Register64LE = Register<uint64_t, ByteOrder::little> |
using | Register64BE = Register<uint64_t, ByteOrder::big> |
Public Member Functions | |
void | setDebugFlag (const ::gem5::debug::SimpleFlag &flag) |
constexpr | RegisterBank (const std::string &new_name, Addr new_base) |
virtual | ~RegisterBank () |
void | addRegisters (std::initializer_list< RegisterAdder > adders) |
template<class FillerReg > | |
void | addRegistersAt (std::initializer_list< RegisterAdder > adders) |
void | addRegister (RegisterAdder reg) |
Addr | base () const |
Addr | size () const |
const std::string & | name () const |
virtual void | read (Addr addr, void *buf, Addr bytes) |
virtual void | write (Addr addr, const void *buf, Addr bytes) |
virtual void | reset () |
Static Public Member Functions | |
template<typename Data > | |
static constexpr Data | readWithMask (const Data &value, const Data &bitmask) |
template<typename Data > | |
static constexpr Data | writeWithMask (const Data &old, const Data &value, const Data &bitmask) |
Private Attributes | |
std::map< Addr, std::reference_wrapper< RegisterBase > > | _offsetMap |
const ::gem5::debug::SimpleFlag * | _debug_flag = nullptr |
Addr | _base = 0 |
Addr | _size = 0 |
const std::string | _name |
std::vector< std::unique_ptr< RegisterBase > > | owned |
Definition at line 356 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register16 = Register<uint16_t> |
Definition at line 919 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register16BE = Register<uint16_t, ByteOrder::big> |
Definition at line 921 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register16LE = Register<uint16_t, ByteOrder::little> |
Definition at line 920 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register32 = Register<uint32_t> |
Definition at line 922 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register32BE = Register<uint32_t, ByteOrder::big> |
Definition at line 924 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register32LE = Register<uint32_t, ByteOrder::little> |
Definition at line 923 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register64 = Register<uint64_t> |
Definition at line 925 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register64BE = Register<uint64_t, ByteOrder::big> |
Definition at line 927 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register64LE = Register<uint64_t, ByteOrder::little> |
Definition at line 926 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register8 = Register<uint8_t> |
Definition at line 916 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register8BE = Register<uint8_t, ByteOrder::big> |
Definition at line 918 of file reg_bank.hh.
using gem5::RegisterBank< BankByteOrder >::Register8LE = Register<uint8_t, ByteOrder::little> |
Definition at line 917 of file reg_bank.hh.
|
inlineconstexpr |
Definition at line 930 of file reg_bank.hh.
|
inlinevirtual |
Definition at line 934 of file reg_bank.hh.
|
inline |
Definition at line 1022 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::addRegisters(), and gem5::X86ISA::reg.
|
inline |
Definition at line 956 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_base, gem5::RegisterBank< BankByteOrder >::_offsetMap, gem5::RegisterBank< BankByteOrder >::_size, gem5::RegisterBank< BankByteOrder >::name(), gem5::ArmISA::offset, panic, panic_if, and gem5::X86ISA::reg.
Referenced by gem5::RegisterBank< BankByteOrder >::addRegister(), RegisterBankTest::RegisterBankTest(), and gem5::SysSecCtrl::SysSecCtrl().
|
inline |
Definition at line 983 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_base, gem5::RegisterBank< BankByteOrder >::_offsetMap, gem5::RegisterBank< BankByteOrder >::_size, gem5::RegisterBank< BankByteOrder >::name(), gem5::ArmISA::offset, gem5::RegisterBank< BankByteOrder >::owned, panic_if, gem5::X86ISA::reg, gem5::AddrRange::to_string(), and gem5::PowerISA::vec.
|
inline |
Definition at line 1024 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_base.
Referenced by gem5::RegisterBank< BankByteOrder >::read(), and gem5::RegisterBank< BankByteOrder >::write().
|
inline |
Definition at line 1026 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_name.
Referenced by gem5::RegisterBank< BankByteOrder >::addRegisters(), gem5::RegisterBank< BankByteOrder >::addRegistersAt(), gem5::RegisterBank< BankByteOrder >::read(), and gem5::RegisterBank< BankByteOrder >::write().
|
inlinevirtual |
Definition at line 1029 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_debug_flag, gem5::RegisterBank< BankByteOrder >::_offsetMap, gem5::X86ISA::addr, gem5::RegisterBank< BankByteOrder >::base(), gem5::ccprintf(), gem5::curTick(), gem5::trace::Logger::dprintf_flag(), gem5::trace::getDebugLogger(), gem5::debug::Flag::name(), gem5::RegisterBank< BankByteOrder >::name(), panic_if, gem5::X86ISA::reg, gem5::RegisterBank< BankByteOrder >::RegisterBase::size(), gem5::RegisterBank< BankByteOrder >::size(), and gem5::ArmISA::ss.
Referenced by gem5::Clint::read(), gem5::Plic::read(), gem5::SysSecCtrl::read(), gem5::Uart8250::read(), and gem5::X86ISA::I8237::read().
|
inlinestaticconstexpr |
Definition at line 362 of file reg_bank.hh.
Referenced by gem5::RegisterBank< BankByteOrder >::writeWithMask().
|
inlinevirtual |
Definition at line 1122 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_offsetMap.
|
inline |
Definition at line 900 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_debug_flag.
|
inline |
Definition at line 1025 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_size.
Referenced by gem5::RegisterBank< BankByteOrder >::read(), and gem5::RegisterBank< BankByteOrder >::write().
|
inlinevirtual |
Definition at line 1075 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::_debug_flag, gem5::RegisterBank< BankByteOrder >::_offsetMap, gem5::X86ISA::addr, gem5::RegisterBank< BankByteOrder >::base(), gem5::ccprintf(), gem5::curTick(), gem5::trace::Logger::dprintf_flag(), gem5::trace::getDebugLogger(), gem5::debug::Flag::name(), gem5::RegisterBank< BankByteOrder >::name(), panic_if, gem5::X86ISA::reg, gem5::RegisterBank< BankByteOrder >::RegisterBase::size(), gem5::RegisterBank< BankByteOrder >::size(), and gem5::ArmISA::ss.
Referenced by gem5::Clint::write(), gem5::fastmodel::ResetControllerExample::write(), gem5::Plic::write(), gem5::SysSecCtrl::write(), gem5::Uart8250::write(), and gem5::X86ISA::I8237::write().
|
inlinestaticconstexpr |
Definition at line 369 of file reg_bank.hh.
References gem5::RegisterBank< BankByteOrder >::readWithMask().
Referenced by gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >::defaultPartialWriter(), gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >::update(), and gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >::update().
|
private |
Definition at line 909 of file reg_bank.hh.
Referenced by gem5::RegisterBank< BankByteOrder >::addRegisters(), gem5::RegisterBank< BankByteOrder >::addRegistersAt(), and gem5::RegisterBank< BankByteOrder >::base().
|
private |
Definition at line 908 of file reg_bank.hh.
Referenced by gem5::RegisterBank< BankByteOrder >::read(), gem5::RegisterBank< BankByteOrder >::setDebugFlag(), and gem5::RegisterBank< BankByteOrder >::write().
|
private |
Definition at line 911 of file reg_bank.hh.
Referenced by gem5::RegisterBank< BankByteOrder >::name().
|
private |
Definition at line 906 of file reg_bank.hh.
Referenced by gem5::RegisterBank< BankByteOrder >::addRegisters(), gem5::RegisterBank< BankByteOrder >::addRegistersAt(), gem5::RegisterBank< BankByteOrder >::read(), gem5::RegisterBank< BankByteOrder >::reset(), and gem5::RegisterBank< BankByteOrder >::write().
|
private |
Definition at line 910 of file reg_bank.hh.
Referenced by gem5::RegisterBank< BankByteOrder >::addRegisters(), gem5::RegisterBank< BankByteOrder >::addRegistersAt(), and gem5::RegisterBank< BankByteOrder >::size().
|
private |
Definition at line 912 of file reg_bank.hh.
Referenced by gem5::RegisterBank< BankByteOrder >::addRegistersAt().