_drainManager | gem5::Drainable | private |
_drainState | gem5::Drainable | mutableprivate |
_name | gem5::Named | private |
_objNameResolver | gem5::SimObject | privatestatic |
_params | gem5::SimObject | protected |
addStat(statistics::Info *info) | gem5::statistics::Group | |
addStatGroup(const char *name, Group *block) | gem5::statistics::Group | |
atsDeviceNeedsRetry | gem5::SMMUv3DeviceInterface | |
atsDevicePort | gem5::SMMUv3DeviceInterface | |
atsMemPort | gem5::SMMUv3DeviceInterface | |
atsRecvAtomic(PacketPtr pkt) | gem5::SMMUv3DeviceInterface | |
atsRecvTimingReq(PacketPtr pkt) | gem5::SMMUv3DeviceInterface | |
atsRecvTimingResp(PacketPtr pkt) | gem5::SMMUv3DeviceInterface | |
atsSendDeviceRetry() | gem5::SMMUv3DeviceInterface | |
atsSendDeviceRetryEvent | gem5::SMMUv3DeviceInterface | |
clockDomain | gem5::Clocked | private |
Clocked(ClockDomain &clk_domain) | gem5::Clocked | inlineprotected |
Clocked(Clocked &)=delete | gem5::Clocked | protected |
clockEdge(Cycles cycles=Cycles(0)) const | gem5::Clocked | inline |
ClockedObject(const ClockedObjectParams &p) | gem5::ClockedObject | |
clockPeriod() const | gem5::Clocked | inline |
clockPeriodUpdated() | gem5::Clocked | inlineprotectedvirtual |
curCycle() const | gem5::Clocked | inline |
currentSection() | gem5::Serializable | static |
cycle | gem5::Clocked | mutableprivate |
cyclesToTicks(Cycles c) const | gem5::Clocked | inline |
dependentReads | gem5::SMMUv3DeviceInterface | |
dependentReqRemoved | gem5::SMMUv3DeviceInterface | |
dependentWrites | gem5::SMMUv3DeviceInterface | |
deschedule(Event &event) | gem5::EventManager | inline |
deschedule(Event *event) | gem5::EventManager | inline |
deviceNeedsRetry | gem5::SMMUv3DeviceInterface | |
devicePort | gem5::SMMUv3DeviceInterface | |
devicePortSem | gem5::SMMUv3DeviceInterface | |
dmDrain() | gem5::Drainable | private |
dmDrainResume() | gem5::Drainable | private |
drain() override | gem5::SMMUv3DeviceInterface | virtual |
Drainable() | gem5::Drainable | protected |
drainResume() | gem5::Drainable | inlineprotectedvirtual |
drainState() const | gem5::Drainable | inline |
duplicateReqRemoved | gem5::SMMUv3DeviceInterface | |
duplicateReqs | gem5::SMMUv3DeviceInterface | |
EventManager(EventManager &em) | gem5::EventManager | inline |
EventManager(EventManager *em) | gem5::EventManager | inline |
EventManager(EventQueue *eq) | gem5::EventManager | inline |
eventq | gem5::EventManager | protected |
eventQueue() const | gem5::EventManager | inline |
find(const char *name) | gem5::SimObject | static |
frequency() const | gem5::Clocked | inline |
generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream) | gem5::Serializable | static |
getPort(const std::string &name, PortID id) override | gem5::SMMUv3DeviceInterface | virtual |
getProbeManager() | gem5::SimObject | |
getSimObjectResolver() | gem5::SimObject | static |
getStatGroups() const | gem5::statistics::Group | |
getStats() const | gem5::statistics::Group | |
Group()=delete | gem5::statistics::Group | |
Group(const Group &)=delete | gem5::statistics::Group | |
Group(Group *parent, const char *name=nullptr) | gem5::statistics::Group | |
init() | gem5::SimObject | virtual |
initState() | gem5::SimObject | virtual |
loadState(CheckpointIn &cp) | gem5::SimObject | virtual |
mainTLB | gem5::SMMUv3DeviceInterface | |
mainTLBEnable | gem5::SMMUv3DeviceInterface | |
mainTLBLat | gem5::SMMUv3DeviceInterface | |
mainTLBSem | gem5::SMMUv3DeviceInterface | |
memInvalidate() | gem5::SimObject | inlinevirtual |
memWriteback() | gem5::SimObject | inlinevirtual |
mergedParent | gem5::statistics::Group | private |
mergedStatGroups | gem5::statistics::Group | private |
mergeStatGroup(Group *block) | gem5::statistics::Group | |
microTLB | gem5::SMMUv3DeviceInterface | |
microTLBEnable | gem5::SMMUv3DeviceInterface | |
microTLBLat | gem5::SMMUv3DeviceInterface | |
microTLBSem | gem5::SMMUv3DeviceInterface | |
name() const | gem5::Named | inlinevirtual |
Named(const std::string &name_) | gem5::Named | inline |
nextCycle() const | gem5::Clocked | inline |
notifyFork() | gem5::Drainable | inlinevirtual |
gem5::operator=(const Group &)=delete | gem5::statistics::Group | |
gem5::Clocked::operator=(Clocked &)=delete | gem5::Clocked | protected |
PARAMS(SMMUv3DeviceInterface) | gem5::SMMUv3DeviceInterface | |
Params typedef | gem5::ClockedObject | |
params() const | gem5::SimObject | inline |
path | gem5::Serializable | privatestatic |
pendingMemAccesses | gem5::SMMUv3DeviceInterface | |
portWidth | gem5::SMMUv3DeviceInterface | |
powerState | gem5::ClockedObject | |
preDumpStats() | gem5::statistics::Group | virtual |
prefetchEnable | gem5::SMMUv3DeviceInterface | |
prefetchReserveLastWay | gem5::SMMUv3DeviceInterface | |
probeManager | gem5::SimObject | private |
recvAtomic(PacketPtr pkt) | gem5::SMMUv3DeviceInterface | |
recvTimingReq(PacketPtr pkt) | gem5::SMMUv3DeviceInterface | |
regProbeListeners() | gem5::SimObject | virtual |
regProbePoints() | gem5::SimObject | virtual |
regStats() | gem5::statistics::Group | virtual |
reschedule(Event &event, Tick when, bool always=false) | gem5::EventManager | inline |
reschedule(Event *event, Tick when, bool always=false) | gem5::EventManager | inline |
resetClock() const | gem5::Clocked | inlineprotected |
resetStats() | gem5::statistics::Group | virtual |
resolveStat(std::string name) const | gem5::statistics::Group | |
schedAtsTimingResp(PacketPtr pkt) | gem5::SMMUv3DeviceInterface | |
schedTimingResp(PacketPtr pkt) | gem5::SMMUv3DeviceInterface | |
schedule(Event &event, Tick when) | gem5::EventManager | inline |
schedule(Event *event, Tick when) | gem5::EventManager | inline |
scheduleDeviceRetry() | gem5::SMMUv3DeviceInterface | |
sendDeviceRetry() | gem5::SMMUv3DeviceInterface | |
sendDeviceRetryEvent | gem5::SMMUv3DeviceInterface | |
sendRange() | gem5::SMMUv3DeviceInterface | |
Serializable() | gem5::Serializable | |
serialize(CheckpointOut &cp) const override | gem5::ClockedObject | virtual |
serializeAll(const std::string &cpt_dir) | gem5::SimObject | static |
serializeSection(CheckpointOut &cp, const char *name) const | gem5::Serializable | |
serializeSection(CheckpointOut &cp, const std::string &name) const | gem5::Serializable | inline |
setCurTick(Tick newVal) | gem5::EventManager | inline |
setSimObjectResolver(SimObjectResolver *resolver) | gem5::SimObject | static |
setSMMU(SMMUv3 *_smmu) | gem5::SMMUv3DeviceInterface | inline |
signalDrainDone() const | gem5::Drainable | inlineprotected |
SimObject(const Params &p) | gem5::SimObject | |
SimObjectList typedef | gem5::SimObject | private |
simObjectList | gem5::SimObject | privatestatic |
smmu | gem5::SMMUv3DeviceInterface | |
SMMUTranslationProcess class | gem5::SMMUv3DeviceInterface | friend |
SMMUv3DeviceInterface(const Params &p) | gem5::SMMUv3DeviceInterface | |
startup() | gem5::SimObject | virtual |
statGroups | gem5::statistics::Group | private |
stats | gem5::statistics::Group | private |
tick | gem5::Clocked | mutableprivate |
ticksToCycles(Tick t) const | gem5::Clocked | inline |
unserialize(CheckpointIn &cp) override | gem5::ClockedObject | virtual |
unserializeSection(CheckpointIn &cp, const char *name) | gem5::Serializable | |
unserializeSection(CheckpointIn &cp, const std::string &name) | gem5::Serializable | inline |
update() const | gem5::Clocked | inlineprivate |
updateClockPeriod() | gem5::Clocked | inline |
voltage() const | gem5::Clocked | inline |
wakeupEventQueue(Tick when=(Tick) -1) | gem5::EventManager | inline |
wrBufSlotsRemaining | gem5::SMMUv3DeviceInterface | |
xlateSlotsRemaining | gem5::SMMUv3DeviceInterface | |
~Clocked() | gem5::Clocked | inlineprotectedvirtual |
~Drainable() | gem5::Drainable | protectedvirtual |
~Group() | gem5::statistics::Group | virtual |
~Named()=default | gem5::Named | virtual |
~Serializable() | gem5::Serializable | virtual |
~SimObject() | gem5::SimObject | virtual |
~SMMUv3DeviceInterface() | gem5::SMMUv3DeviceInterface | inline |