gem5 v24.0.0.0
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Helper class for objects that need to be clocked. More...
#include <clocked_object.hh>
Public Member Functions | |
void | updateClockPeriod () |
Update the tick to the current tick. | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Protected Member Functions | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. | |
void | resetClock () const |
Reset the object's clock using the current global tick value. | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. | |
Private Member Functions | |
void | update () const |
Align cycle and tick to the next clock edge if not already done. | |
Private Attributes | |
Tick | tick |
Cycles | cycle |
ClockDomain & | clockDomain |
The clock domain this clocked object belongs to. | |
Helper class for objects that need to be clocked.
Clocked objects typically inherit from this class. Objects that need SimObject functionality as well should inherit from ClockedObject.
Definition at line 62 of file clocked_object.hh.
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inlineprotected |
Create a clocked object and set the clock domain based on the parameters.
Definition at line 115 of file clocked_object.hh.
References clockDomain, and gem5::ClockDomain::registerWithClockDomain().
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protecteddelete |
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inlineprotectedvirtual |
Virtual destructor due to inheritance.
Definition at line 129 of file clocked_object.hh.
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.
When curTick() is on a clock edge, the number of cycles in the parameter is added to curTick() to be returned. When curTick() is not aligned to a clock edge, the number of cycles in the parameter is added to the next clock edge.
cycles | The number of cycles into the future |
Definition at line 177 of file clocked_object.hh.
References clockPeriod(), tick, and update().
Referenced by gem5::BaseCache::access(), gem5::AtomicSimpleCPU::activateContext(), gem5::BaseKvmCPU::activateContext(), gem5::MinorCPU::activateContext(), gem5::TimingSimpleCPU::activateContext(), gem5::TimingSimpleCPU::advanceInst(), gem5::BasePixelPump::beginLine(), gem5::BaseXBar::calcPacketTiming(), gem5::ruby::garnet::SwitchAllocator::check_for_wakeup(), gem5::TraceCPU::ElasticDataGen::checkAndIssue(), gem5::ruby::garnet::NetworkInterface::checkReschedule(), gem5::ruby::garnet::NetworkInterface::checkStallQueue(), gem5::HDLcd::cmdEnable(), gem5::TraceCPU::ElasticDataGen::completeMemAccess(), gem5::MemTest::completeRequest(), gem5::ruby::garnet::NetworkInterface::dequeueCallback(), gem5::ruby::AbstractController::dequeueMemRespQueue(), gem5::Pl111::dmaDone(), gem5::SMMUProcess::doDelay(), gem5::Cache::doTimingSupplyResponse(), gem5::TimingSimpleCPU::drain(), gem5::TraceCPU::ElasticDataGen::execute(), gem5::o3::Fetch::finishTranslation(), gem5::o3::Commit::generateTrapEvent(), gem5::BaseCache::handleFill(), gem5::TimingSimpleCPU::handleReadPacket(), gem5::SimpleCache::handleRequest(), gem5::Cache::handleSnoop(), gem5::BaseCache::handleUncacheableWriteResp(), gem5::TimingSimpleCPU::handleWritePacket(), gem5::ruby::garnet::InputUnit::increment_credit(), gem5::ruby::garnet::OutputUnit::insert_flit(), gem5::ruby::Sequencer::insertRequest(), gem5::ruby::Sequencer::invL1(), gem5::ruby::VIPERCoalescer::invTCC(), gem5::ruby::VIPERCoalescer::invTCP(), gem5::ruby::DMASequencer::issueNext(), gem5::ruby::RubyPrefetcherProxy::issuePrefetch(), gem5::SMMUTranslationProcess::issuePrefetch(), gem5::ruby::Sequencer::issueRequest(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::ruby::DMASequencer::makeRequest(), gem5::ruby::AbstractController::memRespQueueDequeued(), nextCycle(), gem5::ArmISA::TableWalker::nextWalk(), gem5::ruby::PerfectSwitch::operateMessageBuffer(), gem5::ruby::Throttle::operateVnet(), gem5::WaitClass::prerdy(), gem5::WaitClass::preset(), gem5::LdsState::process(), gem5::ruby::Consumer::processCurrentEvent(), gem5::prefetch::AccessMapPatternMatching::processEpochEvent(), gem5::SparcISA::ISA::processHSTickCompare(), gem5::SpatterGen::processNextGenEvent(), gem5::SpatterGen::processNextSendEvent(), gem5::SparcISA::ISA::processSTickCompare(), gem5::pseudo_inst::quiesceCycles(), gem5::WaitClass::rdy(), gem5::o3::LSQUnit::read(), gem5::Pl111::readFramebuffer(), gem5::MemTest::recvRetry(), gem5::BaseCache::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::BaseCache::recvTimingResp(), gem5::CoherentXBar::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::RiscvISA::Walker::recvTimingResp(), gem5::ruby::AbstractController::recvTimingResp(), gem5::TimingSimpleCPU::DcachePort::recvTimingResp(), gem5::TimingSimpleCPU::IcachePort::recvTimingResp(), gem5::X86ISA::Walker::recvTimingResp(), gem5::Cache::recvTimingSnoopResp(), gem5::CoherentXBar::recvTimingSnoopResp(), gem5::BasePixelPump::renderPixels(), gem5::IGbE::restartClock(), gem5::Sp805::restartCounter(), gem5::ruby::WeightBased::route(), gem5::Gicv3Its::runProcessTiming(), gem5::NSGigE::rxKick(), gem5::TraceCPU::schedDcacheNext(), gem5::MipsISA::ISA::scheduleCP0Update(), gem5::ruby::Consumer::scheduleEvent(), gem5::ruby::garnet::NetworkBridge::scheduleFlit(), gem5::ruby::garnet::NetworkInterface::scheduleFlit(), gem5::ruby::RubyPrefetcherProxy::scheduleNextPrefetch(), gem5::ruby::Consumer::scheduleNextWakeup(), gem5::ruby::garnet::NetworkInterface::scheduleOutputPort(), gem5::BaseCPU::schedulePowerGatingEvent(), gem5::o3::InstructionQueue::scheduleReadyInsts(), gem5::o3::CPU::scheduleTickEvent(), gem5::ruby::AbstractController::serviceMemoryQueue(), gem5::Cache::serviceMSHRTargets(), gem5::NoncoherentCache::serviceMSHRTargets(), gem5::WaitClass::set(), gem5::SparcISA::ISA::setFSReg(), gem5::BasePixelPump::start(), gem5::memory::DRAMSim2::startup(), gem5::memory::DRAMsim3::startup(), gem5::prefetch::AccessMapPatternMatching::startup(), gem5::RiscvISA::Walker::startWalkWrapper(), gem5::BaseCPU::suspendContext(), gem5::AtomicSimpleCPU::tick(), gem5::BaseKvmCPU::tick(), gem5::GarnetSyntheticTraffic::tick(), gem5::MemTest::tick(), gem5::o3::CPU::tick(), gem5::NSGigE::transferDone(), gem5::sinic::Device::transferDone(), gem5::DmaPort::trySendTimingReq(), gem5::NSGigE::txKick(), gem5::o3::CPU::wakeCPU(), gem5::ruby::garnet::CrossbarSwitch::wakeup(), gem5::ruby::garnet::InputUnit::wakeup(), gem5::ruby::garnet::NetworkInterface::wakeup(), gem5::ruby::garnet::NetworkLink::wakeup(), gem5::ruby::garnet::Router::wakeup(), gem5::ruby::Sequencer::wakeup(), gem5::ruby::AbstractController::wakeUpAllBuffers(), gem5::ruby::AbstractController::wakeUpAllBuffers(), gem5::ruby::AbstractController::wakeUpBuffer(), and gem5::ruby::AbstractController::wakeUpBuffers().
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Definition at line 217 of file clocked_object.hh.
References clockDomain, and gem5::ClockDomain::clockPeriod().
Referenced by gem5::TesterThread::checkDeadlock(), clockEdge(), gem5::Iris::BaseCPU::clockPeriodUpdated(), cyclesToTicks(), gem5::GPUDispatcher::dispatch(), gem5::SMMUProcess::doDelay(), gem5::BaseKvmCPU::doMMIOAccess(), gem5::ArmISA::TableWalker::fetchDescriptor(), gem5::ArmISA::TableWalker::Stage2Walk::finish(), frequency(), gem5::MathExprPowerModel::getStatValue(), gem5::ComputeUnit::init(), gem5::prefetch::Queued::insert(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::BaseKvmCPU::kvmRun(), gem5::GPUDispatcher::notifyWgCompl(), gem5::ruby::GPUCoalescer::printRequestTable(), gem5::CPUProgressEvent::process(), gem5::BaseCache::recvAtomic(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::Cache::recvAtomicSnoop(), gem5::CoherentXBar::recvAtomicSnoop(), gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::TLBCoalescer::CpuSidePort::recvTimingReq(), gem5::VegaTLBCoalescer::CpuSidePort::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::Cache::recvTimingSnoopReq(), gem5::CoherentXBar::recvTimingSnoopReq(), gem5::CoherentXBar::recvTimingSnoopResp(), gem5::ruby::BankedArray::reserve(), resetClock(), gem5::TraceCPU::schedDcacheNext(), gem5::GPUDispatcher::scheduleDispatch(), gem5::ruby::Consumer::scheduleEventAbsolute(), gem5::ScalarRegisterFile::scheduleWriteOperandsFromLoad(), gem5::VectorRegisterFile::scheduleWriteOperandsFromLoad(), gem5::BaseCache::sendMSHRQueuePacket(), gem5::ruby::Throttle::ThrottleStats::ThrottleStats(), gem5::AtomicSimpleCPU::tick(), gem5::IGbE::tick(), ticksToCycles(), gem5::prefetch::Queued::translationComplete(), update(), gem5::GPUDispatcher::updateInvCounter(), gem5::Sp805::value(), gem5::ruby::garnet::NetworkInterface::wakeup(), gem5::ruby::GPUCoalescer::wakeup(), gem5::ruby::HTMSequencer::wakeup(), and gem5::ruby::Sequencer::wakeup().
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inlineprotectedvirtual |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.
Reimplemented in gem5::Iris::BaseCPU.
Definition at line 148 of file clocked_object.hh.
Referenced by updateClockPeriod().
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inline |
Determine the current cycle, corresponding to a tick aligned to a clock edge.
Definition at line 195 of file clocked_object.hh.
References cycle, and update().
Referenced by gem5::o3::CPU::activateContext(), gem5::TesterThread::addOutstandingReqs(), gem5::minor::FUPipeline::advance(), gem5::ruby::garnet::SwitchAllocator::arbitrate_outports(), gem5::minor::FUPipeline::canInsert(), gem5::TesterThread::checkDeadlock(), gem5::RubyTester::checkForDeadlock(), gem5::BaseCache::clearBlocked(), gem5::ruby::GPUCoalescer::coalescePacket(), gem5::ruby::garnet::GarnetNetwork::collateStats(), gem5::minor::Execute::commit(), gem5::minor::FUPipeline::cyclesBeforeInsert(), gem5::ruby::garnet::OutputUnit::decrement_credit(), gem5::minor::Execute::evaluate(), gem5::o3::CPU::haltContext(), gem5::VegaISA::GpuTLB::handleTranslationReturn(), gem5::DmaThread::hitCallback(), gem5::GpuWavefront::hitCallback(), gem5::RubyTester::hitCallback(), gem5::ruby::garnet::OutputUnit::increment_credit(), gem5::ruby::RubyPrefetcher::initializeStream(), gem5::ruby::HTMSequencer::insertRequest(), gem5::ruby::Sequencer::insertRequest(), gem5::minor::Execute::issue(), gem5::TesterThread::issueNextAction(), gem5::ruby::RubyPrefetcher::issueNextPrefetch(), gem5::VegaISA::GpuTLB::issueTLBLookup(), gem5::ruby::Throttle::operateVnet(), gem5::TesterThread::printOutstandingReqs(), gem5::ruby::GPUCoalescer::printRequestTable(), gem5::VegaTLBCoalescer::processProbeTLBEvent(), gem5::RiscvISA::ISA::readMiscReg(), gem5::X86ISA::ISA::readMiscReg(), gem5::ruby::Sequencer::recordMissLatency(), gem5::VegaTLBCoalescer::CpuSidePort::recvTimingReq(), gem5::ruby::RubySystem::resetStats(), gem5::BaseCache::setBlocked(), gem5::X86ISA::ISA::setMiscReg(), gem5::o3::CPU::suspendContext(), gem5::o3::CPU::takeOverFrom(), gem5::TimingSimpleCPU::takeOverFrom(), gem5::o3::CPU::tick(), gem5::VegaISA::GpuTLB::translationReturn(), gem5::BaseCPU::updateCycleCounters(), gem5::TimingSimpleCPU::updateCycleCounts(), gem5::VegaTLBCoalescer::updatePhysAddresses(), gem5::o3::CPU::wakeCPU(), gem5::ruby::garnet::CrossbarSwitch::wakeup(), gem5::ruby::GPUCoalescer::wakeup(), gem5::ruby::HTMSequencer::wakeup(), and gem5::ruby::Sequencer::wakeup().
Definition at line 227 of file clocked_object.hh.
References gem5::ArmISA::c, and clockPeriod().
Referenced by gem5::BaseCache::access(), gem5::ruby::Switch::addOutPort(), gem5::ruby::garnet::NetworkInterface::checkStallQueue(), gem5::Wavefront::exec(), gem5::ruby::garnet::NetworkInterface::incrementStats(), gem5::ruby::Sequencer::invL1(), gem5::ruby::VIPERCoalescer::invTCC(), gem5::ruby::VIPERCoalescer::invTCP(), gem5::ruby::DMASequencer::issueNext(), gem5::ruby::RubyPrefetcherProxy::issuePrefetch(), gem5::ruby::Sequencer::issueRequest(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::VegaISA::GpuTLB::issueTLBLookup(), gem5::X86ISA::GpuTLB::issueTLBLookup(), gem5::ruby::DMASequencer::makeRequest(), gem5::ruby::Throttle::operateVnet(), gem5::prefetch::AccessMapPatternMatching::processEpochEvent(), gem5::LdsState::processPacket(), gem5::VegaTLBCoalescer::processProbeTLBEvent(), gem5::Plic::propagateOutput(), gem5::ruby::AbstractController::recvTimingResp(), gem5::VegaISA::GpuTLB::translationReturn(), gem5::X86ISA::GpuTLB::translationReturn(), gem5::ruby::garnet::NetworkInterface::wakeup(), gem5::ruby::GPUCoalescer::wakeup(), gem5::RegisterFileCache::waveExecuteInst(), gem5::ScalarRegisterFile::waveExecuteInst(), and gem5::VectorRegisterFile::waveExecuteInst().
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Definition at line 215 of file clocked_object.hh.
References clockPeriod(), and gem5::sim_clock::Frequency.
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Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.
When curTick() is at the current cycle edge, this returns the next clock edge. When calling this during the middle of a cycle, this returns 2 clock edges in the future.
Definition at line 213 of file clocked_object.hh.
References clockEdge().
Referenced by gem5::SpatterGen::checkForSimExit(), gem5::GUPSGen::createNextReq(), gem5::ComputeUnit::dispWorkgroup(), gem5::AtomicSimpleCPU::drainResume(), gem5::BaseKvmCPU::drainResume(), gem5::o3::CPU::drainResume(), gem5::TimingSimpleCPU::drainResume(), gem5::ComputeUnit::exec(), gem5::BaseKvmCPU::finishMMIOPending(), gem5::GUPSGen::handleResponse(), gem5::SpatterGen::proceedPastSyncPoint(), gem5::SpatterGen::processNextGenEvent(), gem5::SpatterGen::processNextSendEvent(), gem5::pseudo_inst::quiesceSkip(), gem5::SpatterGen::recvReqRetry(), gem5::SpatterGen::recvTimingResp(), gem5::SMMUv3DeviceInterface::schedAtsTimingResp(), gem5::SMMUv3DeviceInterface::schedTimingResp(), gem5::TesterThread::scheduleDeadlockCheckEvent(), gem5::SMMUv3DeviceInterface::scheduleDeviceRetry(), gem5::o3::CPU::scheduleThreadExitEvent(), gem5::TesterThread::scheduleWakeup(), gem5::GUPSGen::sendNextReq(), gem5::GUPSGen::startup(), gem5::GUPSGen::wakeUp(), and gem5::SMMUv3::writeControl().
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Reset the object's clock using the current global tick value.
Likely to be used only when the global clock is reset. Currently, this done only when Ruby is done warming up the memory system.
Definition at line 137 of file clocked_object.hh.
References clockPeriod(), gem5::curTick(), cycle, gem5::divCeil(), and tick.
Referenced by gem5::ruby::RubySystem::startup().
Definition at line 222 of file clocked_object.hh.
References clockPeriod(), gem5::divCeil(), and gem5::ArmISA::t.
Referenced by gem5::AtomicSimpleCPU::activateContext(), gem5::BaseKvmCPU::activateContext(), gem5::BaseCache::calculateAccessLatency(), gem5::BaseCache::calculateTagOnlyLatency(), gem5::o3::LSQUnit::commitLoad(), gem5::Pl111::dmaDone(), gem5::Cache::handleAtomicReqMiss(), gem5::NoncoherentCache::handleAtomicReqMiss(), gem5::ruby::HTMSequencer::htmCallback(), gem5::ruby::AbstractController::incomingTransactionEnd(), gem5::ruby::AbstractController::outgoingTransactionEnd(), gem5::ruby::AbstractController::recvAtomic(), and gem5::BaseKvmCPU::tick().
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Align cycle and tick to the next clock edge if not already done.
When complete, tick must be at least curTick().
Definition at line 79 of file clocked_object.hh.
References clockPeriod(), gem5::curTick(), cycle, gem5::divCeil(), and tick.
Referenced by clockEdge(), curCycle(), gem5::prefetch::PIF::CompactorEntry::inSameSpatialRegion(), and updateClockPeriod().
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Update the tick to the current tick.
Definition at line 156 of file clocked_object.hh.
References clockPeriodUpdated(), and update().
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Definition at line 219 of file clocked_object.hh.
References clockDomain, and gem5::ClockDomain::voltage().
Referenced by gem5::MathExprPowerModel::getStatValue(), gem5::EnergyCtrl::read(), and gem5::EnergyCtrl::toMicroVolt().
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The clock domain this clocked object belongs to.
Definition at line 107 of file clocked_object.hh.
Referenced by Clocked(), clockPeriod(), and voltage().
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Definition at line 72 of file clocked_object.hh.
Referenced by curCycle(), gem5::memory::DRAMSim2::readComplete(), resetClock(), update(), and gem5::memory::DRAMSim2::writeComplete().
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mutableprivate |
Definition at line 68 of file clocked_object.hh.
Referenced by gem5::prefetch::SBOOE::Sandbox::access(), gem5::BaseCache::calculateAccessLatency(), clockEdge(), gem5::ruby::RubySystem::enqueueRubyEvent(), gem5::memory::DRAMInterface::Rank::powerDownSleep(), gem5::memory::CfiMemory::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), resetClock(), gem5::memory::HBMCtrl::restartScheduler(), gem5::memory::MemCtrl::restartScheduler(), gem5::memory::DRAMInterface::Rank::schedulePowerEvent(), and update().