gem5  v21.2.0.0
gem5::SparcISA::BlockMemImm Member List

This is the complete list of members for gem5::SparcISA::BlockMemImm, including all inherited members.

_destRegIdxPtrgem5::StaticInstprivate
_numCCDestRegsgem5::StaticInstprotected
_numDestRegsgem5::StaticInstprotected
_numFPDestRegsgem5::StaticInstprotected
_numIntDestRegsgem5::StaticInstprotected
_numSrcRegsgem5::StaticInstprotected
_numVecDestRegsgem5::StaticInstprotected
_numVecElemDestRegsgem5::StaticInstprotected
_numVecPredDestRegsgem5::StaticInstprotected
_opClassgem5::StaticInstprotected
_srcRegIdxPtrgem5::StaticInstprivate
advancePC(PCStateBase &pcState) const overridegem5::SparcISA::SparcStaticInstprotectedvirtual
advancePC(ThreadContext *tc) const overridegem5::SparcISA::SparcStaticInstprotectedvirtual
asBytes(void *buf, size_t size) overridegem5::SparcISA::SparcStaticInstinlineprotectedvirtual
BlockMem(const char *mnem, ExtMachInst _machInst)gem5::SparcISA::BlockMemImminlineprotected
gem5::SparcISA::BlockMem::BlockMem(const char *mnem, ExtMachInst _machInst)gem5::SparcISA::BlockMeminlineprotected
branchTarget(const PCStateBase &pc) constgem5::StaticInstvirtual
branchTarget(ThreadContext *tc) constgem5::StaticInstvirtual
buildRetPC(const PCStateBase &cur_pc, const PCStateBase &call_pc) const overridegem5::SparcISA::SparcStaticInstinlineprotectedvirtual
cachedDisassemblygem5::StaticInstmutableprotected
completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const overridegem5::SparcISA::SparcMacroInstinlineprotected
gem5::SparcISA::SparcStaticInst::completeAcc(Packet *pkt, ExecContext *xc, Trace::InstRecord *trace_data) constgem5::StaticInstinlinevirtual
countgem5::RefCountedmutableprivate
decref() constgem5::RefCountedinline
destRegIdx(int i) constgem5::StaticInstinline
disassemble(Addr pc, const loader::SymbolTable *symtab=nullptr) constgem5::StaticInstvirtual
execute(ExecContext *, Trace::InstRecord *) const overridegem5::SparcISA::SparcMacroInstinlineprotectedvirtual
fetchMicroop(MicroPC upc) const overridegem5::SparcISA::SparcMacroInstinlineprotectedvirtual
flagsgem5::StaticInstprotected
generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const overridegem5::SparcISA::SparcMacroInstprotectedvirtual
getEMI() constgem5::StaticInstinlinevirtual
getName()gem5::StaticInstinline
incref() constgem5::RefCountedinline
initiateAcc(ExecContext *, Trace::InstRecord *) const overridegem5::SparcISA::SparcMacroInstinlineprotectedvirtual
isAtomic() constgem5::StaticInstinline
isCall() constgem5::StaticInstinline
isCondCtrl() constgem5::StaticInstinline
isControl() constgem5::StaticInstinline
isDataPrefetch() constgem5::StaticInstinline
isDelayedCommit() constgem5::StaticInstinline
isDirectCtrl() constgem5::StaticInstinline
isFirstMicroop() constgem5::StaticInstinline
isFloating() constgem5::StaticInstinline
isFullMemBarrier() constgem5::StaticInstinline
isHtmCancel() constgem5::StaticInstinline
isHtmCmd() constgem5::StaticInstinline
isHtmStart() constgem5::StaticInstinline
isHtmStop() constgem5::StaticInstinline
isIndirectCtrl() constgem5::StaticInstinline
isInstPrefetch() constgem5::StaticInstinline
isInteger() constgem5::StaticInstinline
isLastMicroop() constgem5::StaticInstinline
isLoad() constgem5::StaticInstinline
isMacroop() constgem5::StaticInstinline
isMemRef() constgem5::StaticInstinline
isMicroop() constgem5::StaticInstinline
isNonSpeculative() constgem5::StaticInstinline
isNop() constgem5::StaticInstinline
isPrefetch() constgem5::StaticInstinline
isQuiesce() constgem5::StaticInstinline
isReadBarrier() constgem5::StaticInstinline
isReturn() constgem5::StaticInstinline
isSerializeAfter() constgem5::StaticInstinline
isSerializeBefore() constgem5::StaticInstinline
isSerializing() constgem5::StaticInstinline
isSquashAfter() constgem5::StaticInstinline
isStore() constgem5::StaticInstinline
isStoreConditional() constgem5::StaticInstinline
isSyscall() constgem5::StaticInstinline
isUncondCtrl() constgem5::StaticInstinline
isUnverifiable() constgem5::StaticInstinline
isVector() constgem5::StaticInstinline
isWriteBarrier() constgem5::StaticInstinline
machInstgem5::SparcISA::SparcStaticInstprotected
microopsgem5::SparcISA::SparcMacroInstprotected
mnemonicgem5::StaticInstprotected
nullStaticInstPtrgem5::StaticInststatic
numCCDestRegs() constgem5::StaticInstinline
numDestRegs() constgem5::StaticInstinline
numFPDestRegs() constgem5::StaticInstinline
numIntDestRegs() constgem5::StaticInstinline
numMicroopsgem5::SparcISA::SparcMacroInstprotected
numSrcRegs() constgem5::StaticInstinline
numVecDestRegs() constgem5::StaticInstinline
numVecElemDestRegs() constgem5::StaticInstinline
numVecPredDestRegs() constgem5::StaticInstinline
opClass() constgem5::StaticInstinline
operator=(const RefCounted &)gem5::RefCountedprivate
passesCondition(uint32_t codes, uint32_t condition)gem5::SparcISA::SparcStaticInstprotectedstatic
passesFpCondition(uint32_t fcc, uint32_t condition)gem5::SparcISA::SparcStaticInstprotectedstatic
printDestReg(std::ostream &os, int reg) constgem5::SparcISA::SparcStaticInstprotected
printFlags(std::ostream &outs, const std::string &separator) constgem5::StaticInst
printMnemonic(std::ostream &os, const char *mnemonic)gem5::SparcISA::SparcStaticInstprotectedstatic
printReg(std::ostream &os, RegId reg)gem5::SparcISA::SparcStaticInstprotectedstatic
printRegArray(std::ostream &os, const RegId *indexArray, int num) constgem5::SparcISA::SparcStaticInstprotected
printSrcReg(std::ostream &os, int reg) constgem5::SparcISA::SparcStaticInstprotected
RefCounted(const RefCounted &)gem5::RefCountedprivate
RefCounted()gem5::RefCountedinline
RegIdArrayPtr typedefgem5::StaticInst
setDelayedCommit()gem5::StaticInstinline
setDestRegIdx(int i, const RegId &val)gem5::StaticInstinline
setFirstMicroop()gem5::StaticInstinline
setFlag(Flags f)gem5::StaticInstinline
setLastMicroop()gem5::StaticInstinline
setRegIdxArrays(RegIdArrayPtr src, RegIdArrayPtr dest)gem5::StaticInstinlineprotected
setSrcRegIdx(int i, const RegId &val)gem5::StaticInstinline
simpleAsBytes(void *buf, size_t max_size, const T &t)gem5::StaticInstinlineprotected
SparcMacroInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass, uint32_t _numMicroops)gem5::SparcISA::SparcMacroInstinlineprotected
SparcStaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)gem5::SparcISA::SparcStaticInstinlineprotected
srcRegIdx(int i) constgem5::StaticInstinline
StaticInst(const char *_mnemonic, OpClass op_class)gem5::StaticInstinlineprotected
~RefCounted()gem5::RefCountedinlinevirtual
~SparcMacroInst()gem5::SparcISA::SparcMacroInstinlineprotected
~StaticInst()gem5::StaticInstinlinevirtual

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