gem5 v24.0.0.0
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Base class for all SPARC static instructions. More...
#include <static_inst.hh>
Protected Member Functions | |
SparcStaticInst (const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass) | |
std::string | generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override |
Internal function to generate disassembly string. | |
void | printSrcReg (std::ostream &os, int reg) const |
void | printDestReg (std::ostream &os, int reg) const |
void | printRegArray (std::ostream &os, const RegId *indexArray, int num) const |
void | advancePC (PCStateBase &pcState) const override |
void | advancePC (ThreadContext *tc) const override |
size_t | asBytes (void *buf, size_t size) override |
Instruction classes can override this function to return a a representation of themselves as a blob of bytes, generally assumed to be that instructions ExtMachInst. | |
std::unique_ptr< PCStateBase > | buildRetPC (const PCStateBase &cur_pc, const PCStateBase &call_pc) const override |
Protected Member Functions inherited from gem5::StaticInst | |
void | setRegIdxArrays (RegIdArrayPtr src, RegIdArrayPtr dest) |
Set the pointers which point to the arrays of source and destination register indices. | |
StaticInst (const char *_mnemonic, OpClass op_class) | |
Constructor. | |
template<typename T > | |
size_t | simpleAsBytes (void *buf, size_t max_size, const T &t) |
Static Protected Member Functions | |
static void | printMnemonic (std::ostream &os, const char *mnemonic) |
static void | printReg (std::ostream &os, RegId reg) |
static bool | passesFpCondition (uint32_t fcc, uint32_t condition) |
static bool | passesCondition (uint32_t codes, uint32_t condition) |
Protected Attributes | |
ExtMachInst | machInst |
Protected Attributes inherited from gem5::StaticInst | |
std::bitset< Num_Flags > | flags |
Flag values for this instruction. | |
OpClass | _opClass |
See opClass(). | |
uint8_t | _numSrcRegs = 0 |
See numSrcRegs(). | |
uint8_t | _numDestRegs = 0 |
See numDestRegs(). | |
std::array< uint8_t, MiscRegClass+1 > | _numTypedDestRegs = {} |
size_t | _size = 0 |
Instruction size in bytes. | |
const char * | mnemonic |
Base mnemonic (e.g., "add"). | |
std::unique_ptr< std::string > | cachedDisassembly |
String representation of disassembly (lazily evaluated via disassemble()). | |
Additional Inherited Members | |
Public Types inherited from gem5::StaticInst | |
using | RegIdArrayPtr = RegId (StaticInst:: *)[] |
Public Member Functions inherited from gem5::StaticInst | |
uint8_t | numSrcRegs () const |
Number of source registers. | |
uint8_t | numDestRegs () const |
Number of destination registers. | |
uint8_t | numDestRegs (RegClassType type) const |
Number of destination registers of a particular type. | |
bool | isNop () const |
bool | isMemRef () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isStoreConditional () const |
bool | isInstPrefetch () const |
bool | isDataPrefetch () const |
bool | isPrefetch () const |
bool | isInteger () const |
bool | isFloating () const |
bool | isVector () const |
bool | isMatrix () const |
bool | isControl () const |
bool | isCall () const |
bool | isReturn () const |
bool | isDirectCtrl () const |
bool | isIndirectCtrl () const |
bool | isCondCtrl () const |
bool | isUncondCtrl () const |
bool | isSerializing () const |
bool | isSerializeBefore () const |
bool | isSerializeAfter () const |
bool | isSquashAfter () const |
bool | isFullMemBarrier () const |
bool | isReadBarrier () const |
bool | isWriteBarrier () const |
bool | isNonSpeculative () const |
bool | isQuiesce () const |
bool | isUnverifiable () const |
bool | isPseudo () const |
bool | isSyscall () const |
bool | isMacroop () const |
bool | isMicroop () const |
bool | isDelayedCommit () const |
bool | isLastMicroop () const |
bool | isFirstMicroop () const |
bool | isHtmStart () const |
bool | isHtmStop () const |
bool | isHtmCancel () const |
bool | isInvalid () const |
bool | isHtmCmd () const |
void | setFirstMicroop () |
void | setLastMicroop () |
void | setDelayedCommit () |
void | setFlag (Flags f) |
OpClass | opClass () const |
Operation class. Used to select appropriate function unit in issue. | |
const RegId & | destRegIdx (int i) const |
Return logical index (architectural reg num) of i'th destination reg. | |
void | setDestRegIdx (int i, const RegId &val) |
const RegId & | srcRegIdx (int i) const |
Return logical index (architectural reg num) of i'th source reg. | |
void | setSrcRegIdx (int i, const RegId &val) |
virtual uint64_t | getEMI () const |
virtual | ~StaticInst () |
virtual Fault | execute (ExecContext *xc, trace::InstRecord *traceData) const =0 |
virtual Fault | initiateAcc (ExecContext *xc, trace::InstRecord *traceData) const |
virtual Fault | completeAcc (Packet *pkt, ExecContext *xc, trace::InstRecord *trace_data) const |
size_t | size () const |
virtual void | size (size_t newSize) |
virtual StaticInstPtr | fetchMicroop (MicroPC upc) const |
Return the microop that goes with a particular micropc. | |
virtual std::unique_ptr< PCStateBase > | branchTarget (const PCStateBase &pc) const |
Return the target address for a PC-relative branch. | |
virtual std::unique_ptr< PCStateBase > | branchTarget (ThreadContext *tc) const |
Return the target address for an indirect branch (jump). | |
virtual const std::string & | disassemble (Addr pc, const loader::SymbolTable *symtab=nullptr) const |
Return string representation of disassembled instruction. | |
void | printFlags (std::ostream &outs, const std::string &separator) const |
Print a separator separated list of this instruction's set flag names on the given stream. | |
std::string | getName () |
Return name of machine instruction. | |
Public Member Functions inherited from gem5::RefCounted | |
RefCounted () | |
We initialize the reference count to zero and the first object to take ownership of it must increment it to one. | |
virtual | ~RefCounted () |
We make the destructor virtual because we're likely to have virtual functions on reference counted objects. | |
void | incref () const |
Increment the reference count. | |
void | decref () const |
Decrement the reference count and destroy the object if all references are gone. | |
Static Public Attributes inherited from gem5::StaticInst | |
static StaticInstPtr | nullStaticInstPtr |
Pointer to a statically allocated "null" instruction object. | |
Base class for all SPARC static instructions.
Definition at line 93 of file static_inst.hh.
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inlineprotected |
Definition at line 98 of file static_inst.hh.
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overrideprotectedvirtual |
Implements gem5::StaticInst.
Definition at line 83 of file static_inst.cc.
References gem5::PCStateBase::as().
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overrideprotectedvirtual |
Reimplemented from gem5::StaticInst.
Definition at line 89 of file static_inst.cc.
References gem5::GenericISA::DelaySlotPCState< InstWidth >::advance(), gem5::PCStateBase::as(), gem5::MipsISA::pc, and gem5::ThreadContext::pcState().
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inlineoverrideprotectedvirtual |
Instruction classes can override this function to return a a representation of themselves as a blob of bytes, generally assumed to be that instructions ExtMachInst.
buf is a buffer to hold the bytes. max_size is the size allocated for that buffer by the caller. The return value is how much data was actually put into the buffer, zero if no data was put in the buffer, or the necessary size of the buffer if there wasn't enough space.
Reimplemented from gem5::StaticInst.
Definition at line 122 of file static_inst.hh.
References machInst, gem5::StaticInst::simpleAsBytes(), and gem5::StaticInst::size().
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inlineoverrideprotectedvirtual |
Reimplemented from gem5::StaticInst.
Definition at line 128 of file static_inst.hh.
References gem5::PCStateBase::as(), gem5::PCStateBase::clone(), gem5::GenericISA::PCStateWithNext::npc(), and gem5::GenericISA::DelaySlotUPCState< InstWidth >::uEnd().
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overrideprotectedvirtual |
Internal function to generate disassembly string.
Implements gem5::StaticInst.
Reimplemented in gem5::SparcISA::Trap, gem5::SparcISA::Unknown, gem5::SparcISA::WarnUnimplemented, gem5::SparcISA::WrPriv, and gem5::SparcISA::WrPrivImm.
Definition at line 265 of file static_inst.cc.
References gem5::StaticInst::_numDestRegs, gem5::StaticInst::_numSrcRegs, gem5::StaticInst::destRegIdx(), gem5::StaticInst::mnemonic, printMnemonic(), printReg(), gem5::StaticInst::srcRegIdx(), and gem5::ArmISA::ss.
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staticprotected |
Definition at line 339 of file static_inst.cc.
References gem5::SparcISA::Always, BitUnion32, gem5::SparcISA::c, gem5::SparcISA::CarryClear, gem5::SparcISA::CarrySet, EndBitUnion, gem5::SparcISA::Equal, gem5::SparcISA::Greater, gem5::SparcISA::GreaterOrEqual, gem5::SparcISA::GreaterUnsigned, gem5::SparcISA::Less, gem5::SparcISA::LessOrEqual, gem5::SparcISA::LessOrEqualUnsigned, gem5::SparcISA::n, gem5::SparcISA::Negative, gem5::SparcISA::Never, gem5::SparcISA::NotEqual, gem5::SparcISA::OverflowClear, gem5::SparcISA::OverflowSet, panic, gem5::SparcISA::Positive, gem5::SparcISA::v, and gem5::SparcISA::z.
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staticprotected |
Definition at line 294 of file static_inst.cc.
References gem5::ArmISA::e, gem5::SparcISA::FAlways, gem5::SparcISA::FEqual, gem5::SparcISA::FGreater, gem5::SparcISA::FGreaterOrEqual, gem5::SparcISA::FLess, gem5::SparcISA::FLessOrEqual, gem5::SparcISA::FLessOrGreater, gem5::SparcISA::FNever, gem5::SparcISA::FNotEqual, gem5::SparcISA::FOrdered, gem5::SparcISA::FUnordered, gem5::SparcISA::FUnorderedOrEqual, gem5::SparcISA::FUnorderedOrGreater, gem5::SparcISA::FUnorderedOrGreaterOrEqual, gem5::SparcISA::FUnorderedOrLess, gem5::SparcISA::FUnorderedOrLessOrEqual, gem5::MipsISA::g, gem5::MipsISA::l, panic, and gem5::ArmISA::u.
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protected |
Definition at line 104 of file static_inst.cc.
References gem5::StaticInst::_numDestRegs, gem5::StaticInst::destRegIdx(), gem5::X86ISA::os, printReg(), and gem5::X86ISA::reg.
Referenced by gem5::SparcISA::Branch::generateDisassembly(), gem5::SparcISA::BranchImm13::generateDisassembly(), gem5::SparcISA::IntOp::generateDisassembly(), gem5::SparcISA::IntOpImm::generateDisassembly(), gem5::SparcISA::RdPriv::generateDisassembly(), gem5::SparcISA::SetHi::generateDisassembly(), gem5::SparcISA::IntOp::printPseudoOps(), and gem5::SparcISA::IntOpImm::printPseudoOps().
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staticprotected |
Definition at line 64 of file static_inst.cc.
References gem5::ccprintf(), gem5::StaticInst::mnemonic, and gem5::X86ISA::os.
Referenced by gem5::SparcISA::BlockMemImmMicro::generateDisassembly(), gem5::SparcISA::BlockMemMicro::generateDisassembly(), gem5::SparcISA::Branch::generateDisassembly(), gem5::SparcISA::BranchDisp::generateDisassembly(), gem5::SparcISA::BranchImm13::generateDisassembly(), gem5::SparcISA::IntOp::generateDisassembly(), gem5::SparcISA::IntOpImm::generateDisassembly(), gem5::SparcISA::Mem::generateDisassembly(), gem5::SparcISA::MemImm::generateDisassembly(), gem5::SparcISA::Nop::generateDisassembly(), gem5::SparcISA::Priv::generateDisassembly(), gem5::SparcISA::RdPriv::generateDisassembly(), gem5::SparcISA::SetHi::generateDisassembly(), gem5::SparcISA::SparcMacroInst::generateDisassembly(), generateDisassembly(), gem5::SparcISA::Trap::generateDisassembly(), gem5::SparcISA::WrPriv::generateDisassembly(), gem5::SparcISA::WrPrivImm::generateDisassembly(), gem5::SparcISA::IntOp::printPseudoOps(), and gem5::SparcISA::IntOpImm::printPseudoOps().
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staticprotected |
Definition at line 111 of file static_inst.cc.
References gem5::ccprintf(), gem5::FloatRegClass, gem5::SparcISA::FramePointerReg, gem5::IntRegClass, gem5::SparcISA::MISCREG_ASI, gem5::SparcISA::MISCREG_CWP, gem5::SparcISA::MISCREG_FPRS, gem5::SparcISA::MISCREG_FSR, gem5::SparcISA::MISCREG_GL, gem5::SparcISA::MISCREG_GSR, gem5::SparcISA::MISCREG_HINTP, gem5::SparcISA::MISCREG_HPSTATE, gem5::SparcISA::MISCREG_HSTICK_CMPR, gem5::SparcISA::MISCREG_HTBA, gem5::SparcISA::MISCREG_HTSTATE, gem5::SparcISA::MISCREG_HVER, gem5::SparcISA::MISCREG_PCR, gem5::SparcISA::MISCREG_PIC, gem5::SparcISA::MISCREG_PIL, gem5::SparcISA::MISCREG_PSTATE, gem5::SparcISA::MISCREG_SOFTINT, gem5::SparcISA::MISCREG_SOFTINT_CLR, gem5::SparcISA::MISCREG_SOFTINT_SET, gem5::SparcISA::MISCREG_STICK, gem5::SparcISA::MISCREG_STICK_CMPR, gem5::SparcISA::MISCREG_STRAND_STS_REG, gem5::SparcISA::MISCREG_TBA, gem5::SparcISA::MISCREG_TICK, gem5::SparcISA::MISCREG_TICK_CMPR, gem5::SparcISA::MISCREG_TL, gem5::SparcISA::MISCREG_TNPC, gem5::SparcISA::MISCREG_TPC, gem5::SparcISA::MISCREG_TSTATE, gem5::SparcISA::MISCREG_TT, gem5::X86ISA::os, gem5::X86ISA::reg, and gem5::SparcISA::StackPointerReg.
Referenced by gem5::SparcISA::BlockMemImmMicro::generateDisassembly(), gem5::SparcISA::BlockMemMicro::generateDisassembly(), gem5::SparcISA::Mem::generateDisassembly(), gem5::SparcISA::MemImm::generateDisassembly(), generateDisassembly(), gem5::SparcISA::Trap::generateDisassembly(), printDestReg(), printRegArray(), and printSrcReg().
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Definition at line 70 of file static_inst.cc.
References gem5::X86ISA::os, printReg(), and gem5::RiscvISA::x.
Referenced by gem5::SparcISA::Branch::generateDisassembly(), gem5::SparcISA::BranchImm13::generateDisassembly(), gem5::SparcISA::IntOp::generateDisassembly(), and gem5::SparcISA::IntOpImm::generateDisassembly().
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Definition at line 97 of file static_inst.cc.
References gem5::StaticInst::_numSrcRegs, gem5::X86ISA::os, printReg(), gem5::X86ISA::reg, and gem5::StaticInst::srcRegIdx().
Referenced by gem5::SparcISA::Mem::generateDisassembly(), gem5::SparcISA::WrPriv::generateDisassembly(), gem5::SparcISA::WrPrivImm::generateDisassembly(), gem5::SparcISA::IntOp::printPseudoOps(), and gem5::SparcISA::IntOpImm::printPseudoOps().
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protected |
Definition at line 96 of file static_inst.hh.
Referenced by asBytes(), and gem5::SparcISA::FailUnimplemented::execute().