gem5  v22.1.0.0
gem5::X86ISA::Decoder Member List

This is the complete list of members for gem5::X86ISA::Decoder, including all inherited members.

_drainManagergem5::Drainableprivate
_drainStategem5::Drainablemutableprivate
_moreBytesPtrgem5::InstDecoderprotected
_moreBytesSizegem5::InstDecoderprotected
_namegem5::Namedprivate
_objNameResolvergem5::SimObjectprivatestatic
_paramsgem5::SimObjectprotected
_pcMaskgem5::InstDecoderprotected
AddrCacheMap typedefgem5::X86ISA::Decoderprotected
addrCacheMapgem5::X86ISA::Decoderprotected
addStat(statistics::Info *info)gem5::statistics::Group
addStatGroup(const char *name, Group *block)gem5::statistics::Group
altAddrgem5::X86ISA::Decoderprotected
altOpgem5::X86ISA::Decoderprotected
as()gem5::InstDecoderinline
as() constgem5::InstDecoderinline
basePCgem5::X86ISA::Decoderprotected
ByteTable typedefgem5::X86ISA::Decoderprivate
CacheKey typedefgem5::X86ISA::Decoderprotected
chunkIdxgem5::X86ISA::Decoderprotected
consumeByte()gem5::X86ISA::Decoderinlineprotected
consumeBytes(int numBytes)gem5::X86ISA::Decoderinlineprotected
cplgem5::X86ISA::Decoderprotected
currentSection()gem5::Serializablestatic
decode(ExtMachInst mach_inst, Addr addr)gem5::X86ISA::Decoderprotected
decode(PCStateBase &next_pc) overridegem5::X86ISA::Decodervirtual
decodeInst(ExtMachInst mach_inst)gem5::X86ISA::Decoderprotected
DecodePages typedefgem5::X86ISA::Decoderprotected
decodePagesgem5::X86ISA::Decoderprotected
Decoder(const X86DecoderParams &p)gem5::X86ISA::Decoderinline
defAddrgem5::X86ISA::Decoderprotected
defOpgem5::X86ISA::Decoderprotected
deschedule(Event &event)gem5::EventManagerinline
deschedule(Event *event)gem5::EventManagerinline
displacementSizegem5::X86ISA::Decoderprotected
DisplacementState enum valuegem5::X86ISA::Decoderprotected
dmDrain()gem5::Drainableprivate
dmDrainResume()gem5::Drainableprivate
doDisplacementState()gem5::X86ISA::Decoderprotected
doFromCacheState()gem5::X86ISA::Decoderprotected
doImmediateState()gem5::X86ISA::Decoderprotected
doModRMState(uint8_t)gem5::X86ISA::Decoderprotected
doOneByteOpcodeState(uint8_t)gem5::X86ISA::Decoderprotected
doPrefixState(uint8_t)gem5::X86ISA::Decoderprotected
doResetState()gem5::X86ISA::Decoderprotected
doSIBState(uint8_t)gem5::X86ISA::Decoderprotected
doThreeByte0F38OpcodeState(uint8_t)gem5::X86ISA::Decoderprotected
doThreeByte0F3AOpcodeState(uint8_t)gem5::X86ISA::Decoderprotected
doTwoByteOpcodeState(uint8_t)gem5::X86ISA::Decoderprotected
doVex2Of2State(uint8_t)gem5::X86ISA::Decoderprotected
doVex2Of3State(uint8_t)gem5::X86ISA::Decoderprotected
doVex3Of3State(uint8_t)gem5::X86ISA::Decoderprotected
doVexOpcodeState(uint8_t)gem5::X86ISA::Decoderprotected
drain() overridegem5::SimObjectinlinevirtual
Drainable()gem5::Drainableprotected
drainResume()gem5::Drainableinlineprotectedvirtual
drainState() constgem5::Drainableinline
dummygem5::X86ISA::Decoderprotectedstatic
emigem5::X86ISA::Decoderprotected
ErrorState enum valuegem5::X86ISA::Decoderprotected
EventManager(EventManager &em)gem5::EventManagerinline
EventManager(EventManager *em)gem5::EventManagerinline
EventManager(EventQueue *eq)gem5::EventManagerinline
eventqgem5::EventManagerprotected
eventQueue() constgem5::EventManagerinline
fetchChunkgem5::X86ISA::Decoderprotected
fetchRomMicroop(MicroPC micropc, StaticInstPtr curMacroop) overridegem5::X86ISA::Decodervirtual
find(const char *name)gem5::SimObjectstatic
FromCacheState enum valuegem5::X86ISA::Decoderprotected
generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream)gem5::Serializablestatic
getImmediate(int &collected, uint64_t &current, int size)gem5::X86ISA::Decoderinlineprotected
getNextByte()gem5::X86ISA::Decoderinlineprotected
getPort(const std::string &if_name, PortID idx=InvalidPortID)gem5::SimObjectvirtual
getProbeManager()gem5::SimObject
getSimObjectResolver()gem5::SimObjectstatic
getStatGroups() constgem5::statistics::Group
getStats() constgem5::statistics::Group
Group()=deletegem5::statistics::Group
Group(const Group &)=deletegem5::statistics::Group
Group(Group *parent, const char *name=nullptr)gem5::statistics::Group
immediateCollectedgem5::X86ISA::Decoderprotected
immediateSizegem5::X86ISA::Decoderprotected
ImmediateState enum valuegem5::X86ISA::Decoderprotected
ImmediateTypeOneBytegem5::X86ISA::Decoderprivatestatic
ImmediateTypeThreeByte0F38gem5::X86ISA::Decoderprivatestatic
ImmediateTypeThreeByte0F3Agem5::X86ISA::Decoderprivatestatic
ImmediateTypeTwoBytegem5::X86ISA::Decoderprivatestatic
init()gem5::SimObjectvirtual
initState()gem5::SimObjectvirtual
instBytesgem5::X86ISA::Decoderprotected
instCacheMapgem5::X86ISA::Decoderprotectedstatic
InstCacheMap typedefgem5::X86ISA::Decoderprotected
InstDecoder(const InstDecoderParams &params, MoreBytesType *mb_buf)gem5::InstDecoderinline
instDonegem5::InstDecoderprotected
instMapgem5::X86ISA::Decoderprotected
instReady() constgem5::InstDecoderinline
loadState(CheckpointIn &cp)gem5::SimObjectvirtual
MachInst typedefgem5::X86ISA::Decoderprotected
memInvalidate()gem5::SimObjectinlinevirtual
memWriteback()gem5::SimObjectinlinevirtual
mergedParentgem5::statistics::Groupprivate
mergedStatGroupsgem5::statistics::Groupprivate
mergeStatGroup(Group *block)gem5::statistics::Group
microcodeRomgem5::X86ISA::Decoderprivatestatic
modegem5::X86ISA::Decoderprotected
ModRMState enum valuegem5::X86ISA::Decoderprotected
moreBytes(const PCStateBase &pc, Addr fetchPC) overridegem5::X86ISA::Decoderinlinevirtual
moreBytesPtr() constgem5::InstDecoderinline
moreBytesSize() constgem5::InstDecoderinline
name() constgem5::Namedinlinevirtual
Named(const std::string &name_)gem5::Namedinline
needMoreBytes() constgem5::InstDecoderinline
notifyFork()gem5::Drainableinlinevirtual
offsetgem5::X86ISA::Decoderprotected
OneByteOpcodeState enum valuegem5::X86ISA::Decoderprotected
operator=(const Group &)=deletegem5::statistics::Group
origPCgem5::X86ISA::Decoderprotected
outOfBytesgem5::InstDecoderprotected
params() constgem5::SimObjectinline
Params typedefgem5::SimObject
pathgem5::Serializableprivatestatic
pcMask() constgem5::InstDecoderinline
preDumpStats()gem5::statistics::Groupvirtual
Prefixesgem5::X86ISA::Decoderprivatestatic
PrefixState enum valuegem5::X86ISA::Decoderprotected
probeManagergem5::SimObjectprivate
process()gem5::X86ISA::Decoderprotected
processExtendedOpcode(ByteTable &immTable)gem5::X86ISA::Decoderprotected
processOpcode(ByteTable &immTable, ByteTable &modrmTable, bool addrSizedImm=false)gem5::X86ISA::Decoderprotected
regProbeListeners()gem5::SimObjectvirtual
regProbePoints()gem5::SimObjectvirtual
regStats()gem5::statistics::Groupvirtual
reschedule(Event &event, Tick when, bool always=false)gem5::EventManagerinline
reschedule(Event *event, Tick when, bool always=false)gem5::EventManagerinline
reset() overridegem5::X86ISA::Decoderinlinevirtual
ResetState enum valuegem5::X86ISA::Decoderprotected
resetStats()gem5::statistics::Groupvirtual
resolveStat(std::string name) constgem5::statistics::Group
schedule(Event &event, Tick when)gem5::EventManagerinline
schedule(Event *event, Tick when)gem5::EventManagerinline
Serializable()gem5::Serializable
serialize(CheckpointOut &cp) const overridegem5::SimObjectinlinevirtual
serializeAll(const std::string &cpt_dir)gem5::SimObjectstatic
serializeSection(CheckpointOut &cp, const char *name) constgem5::Serializable
serializeSection(CheckpointOut &cp, const std::string &name) constgem5::Serializableinline
setCurTick(Tick newVal)gem5::EventManagerinline
setM5Reg(HandyM5Reg m5Reg)gem5::X86ISA::Decoderinline
setSimObjectResolver(SimObjectResolver *resolver)gem5::SimObjectstatic
SIBState enum valuegem5::X86ISA::Decoderprotected
signalDrainDone() constgem5::Drainableinlineprotected
SimObject(const Params &p)gem5::SimObject
SimObjectList typedefgem5::SimObjectprivate
simObjectListgem5::SimObjectprivatestatic
SizeTypeToSizegem5::X86ISA::Decoderprivatestatic
stackgem5::X86ISA::Decoderprotected
startup()gem5::SimObjectvirtual
State enum namegem5::X86ISA::Decoderprotected
stategem5::X86ISA::Decoderprotected
statGroupsgem5::statistics::Groupprivate
statsgem5::statistics::Groupprivate
submodegem5::X86ISA::Decoderprotected
takeOverFrom(InstDecoder *old) overridegem5::X86ISA::Decoderinlinevirtual
ThreeByte0F38OpcodeState enum valuegem5::X86ISA::Decoderprotected
ThreeByte0F3AOpcodeState enum valuegem5::X86ISA::Decoderprotected
TwoByteOpcodeState enum valuegem5::X86ISA::Decoderprotected
unserialize(CheckpointIn &cp) overridegem5::SimObjectinlinevirtual
unserializeSection(CheckpointIn &cp, const char *name)gem5::Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)gem5::Serializableinline
updateNPC(X86ISA::PCState &nextPC)gem5::X86ISA::Decoderinline
updateOffsetState()gem5::X86ISA::Decoderinlineprotected
UsesModRMOneBytegem5::X86ISA::Decoderprivatestatic
UsesModRMThreeByte0F38gem5::X86ISA::Decoderprivatestatic
UsesModRMThreeByte0F3Agem5::X86ISA::Decoderprivatestatic
UsesModRMTwoBytegem5::X86ISA::Decoderprivatestatic
Vex2Of2State enum valuegem5::X86ISA::Decoderprotected
Vex2Of3State enum valuegem5::X86ISA::Decoderprotected
Vex3Of3State enum valuegem5::X86ISA::Decoderprotected
VexOpcodeState enum valuegem5::X86ISA::Decoderprotected
wakeupEventQueue(Tick when=(Tick) -1)gem5::EventManagerinline
~Drainable()gem5::Drainableprotectedvirtual
~Group()gem5::statistics::Groupvirtual
~Named()=defaultgem5::Namedvirtual
~Serializable()gem5::Serializablevirtual
~SimObject()gem5::SimObjectvirtual

Generated on Wed Dec 21 2022 10:25:03 for gem5 by doxygen 1.9.1