gem5  v21.2.0.0
gem5::X86ISA::LdStSplitOp Member List

This is the complete list of members for gem5::X86ISA::LdStSplitOp, including all inherited members.

_destRegIdxPtrgem5::StaticInstprivate
_numCCDestRegsgem5::StaticInstprotected
_numDestRegsgem5::StaticInstprotected
_numFPDestRegsgem5::StaticInstprotected
_numIntDestRegsgem5::StaticInstprotected
_numSrcRegsgem5::StaticInstprotected
_numVecDestRegsgem5::StaticInstprotected
_numVecElemDestRegsgem5::StaticInstprotected
_numVecPredDestRegsgem5::StaticInstprotected
_opClassgem5::StaticInstprotected
_srcRegIdxPtrgem5::StaticInstprivate
addressSizegem5::X86ISA::MemOp
addrSizegem5::X86ISA::X86MicroopBaseprotected
advancePC(PCStateBase &pcState) const overridegem5::X86ISA::X86MicroopBaseinlineprotectedvirtual
advancePC(ThreadContext *tc) const overridegem5::X86ISA::X86MicroopBaseinlineprotectedvirtual
ArgTuple typedefgem5::X86ISA::InstOperands< MemOp, FoldedDataLowOp, FoldedDataHiOp, AddrOp >private
asBytes(void *buf, size_t max_size)gem5::StaticInstinlinevirtual
branchTarget(const PCStateBase &branch_pc) const overridegem5::X86ISA::X86MicroopBaseprotectedvirtual
branchTarget(const PCStateBase &pc) constgem5::X86ISA::X86MicroopBaseprotected
branchTarget(ThreadContext *tc) constgem5::X86ISA::X86MicroopBaseprotected
gem5::X86ISA::X86StaticInst::branchTarget(ThreadContext *tc) constgem5::StaticInstvirtual
buildRetPC(const PCStateBase &cur_pc, const PCStateBase &call_pc) const overridegem5::X86ISA::X86StaticInstinlineprotectedvirtual
cachedDisassemblygem5::StaticInstmutableprotected
checkCondition(uint64_t flags, int condition) constgem5::X86ISA::X86MicroopBaseprotected
completeAcc(Packet *pkt, ExecContext *xc, Trace::InstRecord *trace_data) constgem5::StaticInstinlinevirtual
countgem5::RefCountedmutableprivate
dataSizegem5::X86ISA::MemOp
decref() constgem5::RefCountedinline
destRegIdx(int i) constgem5::StaticInstinline
disassemble(Addr pc, const loader::SymbolTable *symtab=nullptr) constgem5::StaticInstvirtual
divideStep(uint64_t divident, uint64_t divisor, uint64_t &quotient, uint64_t &remainder)gem5::X86ISA::X86StaticInstprotectedstatic
execute(ExecContext *xc, Trace::InstRecord *traceData) const =0gem5::StaticInstpure virtual
ExtMachInst typedefgem5::X86ISA::X86StaticInstprotected
fetchMicroop(MicroPC upc) constgem5::StaticInstvirtual
flagsgem5::StaticInstprotected
foldABitgem5::X86ISA::MemOp
foldOBitgem5::X86ISA::MemOp
generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const overridegem5::X86ISA::InstOperands< MemOp, FoldedDataLowOp, FoldedDataHiOp, AddrOp >inlineprotectedvirtual
getEMI() constgem5::StaticInstinlinevirtual
getName()gem5::StaticInstinline
incref() constgem5::RefCountedinline
initiateAcc(ExecContext *xc, Trace::InstRecord *traceData) constgem5::StaticInstinlinevirtual
instMnemgem5::X86ISA::X86MicroopBaseprotected
InstOperands(std::index_sequence< I... >, ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class,[[maybe_unused]] ArgTuple args, CTorArgs... ctor_args)gem5::X86ISA::InstOperands< MemOp, FoldedDataLowOp, FoldedDataHiOp, AddrOp >inlineprivate
InstOperands(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, ArgTuple args, CTorArgs... ctor_args)gem5::X86ISA::InstOperands< MemOp, FoldedDataLowOp, FoldedDataHiOp, AddrOp >inlineprotected
isAtomic() constgem5::StaticInstinline
isCall() constgem5::StaticInstinline
isCondCtrl() constgem5::StaticInstinline
isControl() constgem5::StaticInstinline
isDataPrefetch() constgem5::StaticInstinline
isDelayedCommit() constgem5::StaticInstinline
isDirectCtrl() constgem5::StaticInstinline
isFirstMicroop() constgem5::StaticInstinline
isFloating() constgem5::StaticInstinline
isFullMemBarrier() constgem5::StaticInstinline
isHtmCancel() constgem5::StaticInstinline
isHtmCmd() constgem5::StaticInstinline
isHtmStart() constgem5::StaticInstinline
isHtmStop() constgem5::StaticInstinline
isIndirectCtrl() constgem5::StaticInstinline
isInstPrefetch() constgem5::StaticInstinline
isInteger() constgem5::StaticInstinline
isLastMicroop() constgem5::StaticInstinline
isLoad() constgem5::StaticInstinline
isMacroop() constgem5::StaticInstinline
isMemRef() constgem5::StaticInstinline
isMicroop() constgem5::StaticInstinline
isNonSpeculative() constgem5::StaticInstinline
isNop() constgem5::StaticInstinline
isPrefetch() constgem5::StaticInstinline
isQuiesce() constgem5::StaticInstinline
isReadBarrier() constgem5::StaticInstinline
isReturn() constgem5::StaticInstinline
isSerializeAfter() constgem5::StaticInstinline
isSerializeBefore() constgem5::StaticInstinline
isSerializing() constgem5::StaticInstinline
isSquashAfter() constgem5::StaticInstinline
isStore() constgem5::StaticInstinline
isStoreConditional() constgem5::StaticInstinline
isSyscall() constgem5::StaticInstinline
isUncondCtrl() constgem5::StaticInstinline
isUnverifiable() constgem5::StaticInstinline
isVector() constgem5::StaticInstinline
isWriteBarrier() constgem5::StaticInstinline
LdStSplitOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, GpRegIndex data_low, GpRegIndex data_hi, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)gem5::X86ISA::LdStSplitOpinlineprotected
machInstgem5::X86ISA::X86StaticInst
memFlagsgem5::X86ISA::MemOpprotected
MemOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags)gem5::X86ISA::MemOpinlineprotected
merge(uint64_t into, RegIndex index, uint64_t val, int size)gem5::X86ISA::X86StaticInstinlineprotectedstatic
mnemonicgem5::StaticInstprotected
nullStaticInstPtrgem5::StaticInststatic
numCCDestRegs() constgem5::StaticInstinline
numDestRegs() constgem5::StaticInstinline
numFPDestRegs() constgem5::StaticInstinline
numIntDestRegs() constgem5::StaticInstinline
numSrcRegs() constgem5::StaticInstinline
numVecDestRegs() constgem5::StaticInstinline
numVecElemDestRegs() constgem5::StaticInstinline
numVecPredDestRegs() constgem5::StaticInstinline
opClass() constgem5::StaticInstinline
operator=(const RefCounted &)gem5::RefCountedprivate
opSizegem5::X86ISA::X86MicroopBaseprotected
pick(uint64_t from, RegIndex index, int size)gem5::X86ISA::X86StaticInstinlineprotectedstatic
printFlags(std::ostream &outs, const std::string &separator) constgem5::StaticInst
printMem(std::ostream &os, uint8_t segment, uint8_t scale, RegIndex index, RegIndex base, uint64_t disp, uint8_t addressSize, bool rip)gem5::X86ISA::X86StaticInststatic
printMnemonic(std::ostream &os, const char *mnemonic)gem5::X86ISA::X86StaticInststatic
printMnemonic(std::ostream &os, const char *instMnemonic, const char *mnemonic)gem5::X86ISA::X86StaticInststatic
printReg(std::ostream &os, RegId reg, int size)gem5::X86ISA::X86StaticInststatic
printSegment(std::ostream &os, int segment)gem5::X86ISA::X86StaticInststatic
RefCounted(const RefCounted &)gem5::RefCountedprivate
RefCounted()gem5::RefCountedinline
RegIdArrayPtr typedefgem5::StaticInst
setDelayedCommit()gem5::StaticInstinline
setDestRegIdx(int i, const RegId &val)gem5::StaticInstinline
setFirstMicroop()gem5::StaticInstinline
setFlag(Flags f)gem5::StaticInstinline
setLastMicroop()gem5::StaticInstinline
setRegIdxArrays(RegIdArrayPtr src, RegIdArrayPtr dest)gem5::StaticInstinlineprotected
setSrcRegIdx(int i, const RegId &val)gem5::StaticInstinline
signedPick(uint64_t from, RegIndex index, int size)gem5::X86ISA::X86StaticInstinlineprotectedstatic
simpleAsBytes(void *buf, size_t max_size, const T &t)gem5::StaticInstinlineprotected
srcRegIdx(int i) constgem5::StaticInstinline
StaticInst(const char *_mnemonic, OpClass op_class)gem5::StaticInstinlineprotected
X86MicroopBase(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, OpClass __opClass)gem5::X86ISA::X86MicroopBaseinlineprotected
X86StaticInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass)gem5::X86ISA::X86StaticInstinlineprotected
~RefCounted()gem5::RefCountedinlinevirtual
~StaticInst()gem5::StaticInstinlinevirtual

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