gem5  v21.1.0.2
Protected Member Functions | Protected Attributes | List of all members
gem5::X86ISA::X86MicroopBase Class Reference

#include <microop.hh>

Inheritance diagram for gem5::X86ISA::X86MicroopBase:
gem5::X86ISA::X86StaticInst gem5::StaticInst gem5::RefCounted gem5::X86ISA::FpOp gem5::X86ISA::MediaOpBase gem5::X86ISA::MemOp gem5::X86ISA::MicroCondBase gem5::X86ISA::MicroDebug gem5::X86ISA::RegOpBase gem5::X86ISA::InstOperands< X86MicroopBase > gem5::X86ISA::InstOperands< MemOp, AddrOp > gem5::X86ISA::InstOperands< MemOp, FloatDataOp, AddrOp > gem5::X86ISA::InstOperands< MemOp, FoldedDataLowOp, FoldedDataHiOp, AddrOp > gem5::X86ISA::InstOperands< MemOp, FoldedDataOp, AddrOp > gem5::X86ISA::MicroHalt gem5::X86ISA::MemNoDataOp gem5::X86ISA::LdStFpOp gem5::X86ISA::LdStSplitOp gem5::X86ISA::LdStOp

Protected Member Functions

 X86MicroopBase (ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, OpClass __opClass)
 
std::string generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override
 Internal function to generate disassembly string. More...
 
bool checkCondition (uint64_t flags, int condition) const
 
void advancePC (PCState &pcState) const override
 
PCState branchTarget (const PCState &branchPC) const override
 
virtual TheISA::PCState branchTarget (const TheISA::PCState &pc) const
 Return the target address for a PC-relative branch. More...
 
virtual TheISA::PCState branchTarget (ThreadContext *tc) const
 Return the target address for an indirect branch (jump). More...
 
- Protected Member Functions inherited from gem5::X86ISA::X86StaticInst
 X86StaticInst (const char *mnem, ExtMachInst _machInst, OpClass __opClass)
 
std::string generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override
 Internal function to generate disassembly string. More...
 
void advancePC (PCState &pcState) const override
 
PCState buildRetPC (const PCState &curPC, const PCState &callPC) const override
 
- Protected Member Functions inherited from gem5::StaticInst
void setRegIdxArrays (RegIdArrayPtr src, RegIdArrayPtr dest)
 Set the pointers which point to the arrays of source and destination register indices. More...
 
 StaticInst (const char *_mnemonic, OpClass op_class)
 Constructor. More...
 
template<typename T >
size_t simpleAsBytes (void *buf, size_t max_size, const T &t)
 

Protected Attributes

const char * instMnem
 
uint8_t opSize
 
uint8_t addrSize
 
- Protected Attributes inherited from gem5::StaticInst
std::bitset< Num_Flags > flags
 Flag values for this instruction. More...
 
OpClass _opClass
 See opClass(). More...
 
int8_t _numSrcRegs = 0
 See numSrcRegs(). More...
 
int8_t _numDestRegs = 0
 See numDestRegs(). More...
 
int8_t _numFPDestRegs = 0
 The following are used to track physical register usage for machines with separate int & FP reg files. More...
 
int8_t _numIntDestRegs = 0
 
int8_t _numCCDestRegs = 0
 
int8_t _numVecDestRegs = 0
 To use in architectures with vector register file. More...
 
int8_t _numVecElemDestRegs = 0
 
int8_t _numVecPredDestRegs = 0
 
const char * mnemonic
 Base mnemonic (e.g., "add"). More...
 
std::unique_ptr< std::string > cachedDisassembly
 String representation of disassembly (lazily evaluated via disassemble()). More...
 

Additional Inherited Members

- Public Types inherited from gem5::StaticInst
using RegIdArrayPtr = RegId(StaticInst::*)[]
 
- Public Member Functions inherited from gem5::StaticInst
int8_t numSrcRegs () const
 Number of source registers. More...
 
int8_t numDestRegs () const
 Number of destination registers. More...
 
int8_t numFPDestRegs () const
 Number of floating-point destination regs. More...
 
int8_t numIntDestRegs () const
 Number of integer destination regs. More...
 
int8_t numVecDestRegs () const
 Number of vector destination regs. More...
 
int8_t numVecElemDestRegs () const
 Number of vector element destination regs. More...
 
int8_t numVecPredDestRegs () const
 Number of predicate destination regs. More...
 
int8_t numCCDestRegs () const
 Number of coprocesor destination regs. More...
 
bool isNop () const
 
bool isMemRef () const
 
bool isLoad () const
 
bool isStore () const
 
bool isAtomic () const
 
bool isStoreConditional () const
 
bool isInstPrefetch () const
 
bool isDataPrefetch () const
 
bool isPrefetch () const
 
bool isInteger () const
 
bool isFloating () const
 
bool isVector () const
 
bool isControl () const
 
bool isCall () const
 
bool isReturn () const
 
bool isDirectCtrl () const
 
bool isIndirectCtrl () const
 
bool isCondCtrl () const
 
bool isUncondCtrl () const
 
bool isSerializing () const
 
bool isSerializeBefore () const
 
bool isSerializeAfter () const
 
bool isSquashAfter () const
 
bool isFullMemBarrier () const
 
bool isReadBarrier () const
 
bool isWriteBarrier () const
 
bool isNonSpeculative () const
 
bool isQuiesce () const
 
bool isUnverifiable () const
 
bool isSyscall () const
 
bool isMacroop () const
 
bool isMicroop () const
 
bool isDelayedCommit () const
 
bool isLastMicroop () const
 
bool isFirstMicroop () const
 
bool isHtmStart () const
 
bool isHtmStop () const
 
bool isHtmCancel () const
 
bool isHtmCmd () const
 
void setFirstMicroop ()
 
void setLastMicroop ()
 
void setDelayedCommit ()
 
void setFlag (Flags f)
 
OpClass opClass () const
 Operation class. Used to select appropriate function unit in issue. More...
 
const RegIddestRegIdx (int i) const
 Return logical index (architectural reg num) of i'th destination reg. More...
 
void setDestRegIdx (int i, const RegId &val)
 
const RegIdsrcRegIdx (int i) const
 Return logical index (architectural reg num) of i'th source reg. More...
 
void setSrcRegIdx (int i, const RegId &val)
 
virtual uint64_t getEMI () const
 
virtual ~StaticInst ()
 
virtual Fault execute (ExecContext *xc, Trace::InstRecord *traceData) const =0
 
virtual Fault initiateAcc (ExecContext *xc, Trace::InstRecord *traceData) const
 
virtual Fault completeAcc (Packet *pkt, ExecContext *xc, Trace::InstRecord *trace_data) const
 
virtual void advancePC (TheISA::PCState &pc_state) const =0
 
virtual TheISA::PCState buildRetPC (const TheISA::PCState &cur_pc, const TheISA::PCState &call_pc) const
 
virtual StaticInstPtr fetchMicroop (MicroPC upc) const
 Return the microop that goes with a particular micropc. More...
 
virtual TheISA::PCState branchTarget (const TheISA::PCState &pc) const
 Return the target address for a PC-relative branch. More...
 
virtual TheISA::PCState branchTarget (ThreadContext *tc) const
 Return the target address for an indirect branch (jump). More...
 
bool hasBranchTarget (const TheISA::PCState &pc, ThreadContext *tc, TheISA::PCState &tgt) const
 Return true if the instruction is a control transfer, and if so, return the target address as well. More...
 
virtual const std::string & disassemble (Addr pc, const loader::SymbolTable *symtab=nullptr) const
 Return string representation of disassembled instruction. More...
 
void printFlags (std::ostream &outs, const std::string &separator) const
 Print a separator separated list of this instruction's set flag names on the given stream. More...
 
std::string getName ()
 Return name of machine instruction. More...
 
virtual size_t asBytes (void *buf, size_t max_size)
 Instruction classes can override this function to return a a representation of themselves as a blob of bytes, generally assumed to be that instructions ExtMachInst. More...
 
- Public Member Functions inherited from gem5::RefCounted
 RefCounted ()
 We initialize the reference count to zero and the first object to take ownership of it must increment it to one. More...
 
virtual ~RefCounted ()
 We make the destructor virtual because we're likely to have virtual functions on reference counted objects. More...
 
void incref () const
 Increment the reference count. More...
 
void decref () const
 Decrement the reference count and destroy the object if all references are gone. More...
 
- Static Public Member Functions inherited from gem5::X86ISA::X86StaticInst
static void printMnemonic (std::ostream &os, const char *mnemonic)
 
static void printMnemonic (std::ostream &os, const char *instMnemonic, const char *mnemonic)
 
static void printMem (std::ostream &os, uint8_t segment, uint8_t scale, RegIndex index, RegIndex base, uint64_t disp, uint8_t addressSize, bool rip)
 
static void printSegment (std::ostream &os, int segment)
 
static void printReg (std::ostream &os, RegId reg, int size)
 
- Public Attributes inherited from gem5::X86ISA::X86StaticInst
ExtMachInst machInst
 
- Static Public Attributes inherited from gem5::StaticInst
static StaticInstPtr nullStaticInstPtr
 Pointer to a statically allocated "null" instruction object. More...
 
- Protected Types inherited from gem5::X86ISA::X86StaticInst
using ExtMachInst = X86ISA::ExtMachInst
 
- Static Protected Member Functions inherited from gem5::X86ISA::X86StaticInst
static void divideStep (uint64_t divident, uint64_t divisor, uint64_t &quotient, uint64_t &remainder)
 
static uint64_t merge (uint64_t into, RegIndex index, uint64_t val, int size)
 
static uint64_t pick (uint64_t from, RegIndex index, int size)
 
static int64_t signedPick (uint64_t from, RegIndex index, int size)
 

Detailed Description

Definition at line 97 of file microop.hh.

Constructor & Destructor Documentation

◆ X86MicroopBase()

gem5::X86ISA::X86MicroopBase::X86MicroopBase ( ExtMachInst  _machInst,
const char *  mnem,
const char *  _instMnem,
uint64_t  setFlags,
OpClass  __opClass 
)
inlineprotected

Definition at line 104 of file microop.hh.

References gem5::StaticInst::flags, gem5::ArmISA::i, and gem5::ArmISA::shift.

Member Function Documentation

◆ advancePC()

void gem5::X86ISA::X86MicroopBase::advancePC ( PCState pcState) const
inlineoverrideprotected

◆ branchTarget() [1/3]

PCState gem5::X86ISA::X86MicroopBase::branchTarget ( const PCState branchPC) const
overrideprotected

◆ branchTarget() [2/3]

TheISA::PCState gem5::StaticInst::branchTarget
protected

Return the target address for a PC-relative branch.

Invalid if not a PC-relative branch (i.e. isDirectCtrl() should be true).

Definition at line 61 of file static_inst.cc.

◆ branchTarget() [3/3]

TheISA::PCState gem5::StaticInst::branchTarget
protected

Return the target address for an indirect branch (jump).

The register value is read from the supplied thread context, so the result is valid only if the thread context is about to execute the branch in question. Invalid if not an indirect branch (i.e. isIndirectCtrl() should be true).

Definition at line 68 of file static_inst.cc.

◆ checkCondition()

bool gem5::X86ISA::X86MicroopBase::checkCondition ( uint64_t  flags,
int  condition 
) const
protected

◆ generateDisassembly()

std::string gem5::X86ISA::X86MicroopBase::generateDisassembly ( Addr  pc,
const loader::SymbolTable symtab 
) const
inlineoverrideprotectedvirtual

Member Data Documentation

◆ addrSize

uint8_t gem5::X86ISA::X86MicroopBase::addrSize
protected

Definition at line 102 of file microop.hh.

◆ instMnem

const char* gem5::X86ISA::X86MicroopBase::instMnem
protected

◆ opSize

uint8_t gem5::X86ISA::X86MicroopBase::opSize
protected

Definition at line 101 of file microop.hh.


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:35:01 for gem5 by doxygen 1.8.17