| _destIdx | gem5::o3::DynInst | protected |
| _destMiscRegIdx | gem5::o3::DynInst | protected |
| _destMiscRegVal | gem5::o3::DynInst | protected |
| _flatDestIdx | gem5::o3::DynInst | protected |
| _numDests | gem5::o3::DynInst | protected |
| _numSrcs | gem5::o3::DynInst | protected |
| _prevDestIdx | gem5::o3::DynInst | protected |
| _readySrcIdx | gem5::o3::DynInst | protected |
| _srcIdx | gem5::o3::DynInst | protected |
| amoMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) | gem5::ExecContext | inlinevirtual |
| armMonitor(Addr address) override | gem5::o3::DynInst | inlinevirtual |
| AtCommit enum value | gem5::o3::DynInst | protected |
| BlockingInst enum value | gem5::o3::DynInst | protected |
| branchTarget() const | gem5::o3::DynInst | inline |
| CanCommit enum value | gem5::o3::DynInst | protected |
| CanIssue enum value | gem5::o3::DynInst | protected |
| clearCanCommit() | gem5::o3::DynInst | inline |
| clearCanIssue() | gem5::o3::DynInst | inline |
| clearHtmTransactionalState() | gem5::o3::DynInst | inline |
| clearInIQ() | gem5::o3::DynInst | inline |
| clearInROB() | gem5::o3::DynInst | inline |
| clearIssued() | gem5::o3::DynInst | inline |
| clearSerializeAfter() | gem5::o3::DynInst | inline |
| clearSerializeBefore() | gem5::o3::DynInst | inline |
| Committed enum value | gem5::o3::DynInst | protected |
| completeAcc(PacketPtr pkt) | gem5::o3::DynInst | |
| Completed enum value | gem5::o3::DynInst | protected |
| contextId() const | gem5::o3::DynInst | inline |
| count | gem5::RefCounted | mutableprivate |
| cpu | gem5::o3::DynInst | |
| cpuId() const | gem5::o3::DynInst | inline |
| decref() const | gem5::RefCounted | inline |
| demapPage(Addr vaddr, uint64_t asn) override | gem5::o3::DynInst | inlinevirtual |
| destRegIdx(int i) const | gem5::o3::DynInst | inline |
| doneTargCalc() | gem5::o3::DynInst | inline |
| dump() | gem5::o3::DynInst | |
| dump(std::string &outstring) | gem5::o3::DynInst | |
| DynInst(const StaticInstPtr &staticInst, const StaticInstPtr ¯oop, InstSeqNum seq_num, CPU *cpu) | gem5::o3::DynInst | private |
| DynInst(const Arrays &arrays, const StaticInstPtr &staticInst, const StaticInstPtr ¯oop, InstSeqNum seq_num, CPU *cpu) | gem5::o3::DynInst | |
| DynInst(const Arrays &arrays, const StaticInstPtr &staticInst, const StaticInstPtr ¯oop, const PCStateBase &pc, const PCStateBase &pred_pc, InstSeqNum seq_num, CPU *cpu) | gem5::o3::DynInst | |
| DynInst(const Arrays &arrays, const StaticInstPtr &_staticInst, const StaticInstPtr &_macroop) | gem5::o3::DynInst | |
| effAddr | gem5::o3::DynInst | |
| EffAddrValid enum value | gem5::o3::DynInst | protected |
| effAddrValid() const | gem5::o3::DynInst | inline |
| effAddrValid(bool b) | gem5::o3::DynInst | inline |
| effSize | gem5::o3::DynInst | |
| execute() | gem5::o3::DynInst | |
| Executed enum value | gem5::o3::DynInst | protected |
| fault | gem5::o3::DynInst | |
| firstIssue | gem5::o3::DynInst | |
| Flags enum name | gem5::o3::DynInst | protected |
| flattenedDestIdx(int idx) const | gem5::o3::DynInst | inline |
| flattenedDestIdx(int idx, const RegId ®_id) | gem5::o3::DynInst | inline |
| forwardOldRegs() | gem5::o3::DynInst | inline |
| getAddrMonitor() override | gem5::o3::DynInst | inlinevirtual |
| getCpuPtr() | gem5::o3::DynInst | inline |
| getFault() const | gem5::o3::DynInst | inline |
| getFault() | gem5::o3::DynInst | inline |
| getHtmTransactionalDepth() const override | gem5::o3::DynInst | inlinevirtual |
| getHtmTransactionUid() const override | gem5::o3::DynInst | inlinevirtual |
| getInstListIt() | gem5::o3::DynInst | inline |
| getRegOperand(const StaticInst *si, int idx) override | gem5::o3::DynInst | inlinevirtual |
| getRegOperand(const StaticInst *si, int idx, void *val) override | gem5::o3::DynInst | inlinevirtual |
| getWritableRegOperand(const StaticInst *si, int idx) override | gem5::o3::DynInst | inlinevirtual |
| hasRequest() const | gem5::o3::DynInst | inline |
| hitExternalSnoop() const | gem5::o3::DynInst | inline |
| hitExternalSnoop(bool f) | gem5::o3::DynInst | inline |
| HitExternalSnoop enum value | gem5::o3::DynInst | protected |
| htmDepth | gem5::o3::DynInst | private |
| HtmFromTransaction enum value | gem5::o3::DynInst | protected |
| htmUid | gem5::o3::DynInst | private |
| incref() const | gem5::RefCounted | inline |
| inHtmTransactionalState() const override | gem5::o3::DynInst | inlinevirtual |
| initiateAcc() | gem5::o3::DynInst | |
| initiateMemAMO(Addr addr, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op) override | gem5::o3::DynInst | |
| gem5::ExecContext::initiateMemAMO(Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) | gem5::ExecContext | inlinevirtual |
| initiateMemMgmtCmd(Request::Flags flags) override | gem5::o3::DynInst | virtual |
| initiateMemRead(Addr addr, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable) override | gem5::o3::DynInst | |
| gem5::ExecContext::initiateMemRead(Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable) | gem5::ExecContext | inlinevirtual |
| instFlags | gem5::o3::DynInst | private |
| instListIt | gem5::o3::DynInst | |
| instResult | gem5::o3::DynInst | protected |
| IqEntry enum value | gem5::o3::DynInst | protected |
| isAtCommit() | gem5::o3::DynInst | inline |
| isAtomic() const | gem5::o3::DynInst | inline |
| isCall() const | gem5::o3::DynInst | inline |
| isCommitted() const | gem5::o3::DynInst | inline |
| isCompleted() const | gem5::o3::DynInst | inline |
| isCondCtrl() const | gem5::o3::DynInst | inline |
| isControl() const | gem5::o3::DynInst | inline |
| isDataPrefetch() const | gem5::o3::DynInst | inline |
| isDelayedCommit() const | gem5::o3::DynInst | inline |
| isDirectCtrl() const | gem5::o3::DynInst | inline |
| isExecuted() const | gem5::o3::DynInst | inline |
| isFirstMicroop() const | gem5::o3::DynInst | inline |
| isFloating() const | gem5::o3::DynInst | inline |
| isFullMemBarrier() const | gem5::o3::DynInst | inline |
| isHtmCancel() const | gem5::o3::DynInst | inline |
| isHtmCmd() const | gem5::o3::DynInst | inline |
| isHtmStart() const | gem5::o3::DynInst | inline |
| isHtmStop() const | gem5::o3::DynInst | inline |
| isIndirectCtrl() const | gem5::o3::DynInst | inline |
| isInIQ() const | gem5::o3::DynInst | inline |
| isInLSQ() const | gem5::o3::DynInst | inline |
| isInROB() const | gem5::o3::DynInst | inline |
| isInstPrefetch() const | gem5::o3::DynInst | inline |
| isInteger() const | gem5::o3::DynInst | inline |
| isIssued() const | gem5::o3::DynInst | inline |
| isLastMicroop() const | gem5::o3::DynInst | inline |
| isLoad() const | gem5::o3::DynInst | inline |
| isMacroop() const | gem5::o3::DynInst | inline |
| isMemRef() const | gem5::o3::DynInst | inline |
| isMicroop() const | gem5::o3::DynInst | inline |
| isNonSpeculative() const | gem5::o3::DynInst | inline |
| isNop() const | gem5::o3::DynInst | inline |
| isPinnedRegsRenamed() const | gem5::o3::DynInst | inline |
| isPinnedRegsSquashDone() const | gem5::o3::DynInst | inline |
| isPinnedRegsWritten() const | gem5::o3::DynInst | inline |
| isQuiesce() const | gem5::o3::DynInst | inline |
| isReadBarrier() const | gem5::o3::DynInst | inline |
| isResultReady() const | gem5::o3::DynInst | inline |
| isReturn() const | gem5::o3::DynInst | inline |
| isSerializeAfter() const | gem5::o3::DynInst | inline |
| isSerializeBefore() const | gem5::o3::DynInst | inline |
| isSerializeHandled() | gem5::o3::DynInst | inline |
| isSerializing() const | gem5::o3::DynInst | inline |
| isSquashAfter() const | gem5::o3::DynInst | inline |
| isSquashed() const | gem5::o3::DynInst | inline |
| isSquashedInIQ() const | gem5::o3::DynInst | inline |
| isSquashedInLSQ() const | gem5::o3::DynInst | inline |
| isSquashedInROB() const | gem5::o3::DynInst | inline |
| isStore() const | gem5::o3::DynInst | inline |
| isStoreConditional() const | gem5::o3::DynInst | inline |
| IsStrictlyOrdered enum value | gem5::o3::DynInst | protected |
| Issued enum value | gem5::o3::DynInst | protected |
| isSyscall() const | gem5::o3::DynInst | inline |
| isTempSerializeAfter() | gem5::o3::DynInst | inline |
| isTempSerializeBefore() | gem5::o3::DynInst | inline |
| isTranslationDelayed() const | gem5::o3::DynInst | inline |
| isUncondCtrl() const | gem5::o3::DynInst | inline |
| isUnverifiable() const | gem5::o3::DynInst | inline |
| isVector() const | gem5::o3::DynInst | inline |
| isWriteBarrier() const | gem5::o3::DynInst | inline |
| lastWakeDependents | gem5::o3::DynInst | |
| ListIt typedef | gem5::o3::DynInst | |
| lqIdx | gem5::o3::DynInst | |
| lqIt | gem5::o3::DynInst | |
| LsqEntry enum value | gem5::o3::DynInst | protected |
| macroop | gem5::o3::DynInst | |
| markSrcRegReady() | gem5::o3::DynInst | |
| markSrcRegReady(RegIndex src_idx) | gem5::o3::DynInst | |
| MaxFlags enum value | gem5::o3::DynInst | protected |
| MemAccPredicate enum value | gem5::o3::DynInst | protected |
| memData | gem5::o3::DynInst | |
| MemOpDone enum value | gem5::o3::DynInst | protected |
| memOpDone() const | gem5::o3::DynInst | inline |
| memOpDone(bool f) | gem5::o3::DynInst | inline |
| memReqFlags | gem5::o3::DynInst | |
| mispredicted() | gem5::o3::DynInst | inline |
| mwait(PacketPtr pkt) override | gem5::o3::DynInst | inlinevirtual |
| mwaitAtomic(gem5::ThreadContext *tc) override | gem5::o3::DynInst | inlinevirtual |
| newHtmTransactionUid() const override | gem5::o3::DynInst | inlinevirtual |
| NotAnInst enum value | gem5::o3::DynInst | protected |
| notAnInst() const | gem5::o3::DynInst | inline |
| numDestRegs() const | gem5::o3::DynInst | inline |
| numDestRegs(RegClassType type) const | gem5::o3::DynInst | inline |
| numDests() const | gem5::o3::DynInst | inline |
| numSrcRegs() const | gem5::o3::DynInst | inline |
| numSrcs() const | gem5::o3::DynInst | inline |
| NumStatus enum value | gem5::o3::DynInst | protected |
| opClass() const | gem5::o3::DynInst | inline |
| operator new(size_t count, Arrays &arrays) | gem5::o3::DynInst | static |
| operator=(const RefCounted &) | gem5::RefCounted | private |
| pc | gem5::o3::DynInst | protected |
| pcState() const override | gem5::o3::DynInst | inlinevirtual |
| pcState(const PCStateBase &val) override | gem5::o3::DynInst | inlinevirtual |
| physEffAddr | gem5::o3::DynInst | |
| PinnedRegsRenamed enum value | gem5::o3::DynInst | protected |
| PinnedRegsSquashDone enum value | gem5::o3::DynInst | protected |
| PinnedRegsWritten enum value | gem5::o3::DynInst | protected |
| popResult(InstResult dflt=InstResult()) | gem5::o3::DynInst | inline |
| PossibleLoadViolation enum value | gem5::o3::DynInst | protected |
| possibleLoadViolation() const | gem5::o3::DynInst | inline |
| possibleLoadViolation(bool f) | gem5::o3::DynInst | inline |
| Predicate enum value | gem5::o3::DynInst | protected |
| predPC | gem5::o3::DynInst | |
| PredTaken enum value | gem5::o3::DynInst | protected |
| prevDestIdx(int idx) const | gem5::o3::DynInst | inline |
| prevDestIdx(int idx, PhysRegIdPtr phys_reg_id) | gem5::o3::DynInst | inline |
| readMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable) | gem5::ExecContext | inlinevirtual |
| readMemAccPredicate() const override | gem5::o3::DynInst | inlinevirtual |
| readMiscReg(int misc_reg) override | gem5::o3::DynInst | inlinevirtual |
| readMiscRegOperand(const StaticInst *si, int idx) override | gem5::o3::DynInst | inlinevirtual |
| readPredicate() const override | gem5::o3::DynInst | inlinevirtual |
| readPredTaken() | gem5::o3::DynInst | inline |
| readPredTarg() | gem5::o3::DynInst | inline |
| readStCondFailures() const override | gem5::o3::DynInst | inlinevirtual |
| readyRegs | gem5::o3::DynInst | |
| readySrcIdx(int idx) const | gem5::o3::DynInst | inline |
| readySrcIdx(int idx, bool ready) | gem5::o3::DynInst | inline |
| readyToCommit() const | gem5::o3::DynInst | inline |
| readyToIssue() const | gem5::o3::DynInst | inline |
| RecordResult enum value | gem5::o3::DynInst | protected |
| recordResult(bool f) | gem5::o3::DynInst | inline |
| RecoverInst enum value | gem5::o3::DynInst | protected |
| RefCounted(const RefCounted &) | gem5::RefCounted | private |
| RefCounted() | gem5::RefCounted | inline |
| removeInLSQ() | gem5::o3::DynInst | inline |
| renamedDestIdx(int idx) const | gem5::o3::DynInst | inline |
| renamedDestIdx(int idx, PhysRegIdPtr phys_reg_id) | gem5::o3::DynInst | inline |
| renameDestReg(int idx, PhysRegIdPtr renamed_dest, PhysRegIdPtr previous_rename) | gem5::o3::DynInst | inline |
| renamedSrcIdx(int idx) const | gem5::o3::DynInst | inline |
| renamedSrcIdx(int idx, PhysRegIdPtr phys_reg_id) | gem5::o3::DynInst | inline |
| renameSrcReg(int idx, PhysRegIdPtr renamed_src) | gem5::o3::DynInst | inline |
| ReqMade enum value | gem5::o3::DynInst | protected |
| reqToVerify | gem5::o3::DynInst | |
| requestorId() const | gem5::o3::DynInst | inline |
| ResultReady enum value | gem5::o3::DynInst | protected |
| resultSize() | gem5::o3::DynInst | inline |
| RobEntry enum value | gem5::o3::DynInst | protected |
| savedRequest | gem5::o3::DynInst | |
| seqNum | gem5::o3::DynInst | |
| SerializeAfter enum value | gem5::o3::DynInst | protected |
| SerializeBefore enum value | gem5::o3::DynInst | protected |
| SerializeHandled enum value | gem5::o3::DynInst | protected |
| setAtCommit() | gem5::o3::DynInst | inline |
| setCanCommit() | gem5::o3::DynInst | inline |
| setCanIssue() | gem5::o3::DynInst | inline |
| setCommitted() | gem5::o3::DynInst | inline |
| setCompleted() | gem5::o3::DynInst | inline |
| setExecuted() | gem5::o3::DynInst | inline |
| setHtmTransactionalState(uint64_t htm_uid, uint64_t htm_depth) | gem5::o3::DynInst | inline |
| setInIQ() | gem5::o3::DynInst | inline |
| setInLSQ() | gem5::o3::DynInst | inline |
| setInROB() | gem5::o3::DynInst | inline |
| setInstListIt(ListIt _instListIt) | gem5::o3::DynInst | inline |
| setIssued() | gem5::o3::DynInst | inline |
| setMemAccPredicate(bool val) override | gem5::o3::DynInst | inlinevirtual |
| setMiscReg(int misc_reg, RegVal val) override | gem5::o3::DynInst | inlinevirtual |
| setMiscRegOperand(const StaticInst *si, int idx, RegVal val) override | gem5::o3::DynInst | inlinevirtual |
| setNotAnInst() | gem5::o3::DynInst | inline |
| setPinnedRegsRenamed() | gem5::o3::DynInst | inline |
| setPinnedRegsSquashDone() | gem5::o3::DynInst | inline |
| setPinnedRegsWritten() | gem5::o3::DynInst | inline |
| setPredicate(bool val) override | gem5::o3::DynInst | inlinevirtual |
| setPredTaken(bool predicted_taken) | gem5::o3::DynInst | inline |
| setPredTarg(const PCStateBase &pred_pc) | gem5::o3::DynInst | inline |
| setRegOperand(const StaticInst *si, int idx, RegVal val) override | gem5::o3::DynInst | inlinevirtual |
| setRegOperand(const StaticInst *si, int idx, const void *val) override | gem5::o3::DynInst | inlinevirtual |
| setRequest() | gem5::o3::DynInst | inline |
| setResult(const RegClass ®_class, T &&t) | gem5::o3::DynInst | inline |
| setResultReady() | gem5::o3::DynInst | inline |
| setSerializeAfter() | gem5::o3::DynInst | inline |
| setSerializeBefore() | gem5::o3::DynInst | inline |
| setSerializeHandled() | gem5::o3::DynInst | inline |
| setSquashed() | gem5::o3::DynInst | |
| setSquashedInIQ() | gem5::o3::DynInst | inline |
| setSquashedInLSQ() | gem5::o3::DynInst | inline |
| setSquashedInROB() | gem5::o3::DynInst | inline |
| setStCondFailures(unsigned int sc_failures) override | gem5::o3::DynInst | inlinevirtual |
| setThreadState(ThreadState *state) | gem5::o3::DynInst | inline |
| setTid(ThreadID tid) | gem5::o3::DynInst | inline |
| socketId() const | gem5::o3::DynInst | inline |
| sqIdx | gem5::o3::DynInst | |
| sqIt | gem5::o3::DynInst | |
| Squashed enum value | gem5::o3::DynInst | protected |
| SquashedInIQ enum value | gem5::o3::DynInst | protected |
| SquashedInLSQ enum value | gem5::o3::DynInst | protected |
| SquashedInROB enum value | gem5::o3::DynInst | protected |
| srcRegIdx(int i) const | gem5::o3::DynInst | inline |
| staticInst | gem5::o3::DynInst | |
| Status enum name | gem5::o3::DynInst | protected |
| status | gem5::o3::DynInst | private |
| strictlyOrdered() const | gem5::o3::DynInst | inline |
| strictlyOrdered(bool so) | gem5::o3::DynInst | inline |
| tcBase() const override | gem5::o3::DynInst | inlinevirtual |
| thread | gem5::o3::DynInst | |
| threadNumber | gem5::o3::DynInst | |
| ThreadsyncWait enum value | gem5::o3::DynInst | protected |
| traceData | gem5::o3::DynInst | |
| TranslationCompleted enum value | gem5::o3::DynInst | protected |
| translationCompleted() const | gem5::o3::DynInst | inline |
| translationCompleted(bool f) | gem5::o3::DynInst | inline |
| translationStarted() const | gem5::o3::DynInst | inline |
| translationStarted(bool f) | gem5::o3::DynInst | inline |
| TranslationStarted enum value | gem5::o3::DynInst | protected |
| trap(const Fault &fault) | gem5::o3::DynInst | |
| updateMiscRegs() | gem5::o3::DynInst | inline |
| writeMem(uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable) override | gem5::o3::DynInst | |
| gem5::ExecContext::writeMem(uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable)=0 | gem5::ExecContext | pure virtual |
| ~DynInst() | gem5::o3::DynInst | |
| ~RefCounted() | gem5::RefCounted | inlinevirtual |