gem5  v21.1.0.2
dma_thread.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2021 Advanced Micro Devices, Inc.
3  * All rights reserved.
4  *
5  * For use for simulation and test purposes only
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  * 1. Redistributions of source code must retain the above copyright notice,
11  * this list of conditions and the following disclaimer.
12  *
13  * 2. Redistributions in binary form must reproduce the above copyright notice,
14  * this list of conditions and the following disclaimer in the documentation
15  * and/or other materials provided with the distribution.
16  *
17  * 3. Neither the name of the copyright holder nor the names of its
18  * contributors may be used to endorse or promote products derived from this
19  * software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef CPU_TESTERS_PROTOCOL_TESTER_DMATHREAD_HH_
35 #define CPU_TESTERS_PROTOCOL_TESTER_DMATHREAD_HH_
36 
38 #include "params/DmaThread.hh"
39 
40 namespace gem5
41 {
42 
43 class DmaThread : public TesterThread
44 {
45  public:
46  typedef DmaThreadParams Params;
47  DmaThread(const Params& _params);
48  virtual ~DmaThread();
49 
52 
53  void hitCallback(PacketPtr pkt);
54 
55  protected:
56  void issueLoadOps();
57  void issueStoreOps();
58  void issueAtomicOps();
59  void issueAcquireOp();
60  void issueReleaseOp();
61 };
62 
63 } // namespace gem5
64 
65 #endif /* CPU_TESTERS_PROTOCOL_TESTER_DMATHREAD_HH_ */
gem5::DmaThread::issueLoadOps
void issueLoadOps()
Definition: dma_thread.cc:55
gem5::SimObject::_params
const SimObjectParams & _params
Cached copy of the object parameters.
Definition: sim_object.hh:167
gem5::DmaThread
Definition: dma_thread.hh:43
gem5::TesterThread
Definition: tester_thread.hh:51
gem5::DmaThread::~DmaThread
virtual ~DmaThread()
Definition: dma_thread.cc:49
gem5::DmaThread::issueReleaseOp
void issueReleaseOp()
Definition: dma_thread.cc:193
gem5::DmaThread::Location
AddressManager::Location Location
Definition: dma_thread.hh:50
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
tester_thread.hh
gem5::AddressManager::Location
int32_t Location
Definition: address_manager.hh:129
gem5::AddressManager::Value
int32_t Value
Definition: address_manager.hh:128
gem5::DmaThread::Value
AddressManager::Value Value
Definition: dma_thread.hh:51
gem5::DmaThread::Params
DmaThreadParams Params
Definition: dma_thread.hh:46
gem5::DmaThread::hitCallback
void hitCallback(PacketPtr pkt)
Definition: dma_thread.cc:208
gem5::DmaThread::issueAtomicOps
void issueAtomicOps()
Definition: dma_thread.cc:163
gem5::DmaThread::issueStoreOps
void issueStoreOps()
Definition: dma_thread.cc:106
gem5::DmaThread::issueAcquireOp
void issueAcquireOp()
Definition: dma_thread.cc:178
gem5::DmaThread::DmaThread
DmaThread(const Params &_params)
Definition: dma_thread.cc:41
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40

Generated on Tue Sep 21 2021 12:25:09 for gem5 by doxygen 1.8.17