gpu_registers.cc File Reference

#include "arch/amdgpu/vega/gpu_registers.hh"

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Namespaces
namespace	gem5
	Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
namespace	gem5::VegaISA
	classes that represnt vector/scalar operands in VEGA ISA.

Functions
std::string	gem5::VegaISA::opSelectorToRegSym (int idx, int numRegs)
int	gem5::VegaISA::opSelectorToRegIdx (int idx, int numScalarRegs)
bool	gem5::VegaISA::isPosConstVal (int opIdx)
bool	gem5::VegaISA::isNegConstVal (int opIdx)
bool	gem5::VegaISA::isConstVal (int opIdx)
bool	gem5::VegaISA::isLiteral (int opIdx)
bool	gem5::VegaISA::isExecMask (int opIdx)
bool	gem5::VegaISA::isVccReg (int opIdx)
bool	gem5::VegaISA::isFlatScratchReg (int opIdx)
bool	gem5::VegaISA::isScalarReg (int opIdx)
bool	gem5::VegaISA::isVectorReg (int opIdx)