gem5 v24.0.0.0
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MemCtrl declaration. More...
#include <deque>
#include <string>
#include <unordered_set>
#include <utility>
#include <vector>
#include "base/callback.hh"
#include "base/statistics.hh"
#include "enums/MemSched.hh"
#include "mem/qos/mem_ctrl.hh"
#include "mem/qport.hh"
#include "params/MemCtrl.hh"
#include "sim/eventq.hh"
Go to the source code of this file.
Classes | |
class | gem5::memory::BurstHelper |
A burst helper helps organize and manage a packet that is larger than the memory burst size. More... | |
class | gem5::memory::MemPacket |
A memory packet stores packets along with the timestamp of when the packet entered the queue, and also the decoded address. More... | |
class | gem5::memory::MemCtrl |
The memory controller is a single-channel memory controller capturing the most important timing constraints associated with a contemporary controller. More... | |
class | gem5::memory::MemCtrl::MemoryPort |
struct | gem5::memory::MemCtrl::CtrlStats |
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
namespace | gem5::memory |
Typedefs | |
typedef std::deque< MemPacket * > | gem5::memory::MemPacketQueue |
MemCtrl declaration.
Definition in file mem_ctrl.hh.