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mem_sink.hh
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1/*
2 * Copyright (c) 2018-2020 ARM Limited
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4 *
5 * The license below extends only to copyright in the software and shall
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8 * to a hardware implementation of the functionality of the software
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13 *
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15 * modification, are permitted provided that the following conditions are
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36 */
37
38
39#ifndef __MEM_QOS_MEM_SINK_HH__
40#define __MEM_QOS_MEM_SINK_HH__
41
42#include <cstdint>
43#include <deque>
44#include <vector>
45
46#include "base/compiler.hh"
47#include "base/types.hh"
48#include "mem/abstract_mem.hh"
49#include "mem/qos/mem_ctrl.hh"
50#include "mem/qport.hh"
51#include "params/QoSMemSinkCtrl.hh"
52#include "sim/eventq.hh"
53
54namespace gem5
55{
56
57struct QoSMemSinkInterfaceParams;
58
59namespace memory
60{
61
62namespace qos
63{
64
65class MemSinkInterface;
66
74class MemSinkCtrl : public MemCtrl
75{
76 protected:
82
83 private:
85 {
86 private:
89
92
93 public:
100 MemoryPort(const std::string&, MemSinkCtrl&);
101
102 protected:
110
116 void recvFunctional(PacketPtr pkt);
117
124 bool recvTimingReq(PacketPtr pkt);
125
131
132 };
133
134 public:
140 MemSinkCtrl(const QoSMemSinkCtrlParams &);
141
142 virtual ~MemSinkCtrl();
143
148 DrainState drain() override;
149
157 Port &getPort(const std::string &if_name, PortID=InvalidPortID) override;
158
162 void init() override;
163
164 protected:
167
170
172 const uint64_t memoryPacketSize;
173
175 const uint64_t readBufferSize;
176
178 const uint64_t writeBufferSize;
179
182
187
190
193
196
207
212
217
222 void processNextReqEvent();
223
226
233 inline bool readQueueFull(const uint64_t packets) const;
234
241 inline bool writeQueueFull(const uint64_t packets) const;
242
250
256 void recvFunctional(PacketPtr pkt);
257
264 bool recvTimingReq(PacketPtr pkt);
265
267};
268
270{
271 public:
273 void setMemCtrl(MemSinkCtrl* _ctrl) { ctrl = _ctrl; };
274
277
278 MemSinkInterface(const QoSMemSinkInterfaceParams &_p);
279};
280
281} // namespace qos
282} // namespace memory
283} // namespace gem5
284
285#endif // __MEM_QOS_MEM_SINK_HH__
AbstractMemory declaration.
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Wrap a member function inside MemberEventWrapper to use it as an event callback.
Definition eventq.hh:1092
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
Ports are used to interface objects to each other.
Definition port.hh:62
A queued port is a port that has an infinite queue for outgoing packets and thus decouples the module...
Definition qport.hh:62
An abstract memory represents a contiguous block of physical memory, with an associated address range...
The qos::MemCtrl is a base class for Memory objects which support QoS - it provides access to a set o...
Definition mem_ctrl.hh:80
void recvFunctional(PacketPtr pkt)
Receive a Packet in Functional mode.
Definition mem_sink.cc:374
MemoryPort(const std::string &, MemSinkCtrl &)
Constructor.
Definition mem_sink.cc:353
AddrRangeList getAddrRanges() const
Gets the configured address ranges for this port.
Definition mem_sink.cc:360
Tick recvAtomic(PacketPtr pkt)
Receive a Packet in Atomic mode.
Definition mem_sink.cc:368
bool recvTimingReq(PacketPtr pkt)
Receive a Packet in Timing mode.
Definition mem_sink.cc:389
RespPacketQueue queue
Outgoing packet responses queue.
Definition mem_sink.hh:91
MemSinkCtrl & mem
reference to parent memory object
Definition mem_sink.hh:88
MemoryPort port
Memory response port.
Definition mem_sink.hh:181
Tick recvAtomic(PacketPtr pkt)
Receive a Packet in Atomic mode.
Definition mem_sink.cc:102
const Tick responseLatency
Memory response latency (ticks)
Definition mem_sink.hh:169
Port & getPort(const std::string &if_name, PortID=InvalidPortID) override
Getter method to access this memory's response port.
Definition mem_sink.cc:123
MemberEventWrapper<&MemSinkCtrl::processNextReqEvent > nextReqEvent
Event wrapper to schedule next request handler function.
Definition mem_sink.hh:225
const uint64_t writeBufferSize
Write request packets queue buffer size in #packets.
Definition mem_sink.hh:178
DrainState drain() override
Checks and return the Drain state of this SimObject.
Definition mem_sink.cc:332
bool readQueueFull(const uint64_t packets) const
Check if the read queue has room for more entries.
Definition mem_sink.cc:90
bool recvTimingReq(PacketPtr pkt)
Receive a Packet in Timing mode.
Definition mem_sink.cc:133
const uint64_t readBufferSize
Read request packets queue buffer size in #packets.
Definition mem_sink.hh:175
bool retryWrReq
Write request pending.
Definition mem_sink.hh:192
std::vector< PacketQueue > readQueue
QoS-aware (per priority) incoming read requests packets queue.
Definition mem_sink.hh:211
bool retryRdReq
Read request pending.
Definition mem_sink.hh:189
void processNextReqEvent()
Processes the next Request event according to configured request latency.
Definition mem_sink.cc:212
bool writeQueueFull(const uint64_t packets) const
Check if the write queue has room for more entries.
Definition mem_sink.cc:96
const Tick requestLatency
Memory between requests latency (ticks)
Definition mem_sink.hh:166
const uint64_t memoryPacketSize
Memory packet size in bytes.
Definition mem_sink.hh:172
void init() override
Initializes this object.
Definition mem_sink.cc:78
MemSinkCtrl(const QoSMemSinkCtrlParams &)
QoS Memory Sink Constructor.
Definition mem_sink.cc:56
void recvFunctional(PacketPtr pkt)
Receive a Packet in Functional mode.
Definition mem_sink.cc:113
Tick nextRequest
Next request service time.
Definition mem_sink.hh:195
std::vector< PacketQueue > writeQueue
QoS-aware (per priority) incoming read requests packets queue.
Definition mem_sink.hh:216
MemSinkInterface *const interface
Create pointer to interface of actual media.
Definition mem_sink.hh:186
MemSinkInterface(const QoSMemSinkInterfaceParams &_p)
Definition mem_sink.cc:394
MemSinkCtrl * ctrl
Pointer to the controller.
Definition mem_sink.hh:276
void setMemCtrl(MemSinkCtrl *_ctrl)
Setting a pointer to the interface.
Definition mem_sink.hh:273
Statistics container.
Definition group.hh:93
This is a simple scalar statistic, like a counter.
STL deque class.
Definition stl.hh:44
STL vector class.
Definition stl.hh:37
DrainState
Object drain/handover states.
Definition drain.hh:75
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
const PortID InvalidPortID
Definition types.hh:246
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition types.hh:245
uint64_t Tick
Tick count type.
Definition types.hh:58
Declaration of the queued port.
statistics::Scalar numReadRetries
Count the number of read retries.
Definition mem_sink.hh:202
MemSinkCtrlStats(statistics::Group *parent)
Definition mem_sink.cc:344
statistics::Scalar numWriteRetries
Count the number of write retries.
Definition mem_sink.hh:205
Definition mem.h:38

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