gem5  v21.1.0.2
Classes | Public Types | Public Member Functions | Static Public Member Functions | Public Attributes | Private Types | Private Attributes | List of all members
gem5::Packet Class Reference

A Packet is used to encapsulate a transfer between two objects in the memory system (e.g., the L1 and L2 cache). More...

#include <packet.hh>

Inheritance diagram for gem5::Packet:
gem5::Printable

Classes

class  PrintReqState
 Object used to maintain state of a PrintReq. More...
 
struct  SenderState
 A virtual base opaque structure used to hold state associated with the packet (e.g., an MSHR), specific to a SimObject that sees the packet. More...
 

Public Types

typedef uint32_t FlagsType
 
typedef gem5::Flags< FlagsTypeFlags
 
typedef MemCmd::Command Command
 

Public Member Functions

void pushSenderState (SenderState *sender_state)
 Push a new sender state to the packet and make the current sender state the predecessor of the new one. More...
 
SenderStatepopSenderState ()
 Pop the top of the state stack and return a pointer to it. More...
 
template<typename T >
T * findNextSenderState () const
 Go through the sender state stack and return the first instance that is of type T (as determined by a dynamic_cast). More...
 
const std::string & cmdString () const
 Return the string name of the cmd field (for debugging and tracing). More...
 
int cmdToIndex () const
 Return the index of this command. More...
 
bool isRead () const
 
bool isWrite () const
 
bool isDemand () const
 
bool isUpgrade () const
 
bool isRequest () const
 
bool isResponse () const
 
bool needsWritable () const
 
bool needsResponse () const
 
bool isInvalidate () const
 
bool isEviction () const
 
bool isClean () const
 
bool fromCache () const
 
bool isWriteback () const
 
bool hasData () const
 
bool hasRespData () const
 
bool isLLSC () const
 
bool isError () const
 
bool isPrint () const
 
bool isFlush () const
 
bool isWholeLineWrite (unsigned blk_size)
 
void setCacheResponding ()
 Snoop flags. More...
 
bool cacheResponding () const
 
void setHasSharers ()
 On fills, the hasSharers flag is used by the caches in combination with the cacheResponding flag, as clarified above. More...
 
bool hasSharers () const
 
void setExpressSnoop ()
 The express snoop flag is used for two purposes. More...
 
bool isExpressSnoop () const
 
void setResponderHadWritable ()
 On responding to a snoop request (which only happens for Modified or Owned lines), make sure that we can transform an Owned response to a Modified one. More...
 
bool responderHadWritable () const
 
void copyResponderFlags (const PacketPtr pkt)
 Copy the reponse flags from an input packet to this packet. More...
 
void setWriteThrough ()
 A writeback/writeclean cmd gets propagated further downstream by the receiver when the flag is set. More...
 
void clearWriteThrough ()
 
bool writeThrough () const
 
void setSatisfied ()
 Set when a request hits in a cache and the cache is not going to respond. More...
 
bool satisfied () const
 
void setSuppressFuncError ()
 
bool suppressFuncError () const
 
void setBlockCached ()
 
bool isBlockCached () const
 
void clearBlockCached ()
 
uint8_t qosValue () const
 QoS Value getter Returns 0 if QoS value was never set (constructor default). More...
 
void qosValue (const uint8_t qos_value)
 QoS Value setter Interface for setting QoS priority value of the packet. More...
 
RequestorID requestorId () const
 
void setBadAddress ()
 
void copyError (Packet *pkt)
 
Addr getAddr () const
 
void setAddr (Addr _addr)
 Update the address of this packet mid-transaction. More...
 
unsigned getSize () const
 
AddrRange getAddrRange () const
 Get address range to which this packet belongs. More...
 
Addr getOffset (unsigned int blk_size) const
 
Addr getBlockAddr (unsigned int blk_size) const
 
bool isSecure () const
 
AtomicOpFunctorgetAtomicOp () const
 Accessor function to atomic op. More...
 
bool isAtomicOp () const
 
void convertScToWrite ()
 It has been determined that the SC packet should successfully update memory. More...
 
void convertLlToRead ()
 When ruby is in use, Ruby will monitor the cache line and the phys memory should treat LL ops as normal reads. More...
 
 Packet (const RequestPtr &_req, MemCmd _cmd)
 Constructor. More...
 
 Packet (const RequestPtr &_req, MemCmd _cmd, int _blkSize, PacketId _id=0)
 Alternate constructor if you are trying to create a packet with a request that is for a whole block, not the address from the req. More...
 
 Packet (const PacketPtr pkt, bool clear_flags, bool alloc_data)
 Alternate constructor for copying a packet. More...
 
 ~Packet ()
 clean up packet variables More...
 
void makeResponse ()
 Take a request packet and modify it in place to be suitable for returning as a response to that request. More...
 
void makeAtomicResponse ()
 
void makeTimingResponse ()
 
void setFunctionalResponseStatus (bool success)
 
void setSize (unsigned size)
 
bool matchBlockAddr (const Addr addr, const bool is_secure, const int blk_size) const
 Check if packet corresponds to a given block-aligned address and address space. More...
 
bool matchBlockAddr (const PacketPtr pkt, const int blk_size) const
 Check if this packet refers to the same block-aligned address and address space as another packet. More...
 
bool matchAddr (const Addr addr, const bool is_secure) const
 Check if packet corresponds to a given address and address space. More...
 
bool matchAddr (const PacketPtr pkt) const
 Check if this packet refers to the same address and address space as another packet. More...
 
template<typename T >
getRaw () const
 Get the data in the packet without byte swapping. More...
 
template<typename T >
void setRaw (T v)
 Set the value in the data pointer to v without byte swapping. More...
 
bool trySatisfyFunctional (PacketPtr other)
 Check a functional request against a memory value stored in another packet (i.e. More...
 
bool mustCheckAbove () const
 Does the request need to check for cached copies of the same block in the memory hierarchy above. More...
 
bool isCleanEviction () const
 Is this packet a clean eviction, including both actual clean evict packets, but also clean writebacks. More...
 
bool isMaskedWrite () const
 
bool trySatisfyFunctional (Printable *obj, Addr base, bool is_secure, int size, uint8_t *_data)
 Check a functional request against a memory value represented by a base/size pair and an associated data array. More...
 
void pushLabel (const std::string &lbl)
 Push label for PrintReq (safe to call unconditionally). More...
 
void popLabel ()
 Pop label for PrintReq (safe to call unconditionally). More...
 
void print (std::ostream &o, int verbosity=0, const std::string &prefix="") const
 
std::string print () const
 A no-args wrapper of print(std::ostream...) meant to be invoked from DPRINTFs avoiding string overheads in fast mode. More...
 
void makeHtmTransactionalReqResponse (const HtmCacheFailure ret_code)
 Communicates to the core that a packet was processed by the memory subsystem while running in transactional mode. More...
 
void setHtmTransactional (uint64_t val)
 Stipulates that this packet/request originates in the CPU executing in transactional mode, i.e. More...
 
bool isHtmTransactional () const
 Returns whether or not this packet/request originates in the CPU executing in transactional mode, i.e. More...
 
uint64_t getHtmTransactionUid () const
 If a packet/request originates in a CPU executing in transactional mode, i.e. More...
 
void setHtmTransactionFailedInCache (const HtmCacheFailure ret_code)
 Stipulates that this packet/request has returned from the cache hierarchy in a failed transaction. More...
 
bool htmTransactionFailedInCache () const
 Returns whether or not this packet/request has returned from the cache hierarchy in a failed transaction. More...
 
HtmCacheFailure getHtmTransactionFailedInCacheRC () const
 If a packet/request has returned from the cache hierarchy in a failed transaction, this function returns the failure reason. More...
 
Data accessor mehtods
template<typename T >
void dataStatic (T *p)
 Set the data pointer to the following value that should not be freed. More...
 
template<typename T >
void dataStaticConst (const T *p)
 Set the data pointer to the following value that should not be freed. More...
 
template<typename T >
void dataDynamic (T *p)
 Set the data pointer to a value that should have delete [] called on it. More...
 
template<typename T >
T * getPtr ()
 get a pointer to the data ptr. More...
 
template<typename T >
const T * getConstPtr () const
 
template<typename T >
getBE () const
 Get the data in the packet byte swapped from big endian to host endian. More...
 
template<typename T >
getLE () const
 Get the data in the packet byte swapped from little endian to host endian. More...
 
template<typename T >
get (ByteOrder endian) const
 Get the data in the packet byte swapped from the specified endianness. More...
 
template<typename T >
void setBE (T v)
 Set the value in the data pointer to v as big endian. More...
 
template<typename T >
void setLE (T v)
 Set the value in the data pointer to v as little endian. More...
 
template<typename T >
void set (T v, ByteOrder endian)
 Set the value in the data pointer to v using the specified endianness. More...
 
uint64_t getUintX (ByteOrder endian) const
 Get the data in the packet byte swapped from the specified endianness and zero-extended to 64 bits. More...
 
void setUintX (uint64_t w, ByteOrder endian)
 Set the value in the word w after truncating it to the length of the packet and then byteswapping it to the desired endianness. More...
 
void setData (const uint8_t *p)
 Copy data into the packet from the provided pointer. More...
 
void setDataFromBlock (const uint8_t *blk_data, int blkSize)
 Copy data into the packet from the provided block pointer, which is aligned to the given block size. More...
 
void writeData (uint8_t *p) const
 Copy data from the packet to the memory at the provided pointer. More...
 
void writeDataToBlock (uint8_t *blk_data, int blkSize) const
 Copy data from the packet to the provided block pointer, which is aligned to the given block size. More...
 
void deleteData ()
 delete the data pointed to in the data pointer. More...
 
void allocate ()
 Allocate memory for the packet. More...
 
- Public Member Functions inherited from gem5::Printable
 Printable ()
 
virtual ~Printable ()
 

Static Public Member Functions

static MemCmd makeReadCmd (const RequestPtr &req)
 Generate the appropriate read MemCmd based on the Request flags. More...
 
static MemCmd makeWriteCmd (const RequestPtr &req)
 Generate the appropriate write MemCmd based on the Request flags. More...
 
static PacketPtr createRead (const RequestPtr &req)
 Constructor-like methods that return Packets based on Request objects. More...
 
static PacketPtr createWrite (const RequestPtr &req)
 

Public Attributes

MemCmd cmd
 The command field of the packet. More...
 
const PacketId id
 
RequestPtr req
 A pointer to the original request. More...
 
uint32_t headerDelay
 The extra delay from seeing the packet until the header is transmitted. More...
 
uint32_t snoopDelay
 Keep track of the extra delay incurred by snooping upwards before sending a request down the memory system. More...
 
uint32_t payloadDelay
 The extra pipelining delay from seeing the packet until the end of payload is transmitted by the component that provided it (if any). More...
 
SenderStatesenderState
 This packet's sender state. More...
 

Private Types

enum  : FlagsType {
  COPY_FLAGS = 0x000000FF, RESPONDER_FLAGS = 0x00000009, HAS_SHARERS = 0x00000001, EXPRESS_SNOOP = 0x00000002,
  RESPONDER_HAD_WRITABLE = 0x00000004, CACHE_RESPONDING = 0x00000008, WRITE_THROUGH = 0x00000010, SATISFIED = 0x00000020,
  FAILS_TRANSACTION = 0x00000040, FROM_TRANSACTION = 0x00000080, VALID_ADDR = 0x00000100, VALID_SIZE = 0x00000200,
  STATIC_DATA = 0x00001000, DYNAMIC_DATA = 0x00002000, SUPPRESS_FUNC_ERROR = 0x00008000, BLOCK_CACHED = 0x00010000
}
 

Private Attributes

Flags flags
 
PacketDataPtr data
 A pointer to the data being transferred. More...
 
Addr addr
 The address of the request. More...
 
bool _isSecure
 True if the request targets the secure memory space. More...
 
unsigned size
 The size of the request or transfer. More...
 
std::vector< bool > bytesValid
 Track the bytes found that satisfy a functional read. More...
 
uint8_t _qosValue
 
HtmCacheFailure htmReturnReason
 Holds the return status of the transaction. More...
 
uint64_t htmTransactionUid
 A global unique identifier of the transaction. More...
 

Detailed Description

A Packet is used to encapsulate a transfer between two objects in the memory system (e.g., the L1 and L2 cache).

(In contrast, a single Request travels all the way from the requestor to the ultimate destination and back, possibly being conveyed by several different Packets along the way.)

Definition at line 283 of file packet.hh.

Member Typedef Documentation

◆ Command

Definition at line 358 of file packet.hh.

◆ Flags

Definition at line 287 of file packet.hh.

◆ FlagsType

typedef uint32_t gem5::Packet::FlagsType

Definition at line 286 of file packet.hh.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum : FlagsType
private
Enumerator
COPY_FLAGS 
RESPONDER_FLAGS 
HAS_SHARERS 
EXPRESS_SNOOP 

Special timing-mode atomic snoop for multi-level coherence.

RESPONDER_HAD_WRITABLE 

Allow a responding cache to inform the cache hierarchy that it had a writable copy before responding.

See setResponderHadWritable below.

CACHE_RESPONDING 
WRITE_THROUGH 
SATISFIED 
FAILS_TRANSACTION 
FROM_TRANSACTION 
VALID_ADDR 

Are the 'addr' and 'size' fields valid?

VALID_SIZE 
STATIC_DATA 

Is the data pointer set to a value that shouldn't be freed when the packet is destroyed?

DYNAMIC_DATA 

The data pointer points to a value that should be freed when the packet is destroyed.

The pointer is assumed to be pointing to an array, and delete [] is consequently called

SUPPRESS_FUNC_ERROR 

suppress the error if this packet encounters a functional access failure.

BLOCK_CACHED 

Definition at line 290 of file packet.hh.

Constructor & Destructor Documentation

◆ Packet() [1/3]

gem5::Packet::Packet ( const RequestPtr _req,
MemCmd  _cmd 
)
inline

Constructor.

Note that a Request object must be constructed first, but the Requests's physical address and size fields need not be valid. The command must be supplied.

hardware transactional memory

This is a bit of a hack! Technically the address of a HTM command is set to zero but is not valid. The reason that we pretend it's valid is to void the getAddr() function from failing. It would be cumbersome to add control flow in many places to check if the packet represents a HTM command before calling getAddr().

Definition at line 851 of file packet.hh.

References _isSecure, addr, gem5::Flags< T >::clear(), flags, gem5::NO_FAIL, req, gem5::Flags< T >::set(), size, VALID_ADDR, and VALID_SIZE.

Referenced by createRead(), and createWrite().

◆ Packet() [2/3]

gem5::Packet::Packet ( const RequestPtr _req,
MemCmd  _cmd,
int  _blkSize,
PacketId  _id = 0 
)
inline

Alternate constructor if you are trying to create a packet with a request that is for a whole block, not the address from the req.

this allows for overriding the size/addr of the req.

Definition at line 892 of file packet.hh.

References _isSecure, addr, gem5::Flags< T >::clear(), flags, gem5::NO_FAIL, req, gem5::Flags< T >::set(), size, VALID_ADDR, and VALID_SIZE.

◆ Packet() [3/3]

gem5::Packet::Packet ( const PacketPtr  pkt,
bool  clear_flags,
bool  alloc_data 
)
inline

Alternate constructor for copying a packet.

Copy all fields except if the original packet's data was dynamic, don't copy that, as we can't guarantee that the new packet's lifetime is less than that of the original packet. In this case the new packet should allocate its own data.

Definition at line 918 of file packet.hh.

References allocate(), COPY_FLAGS, data, flags, getHtmTransactionFailedInCacheRC(), getHtmTransactionUid(), htmTransactionFailedInCache(), isHtmTransactional(), gem5::Flags< T >::isSet(), gem5::NO_FAIL, gem5::Flags< T >::set(), setHtmTransactional(), setHtmTransactionFailedInCache(), STATIC_DATA, VALID_ADDR, and VALID_SIZE.

◆ ~Packet()

gem5::Packet::~Packet ( )
inline

clean up packet variables

Definition at line 1021 of file packet.hh.

References deleteData().

Member Function Documentation

◆ allocate()

void gem5::Packet::allocate ( )
inline

◆ cacheResponding()

bool gem5::Packet::cacheResponding ( ) const
inline

Definition at line 646 of file packet.hh.

References CACHE_RESPONDING, flags, and gem5::Flags< T >::isSet().

Referenced by gem5::memory::AbstractMemory::access(), copyResponderFlags(), gem5::CoherentXBar::forwardAtomic(), gem5::BaseCache::handleFill(), gem5::Cache::handleSnoop(), gem5::Cache::isCachedAbove(), gem5::SnoopFilter::lookupRequest(), gem5::NoncoherentCache::recvAtomic(), gem5::Cache::recvAtomic(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvAtomic(), gem5::memory::SimpleMemory::recvAtomic(), gem5::Bridge::BridgeResponsePort::recvAtomic(), gem5::memory::DRAMSim2::recvAtomic(), gem5::memory::DRAMsim3::recvAtomic(), gem5::CommMonitor::recvAtomic(), gem5::memory::qos::MemSinkCtrl::recvAtomic(), gem5::memory::CfiMemory::recvAtomic(), gem5::memory::MemCtrl::recvAtomic(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvAtomicBackdoor(), gem5::NoncoherentCache::recvTimingReq(), gem5::SimpleTimingPort::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::ruby::RubyPort::MemResponsePort::recvTimingReq(), gem5::Cache::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvTimingReq(), gem5::SerialLink::SerialLinkResponsePort::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::Bridge::BridgeResponsePort::recvTimingReq(), gem5::memory::DRAMSim2::recvTimingReq(), gem5::MemCheckerMonitor::recvTimingReq(), gem5::AddrMapper::recvTimingReq(), gem5::memory::DRAMsim3::recvTimingReq(), gem5::CommMonitor::recvTimingReq(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::memory::MemCtrl::recvTimingReq(), gem5::o3::Fetch::IcachePort::recvTimingResp(), gem5::DmaPort::recvTimingResp(), gem5::ArmISA::TableWalker::Port::recvTimingResp(), gem5::CoherentXBar::recvTimingSnoopReq(), gem5::Cache::sendMSHRQueuePacket(), gem5::BaseCache::sendMSHRQueuePacket(), setResponderHadWritable(), gem5::CoherentXBar::sinkPacket(), gem5::SnoopFilter::updateSnoopForward(), and gem5::SnoopFilter::updateSnoopResponse().

◆ clearBlockCached()

void gem5::Packet::clearBlockCached ( )
inline

Definition at line 748 of file packet.hh.

References BLOCK_CACHED, gem5::Flags< T >::clear(), and flags.

Referenced by gem5::BaseCache::access().

◆ clearWriteThrough()

void gem5::Packet::clearWriteThrough ( )
inline

◆ cmdString()

const std::string& gem5::Packet::cmdString ( ) const
inline

◆ cmdToIndex()

int gem5::Packet::cmdToIndex ( ) const
inline

◆ convertLlToRead()

void gem5::Packet::convertLlToRead ( )
inline

When ruby is in use, Ruby will monitor the cache line and the phys memory should treat LL ops as normal reads.

Definition at line 839 of file packet.hh.

References cmd, isLLSC(), isRead(), and gem5::MemCmd::ReadReq.

Referenced by gem5::ruby::RubyPort::MemResponsePort::hitCallback().

◆ convertScToWrite()

void gem5::Packet::convertScToWrite ( )
inline

It has been determined that the SC packet should successfully update memory.

Therefore, convert this SC packet to a normal write.

Definition at line 827 of file packet.hh.

References cmd, isLLSC(), isWrite(), and gem5::MemCmd::WriteReq.

Referenced by gem5::ruby::RubyPort::MemResponsePort::hitCallback().

◆ copyError()

void gem5::Packet::copyError ( Packet pkt)
inline

◆ copyResponderFlags()

void gem5::Packet::copyResponderFlags ( const PacketPtr  pkt)

Copy the reponse flags from an input packet to this packet.

The reponse flags determine whether a responder has been found and the state at which the block will be at the destination.

@pkt The packet that we will copy flags from

Definition at line 306 of file packet.cc.

References cacheResponding(), flags, isRequest(), RESPONDER_FLAGS, and gem5::Flags< T >::set().

Referenced by gem5::Cache::handleSnoop(), and gem5::Cache::serviceMSHRTargets().

◆ createRead()

static PacketPtr gem5::Packet::createRead ( const RequestPtr req)
inlinestatic

◆ createWrite()

static PacketPtr gem5::Packet::createWrite ( const RequestPtr req)
inlinestatic

◆ dataDynamic()

template<typename T >
void gem5::Packet::dataDynamic ( T *  p)
inline

Set the data pointer to a value that should have delete [] called on it.

Dynamic data is local to this packet, and as the packet travels from source to destination, forwarded packets will allocate their own data. When a packet reaches the final destination it will populate the dynamic data of that specific packet, and on the way back towards the source, memcpy will be invoked in every step where a new packet was created e.g. in the caches. Ultimately when the response reaches the source a final memcpy is needed to extract the data from the packet before it is deallocated.

Definition at line 1172 of file packet.hh.

References data, DYNAMIC_DATA, flags, gem5::Flags< T >::noneSet(), gem5::MipsISA::p, gem5::Flags< T >::set(), and STATIC_DATA.

Referenced by gem5::o3::LSQ::SplitDataRequest::buildPackets(), gem5::TimingSimpleCPU::buildSplitPacket(), gem5::TraceCPU::ElasticDataGen::executeMemReq(), gem5::o3::Fetch::finishTranslation(), gem5::GarnetSyntheticTraffic::generatePkt(), gem5::BaseGen::getPacket(), gem5::Check::initiateAction(), gem5::Check::initiateCheck(), gem5::Check::initiatePrefetch(), gem5::SimpleCache::insert(), gem5::GpuWavefront::issueAtomicOps(), gem5::DmaThread::issueLoadOps(), gem5::GpuWavefront::issueLoadOps(), gem5::DmaThread::issueStoreOps(), gem5::GpuWavefront::issueStoreOps(), gem5::minor::makePacketForRequest(), gem5::TraceCPU::FixedRetryGen::send(), gem5::TimingSimpleCPU::sendData(), gem5::ruby::AbstractController::serviceMemoryQueue(), and gem5::MemTest::tick().

◆ dataStatic()

template<typename T >
void gem5::Packet::dataStatic ( T *  p)
inline

Set the data pointer to the following value that should not be freed.

Static data allows us to do a single memcpy even if multiple packets are required to get from source to destination and back. In essence the pointer is set calling dataStatic on the original packet, and whenever this packet is copied and forwarded the same pointer is passed on. When a packet eventually reaches the destination holding the data, it is copied once into the location originally set. On the way back to the source, no copies are necessary.

Definition at line 1134 of file packet.hh.

References data, DYNAMIC_DATA, flags, gem5::Flags< T >::noneSet(), gem5::MipsISA::p, gem5::Flags< T >::set(), and STATIC_DATA.

Referenced by gem5::AtomicSimpleCPU::amoMem(), gem5::o3::LSQ::SplitDataRequest::buildPackets(), gem5::TimingSimpleCPU::buildSplitPacket(), gem5::DmaPort::DmaReqState::createPacket(), gem5::ArmISA::TableWalker::Port::createPacket(), gem5::Shader::doFunctionalAccess(), gem5::BaseKvmCPU::doMMIOAccess(), gem5::ruby::CacheRecorder::enqueueNextFetchRequest(), gem5::FetchUnit::fetch(), gem5::AtomicSimpleCPU::fetchInstMem(), gem5::X86KvmCPU::handleKvmExitIO(), gem5::o3::LSQ::SplitDataRequest::handleLocalAccess(), gem5::o3::CPU::htmSendAbortSignal(), gem5::initMemReqHelper(), gem5::initMemReqScalarHelper(), gem5::o3::LSQUnit::read(), gem5::PortProxy::readBlobPhys(), gem5::ArmISA::TableWalker::readDataUntimed(), gem5::AtomicSimpleCPU::readMem(), gem5::CheckerCPU::readMem(), gem5::ComputeUnit::DTLBPort::recvTimingResp(), gem5::ComputeUnit::ScalarDTLBPort::recvTimingResp(), gem5::o3::LSQ::SplitDataRequest::recvTimingResp(), gem5::TimingSimpleCPU::sendFetch(), gem5::ComputeUnit::sendRequest(), gem5::Checker< gem5::RefCountingPtr >::verify(), gem5::o3::LSQUnit::writebackStores(), gem5::BaseCache::writebackVisitor(), and gem5::AtomicSimpleCPU::writeMem().

◆ dataStaticConst()

template<typename T >
void gem5::Packet::dataStaticConst ( const T *  p)
inline

Set the data pointer to the following value that should not be freed.

This version of the function allows the pointer passed to us to be const. To avoid issues down the line we cast the constness away, the alternative would be to keep both a const and non-const data pointer and cleverly choose between them. Note that this is only allowed for static data.

Definition at line 1151 of file packet.hh.

References data, DYNAMIC_DATA, flags, gem5::Flags< T >::noneSet(), gem5::MipsISA::p, gem5::Flags< T >::set(), and STATIC_DATA.

Referenced by gem5::PortProxy::writeBlobPhys().

◆ deleteData()

void gem5::Packet::deleteData ( )
inline

delete the data pointed to in the data pointer.

Ok to call to matter how data was allocted.

Definition at line 1315 of file packet.hh.

References gem5::Flags< T >::clear(), data, DYNAMIC_DATA, flags, gem5::Flags< T >::isSet(), and STATIC_DATA.

Referenced by ~Packet().

◆ findNextSenderState()

template<typename T >
T* gem5::Packet::findNextSenderState ( ) const
inline

Go through the sender state stack and return the first instance that is of type T (as determined by a dynamic_cast).

If there is no sender state of type T, NULL is returned.

Returns
The topmost state of type T

Definition at line 564 of file packet.hh.

References gem5::Packet::SenderState::predecessor, senderState, and gem5::ArmISA::t.

Referenced by gem5::MSHR::TargetList::add(), gem5::ruby::Sequencer::hitCallback(), and gem5::minor::LSQ::tryToSend().

◆ fromCache()

bool gem5::Packet::fromCache ( ) const
inline

◆ get()

template<typename T >
T gem5::Packet::get ( ByteOrder  endian) const
inline

Get the data in the packet byte swapped from the specified endianness.

Definition at line 85 of file packet_access.hh.

References panic.

Referenced by gem5::getMem().

◆ getAddr()

Addr gem5::Packet::getAddr ( ) const
inline

Definition at line 781 of file packet.hh.

References addr, flags, gem5::Flags< T >::isSet(), and VALID_ADDR.

Referenced by gem5::Cache::access(), gem5::memory::AbstractMemory::access(), gem5::BaseCache::access(), gem5::memory::DRAMSim2::accessAndRespond(), gem5::memory::DRAMsim3::accessAndRespond(), gem5::memory::MemCtrl::accessAndRespond(), gem5::BaseSetAssoc::accessBlock(), gem5::SectorTags::accessBlock(), gem5::FALRU::accessBlock(), gem5::SimpleCache::accessTiming(), gem5::memory::MemCtrl::addToReadQueue(), gem5::memory::MemCtrl::addToWriteQueue(), gem5::BaseCache::allocateBlock(), gem5::SMMUv3DeviceInterface::atsRecvAtomic(), gem5::SMMUv3DeviceInterface::atsRecvTimingReq(), gem5::SMMUv3DeviceInterface::atsRecvTimingResp(), gem5::o3::LSQUnit::checkSnoop(), gem5::ruby::GPUCoalescer::coalescePacket(), gem5::o3::LSQUnit::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), gem5::NoncoherentCache::createMissPacket(), gem5::Cache::createMissPacket(), gem5::AMDGPUDevice::dispatchAccess(), gem5::IdeController::dispatchAccess(), gem5::SparcISA::TLB::doMmuRegRead(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::AddressMonitor::doMonitor(), gem5::memory::CfiMemory::BlockData::erase(), gem5::SMMUTranslRequest::fromPacket(), gem5::ruby::MessageBuffer::functionalAccess(), gem5::memory::AbstractMemory::functionalAccess(), gem5::BaseCache::functionalAccess(), gem5::ruby::RubySystem::functionalRead(), gem5::ruby::RubySystem::functionalWrite(), gem5::ruby::RubyRequest::functionalWrite(), getAddrRange(), getBlockAddr(), getOffset(), gem5::prefetch::Queued::getPacket(), gem5::replacement_policy::SHiPMem::getSignature(), gem5::NoncoherentCache::handleAtomicReqMiss(), gem5::BaseCache::handleFill(), gem5::ArmISA::handleLockedSnoop(), gem5::MipsISA::handleLockedSnoop(), gem5::RiscvISA::handleLockedSnoop(), gem5::minor::Execute::handleMemResponse(), gem5::SimpleMemobj::handleRequest(), gem5::SimpleCache::handleRequest(), gem5::SimpleMemobj::handleResponse(), gem5::SimpleCache::handleResponse(), gem5::DmaPort::handleRespPacket(), gem5::ArmISA::TableWalker::Port::handleRespPacket(), gem5::Cache::handleSnoop(), gem5::BaseCache::handleTimingReqMiss(), gem5::DmaThread::hitCallback(), gem5::GpuWavefront::hitCallback(), gem5::ruby::RubyPort::MemResponsePort::hitCallback(), gem5::ruby::Sequencer::hitCallback(), gem5::ruby::GPUCoalescer::hitCallback(), gem5::SimpleCache::insert(), gem5::BaseTags::insertBlock(), gem5::ruby::UncoalescedTable::insertPacket(), gem5::ruby::Sequencer::insertRequest(), gem5::I2CBus::isClockSet(), gem5::I2CBus::isEnd(), gem5::ruby::RubyPort::MemResponsePort::isPhysMemAddress(), gem5::I2CBus::isStart(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::ruby::Sequencer::issueRequest(), gem5::ruby::DMASequencer::makeRequest(), gem5::ruby::Sequencer::makeRequest(), gem5::ruby::GPUCoalescer::makeRequest(), matchAddr(), gem5::BaseCPU::mwait(), gem5::prefetch::BOP::notifyFill(), gem5::prefetch::SBOOE::notifyFill(), gem5::prefetch::Base::observeAccess(), sc_gem5::packet2payload(), gem5::prefetch::Base::PrefetchInfo::PrefetchInfo(), print(), gem5::prefetch::Base::probeNotify(), gem5::memory::qos::MemSinkCtrl::processNextReqEvent(), gem5::SimpleUart::read(), gem5::MmDisk::read(), gem5::PciVirtIO::read(), gem5::MmioVirtIO::read(), gem5::DumbTOD::read(), gem5::AmbaFake::read(), gem5::Sp805::read(), gem5::NoMaliGpu::read(), gem5::Pl011::read(), gem5::X86ISA::Speaker::read(), gem5::GenericWatchdog::read(), gem5::IsaFake::read(), gem5::A9SCU::read(), gem5::X86ISA::I8254::read(), gem5::X86ISA::Cmos::read(), gem5::X86ISA::I82094AA::read(), gem5::FVPBasePwrCtrl::read(), gem5::X86ISA::I8237::read(), gem5::X86ISA::I8259::read(), gem5::HDLcd::read(), gem5::Gicv2m::read(), gem5::PL031::read(), gem5::Gicv3::read(), gem5::AMDGPUDevice::read(), gem5::EnergyCtrl::read(), gem5::Iob::read(), gem5::Clint::read(), gem5::Pl050::read(), gem5::X86ISA::I8042::read(), gem5::Plic::read(), gem5::I2CBus::read(), gem5::MHU::read(), gem5::Sp804::read(), gem5::Gicv3Its::read(), gem5::RealViewCtrl::read(), gem5::CopyEngine::read(), gem5::CpuLocalTimer::read(), gem5::VGic::read(), gem5::X86ISA::Interrupts::read(), gem5::Uart8250::read(), gem5::sinic::Device::read(), gem5::GenericPciHost::read(), gem5::NSGigE::read(), gem5::Pl111::read(), gem5::memory::CfiMemory::read(), gem5::GenericTimerFrame::read(), gem5::IGbE::read(), gem5::GicV2::read(), gem5::GenericTimerMem::read(), gem5::o3::LSQUnit::read(), gem5::UFSHostDevice::read(), gem5::AMDGPUDevice::readConfig(), gem5::IdeController::readConfig(), gem5::PciDevice::readConfig(), gem5::SMMUv3::readControl(), gem5::GicV2::readCpu(), gem5::VGic::readCtrl(), gem5::GicV2::readDistributor(), gem5::AMDGPUDevice::readFrame(), gem5::AmbaDevice::readId(), gem5::Iob::readIob(), gem5::Iob::readJBus(), gem5::AMDGPUDevice::readROM(), gem5::VGic::readVCpu(), gem5::ruby::Sequencer::recordMissLatency(), gem5::StubSlavePort::recvAtomic(), gem5::ruby::RubyPort::MemResponsePort::recvAtomic(), gem5::SMMUv3DeviceInterface::recvAtomic(), gem5::SMMUControlPort::recvAtomic(), gem5::ruby::RubyPort::PioResponsePort::recvAtomic(), gem5::AddrMapper::recvAtomic(), gem5::memory::MemCtrl::recvAtomic(), gem5::NoncoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::Cache::recvAtomicSnoop(), gem5::AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), gem5::AddrMapper::recvAtomicSnoop(), gem5::ruby::RubyPort::MemResponsePort::recvFunctional(), gem5::NoncoherentXBar::recvFunctional(), gem5::MemCheckerMonitor::recvFunctional(), gem5::AddrMapper::recvFunctional(), gem5::memory::MemCtrl::recvFunctional(), gem5::AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(), gem5::MemCheckerMonitor::recvFunctionalSnoop(), gem5::AddrMapper::recvFunctionalSnoop(), gem5::X86ISA::Interrupts::recvMessage(), gem5::HMCController::recvTimingReq(), gem5::ruby::RubyPort::MemResponsePort::recvTimingReq(), gem5::SMMUv3DeviceInterface::recvTimingReq(), gem5::ruby::RubyPort::PioResponsePort::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::SerialLink::SerialLinkResponsePort::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::Bridge::BridgeResponsePort::recvTimingReq(), gem5::memory::DRAMSim2::recvTimingReq(), gem5::MemCheckerMonitor::recvTimingReq(), gem5::AddrMapper::recvTimingReq(), gem5::memory::DRAMsim3::recvTimingReq(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::BaseCache::recvTimingReq(), gem5::memory::MemCtrl::recvTimingReq(), gem5::RubyDirectedTester::CpuPort::recvTimingResp(), gem5::ruby::RubyPort::MemRequestPort::recvTimingResp(), gem5::ruby::RubyPort::PioRequestPort::recvTimingResp(), gem5::ruby::AbstractController::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::SMMUv3::recvTimingResp(), gem5::TimingSimpleCPU::IcachePort::recvTimingResp(), gem5::MemCheckerMonitor::recvTimingResp(), gem5::AddrMapper::recvTimingResp(), gem5::TimingSimpleCPU::DcachePort::recvTimingResp(), gem5::SerialLink::SerialLinkRequestPort::recvTimingResp(), gem5::Bridge::BridgeRequestPort::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::minor::LSQ::recvTimingResp(), gem5::o3::LSQ::recvTimingResp(), gem5::Cache::recvTimingSnoopReq(), gem5::o3::LSQ::recvTimingSnoopReq(), gem5::Cache::recvTimingSnoopResp(), gem5::ruby::RubyPort::ruby_hit_callback(), gem5::ruby::HTMSequencer::rubyHtmCallback(), gem5::SMMUv3::runProcessTiming(), gem5::BaseCache::satisfyRequest(), gem5::PacketQueue::schedSendTiming(), gem5::TimingSimpleCPU::sendFetch(), gem5::Cache::sendMSHRQueuePacket(), gem5::ComputeUnit::sendRequest(), gem5::SimpleCache::sendResponse(), gem5::ruby::DataBlock::setData(), gem5::RiscvISA::Walker::WalkerState::stepWalk(), gem5::SMMUv3::tableWalkRecvTimingResp(), gem5::ruby::testAndRead(), gem5::ruby::testAndReadMask(), gem5::ruby::testAndWrite(), gem5::AtomicSimpleCPU::threadSnoop(), trySatisfyFunctional(), gem5::SerialLink::SerialLinkResponsePort::trySendTiming(), gem5::Bridge::BridgeResponsePort::trySendTiming(), gem5::SerialLink::SerialLinkRequestPort::trySendTiming(), gem5::Bridge::BridgeRequestPort::trySendTiming(), gem5::DmaPort::trySendTimingReq(), gem5::BaseTrafficGen::update(), gem5::I2CBus::updateSignals(), gem5::SimpleUart::write(), gem5::MmDisk::write(), gem5::MmioVirtIO::write(), gem5::PciVirtIO::write(), gem5::Sp805::write(), gem5::AmbaFake::write(), gem5::NoMaliGpu::write(), gem5::Pl011::write(), gem5::X86ISA::Speaker::write(), gem5::GenericWatchdog::write(), gem5::IsaFake::write(), gem5::A9SCU::write(), gem5::X86ISA::I8254::write(), gem5::X86ISA::Cmos::write(), gem5::X86ISA::I82094AA::write(), gem5::FVPBasePwrCtrl::write(), gem5::X86ISA::I8237::write(), gem5::X86ISA::I8259::write(), gem5::HDLcd::write(), gem5::Gicv2m::write(), gem5::AMDGPUDevice::write(), gem5::PL031::write(), gem5::Gicv3::write(), gem5::EnergyCtrl::write(), gem5::Iob::write(), gem5::Clint::write(), gem5::Pl050::write(), gem5::X86ISA::I8042::write(), gem5::Plic::write(), gem5::I2CBus::write(), gem5::MHU::write(), gem5::Gicv3Its::write(), gem5::Sp804::write(), gem5::CopyEngine::write(), gem5::RealViewCtrl::write(), gem5::CpuLocalTimer::write(), gem5::VGic::write(), gem5::X86ISA::Interrupts::write(), gem5::Uart8250::write(), gem5::sinic::Device::write(), gem5::GenericPciHost::write(), gem5::HSAPacketProcessor::write(), gem5::NSGigE::write(), gem5::Pl111::write(), gem5::memory::CfiMemory::write(), gem5::GenericTimerFrame::write(), gem5::IGbE::write(), gem5::GicV2::write(), gem5::GenericTimerMem::write(), gem5::UFSHostDevice::write(), gem5::ruby::VIPERCoalescer::writeCompleteCallback(), gem5::AMDGPUDevice::writeConfig(), gem5::IdeController::writeConfig(), gem5::PciDevice::writeConfig(), gem5::NSGigE::writeConfig(), gem5::IGbE::writeConfig(), gem5::SMMUv3::writeControl(), gem5::GicV2::writeCpu(), gem5::VGic::writeCtrl(), gem5::GicV2::writeDistributor(), gem5::Iob::writeIob(), gem5::Iob::writeJBus(), and gem5::VGic::writeVCpu().

◆ getAddrRange()

AddrRange gem5::Packet::getAddrRange ( ) const

◆ getAtomicOp()

AtomicOpFunctor* gem5::Packet::getAtomicOp ( ) const
inline

◆ getBE()

template<typename T >
T gem5::Packet::getBE
inline

Get the data in the packet byte swapped from big endian to host endian.

Definition at line 71 of file packet_access.hh.

References gem5::betoh().

Referenced by gem5::SparcISA::TLB::doMmuRegWrite(), gem5::Iob::writeIob(), and gem5::Iob::writeJBus().

◆ getBlockAddr()

Addr gem5::Packet::getBlockAddr ( unsigned int  blk_size) const
inline

◆ getConstPtr()

template<typename T >
const T* gem5::Packet::getConstPtr ( ) const
inline

◆ getHtmTransactionFailedInCacheRC()

HtmCacheFailure gem5::Packet::getHtmTransactionFailedInCacheRC ( ) const

If a packet/request has returned from the cache hierarchy in a failed transaction, this function returns the failure reason.

Definition at line 514 of file packet.cc.

References htmReturnReason, and htmTransactionFailedInCache().

Referenced by gem5::o3::LSQUnit::completeDataAccess(), gem5::TimingSimpleCPU::completeDataAccess(), and Packet().

◆ getHtmTransactionUid()

uint64_t gem5::Packet::getHtmTransactionUid ( ) const

If a packet/request originates in a CPU executing in transactional mode, i.e.

within a transaction, this function returns the unique ID of the transaction. This is used for verifying correctness and debugging.

Definition at line 534 of file packet.cc.

References flags, FROM_TRANSACTION, htmTransactionUid, and gem5::Flags< T >::isSet().

Referenced by gem5::o3::LSQUnit::completeDataAccess(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::ruby::HTMSequencer::htmCallback(), gem5::ruby::Sequencer::issueRequest(), and Packet().

◆ getLE()

template<typename T >
T gem5::Packet::getLE
inline

◆ getOffset()

Addr gem5::Packet::getOffset ( unsigned int  blk_size) const
inline

◆ getPtr()

template<typename T >
T* gem5::Packet::getPtr ( )
inline

◆ getRaw()

template<typename T >
T gem5::Packet::getRaw
inline

◆ getSize()

unsigned gem5::Packet::getSize ( ) const
inline

Definition at line 791 of file packet.hh.

References flags, gem5::Flags< T >::isSet(), size, and VALID_SIZE.

Referenced by gem5::memory::AbstractMemory::access(), gem5::BaseCache::access(), gem5::SimpleCache::accessTiming(), gem5::memory::MemCtrl::addToReadQueue(), gem5::memory::MemCtrl::addToWriteQueue(), allocate(), gem5::ruby::DMASequencer::atomicCallback(), gem5::SMMUv3DeviceInterface::atsRecvAtomic(), gem5::SMMUv3DeviceInterface::atsRecvTimingReq(), gem5::SMMUv3DeviceInterface::atsRecvTimingResp(), gem5::BaseXBar::calcPacketTiming(), gem5::BaseCache::cmpAndSwap(), gem5::AMDGPUDevice::dispatchAccess(), gem5::IdeController::dispatchAccess(), gem5::SMMUProcess::doRead(), gem5::ItsProcess::doRead(), gem5::ItsProcess::doWrite(), gem5::SMMUTranslRequest::fromPacket(), gem5::ruby::RubyRequest::functionalWrite(), getAddrRange(), getUintX(), gem5::BaseCache::handleFill(), gem5::minor::Execute::handleMemResponse(), gem5::Cache::handleTimingReqMiss(), gem5::BaseCache::handleTimingReqMiss(), gem5::ruby::Sequencer::hitCallback(), gem5::ruby::GPUCoalescer::hitCallback(), gem5::ruby::HTMSequencer::htmCallback(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::ruby::Sequencer::issueRequest(), isWholeLineWrite(), gem5::ruby::DMASequencer::makeRequest(), sc_gem5::packet2payload(), print(), gem5::memory::qos::MemSinkCtrl::processNextReqEvent(), gem5::Cache::promoteWholeLineWrites(), gem5::MmDisk::read(), gem5::MmioVirtIO::read(), gem5::PciVirtIO::read(), gem5::DumbTOD::read(), gem5::Sp805::read(), gem5::NoMaliGpu::read(), gem5::Pl011::read(), gem5::X86ISA::Speaker::read(), gem5::GenericWatchdog::read(), gem5::IsaFake::read(), gem5::A9SCU::read(), gem5::X86ISA::I8254::read(), gem5::X86ISA::Cmos::read(), gem5::FVPBasePwrCtrl::read(), gem5::X86ISA::I82094AA::read(), gem5::X86ISA::I8237::read(), gem5::X86ISA::I8259::read(), gem5::HDLcd::read(), gem5::PL031::read(), gem5::Gicv3::read(), gem5::EnergyCtrl::read(), gem5::Clint::read(), gem5::X86ISA::I8042::read(), gem5::Plic::read(), gem5::Sp804::read(), gem5::RealViewCtrl::read(), gem5::CopyEngine::read(), gem5::CpuLocalTimer::read(), gem5::X86ISA::Interrupts::read(), gem5::Uart8250::read(), gem5::sinic::Device::read(), gem5::GenericPciHost::read(), gem5::NSGigE::read(), gem5::Pl111::read(), gem5::GenericTimerFrame::read(), gem5::IGbE::read(), gem5::GenericTimerMem::read(), gem5::AMDGPUDevice::readConfig(), gem5::IdeController::readConfig(), gem5::PciDevice::readConfig(), gem5::VirtIODeviceBase::readConfigBlob(), gem5::SMMUv3::readControl(), gem5::GicV2::readDistributor(), gem5::AMDGPUDevice::readROM(), gem5::StubSlavePort::recvAtomic(), gem5::ruby::RubyPort::MemResponsePort::recvAtomic(), gem5::SMMUv3DeviceInterface::recvAtomic(), gem5::SMMUControlPort::recvAtomic(), gem5::NoncoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicSnoop(), gem5::ruby::RubyPort::MemResponsePort::recvFunctional(), gem5::MemCheckerMonitor::recvFunctional(), gem5::MemCheckerMonitor::recvFunctionalSnoop(), gem5::HMCController::recvTimingReq(), gem5::SMMUv3DeviceInterface::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::SerialLink::SerialLinkResponsePort::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::MemCheckerMonitor::recvTimingReq(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::memory::MemCtrl::recvTimingReq(), gem5::NoncoherentXBar::recvTimingResp(), gem5::SMMUv3::recvTimingResp(), gem5::MemCheckerMonitor::recvTimingResp(), gem5::SerialLink::SerialLinkRequestPort::recvTimingResp(), gem5::CoherentXBar::recvTimingResp(), gem5::CoherentXBar::recvTimingSnoopReq(), gem5::CoherentXBar::recvTimingSnoopResp(), gem5::minor::LSQ::SplitDataRequest::retireResponse(), gem5::SMMUv3::runProcessTiming(), gem5::Cache::satisfyRequest(), gem5::BaseCache::satisfyRequest(), gem5::PacketQueue::schedSendTiming(), gem5::memory::qos::Policy::schedule(), gem5::memory::qos::MemCtrl::schedule(), gem5::BaseCache::sendMSHRQueuePacket(), gem5::ComputeUnit::sendRequest(), gem5::Cache::serviceMSHRTargets(), gem5::ruby::DataBlock::setData(), setData(), setUintX(), gem5::X86ISA::Walker::WalkerState::stepWalk(), gem5::RiscvISA::Walker::WalkerState::stepWalk(), gem5::SMMUv3::tableWalkRecvTimingResp(), gem5::ruby::testAndRead(), gem5::ruby::testAndReadMask(), gem5::ruby::testAndWrite(), trySatisfyFunctional(), gem5::SerialLink::SerialLinkResponsePort::trySendTiming(), gem5::SerialLink::SerialLinkRequestPort::trySendTiming(), gem5::MSHR::TargetList::updateWriteFlags(), gem5::MmDisk::write(), gem5::MmioVirtIO::write(), gem5::PciVirtIO::write(), gem5::Sp805::write(), gem5::NoMaliGpu::write(), gem5::Pl011::write(), gem5::X86ISA::Speaker::write(), gem5::GenericWatchdog::write(), gem5::IsaFake::write(), gem5::X86ISA::I8254::write(), gem5::X86ISA::Cmos::write(), gem5::X86ISA::I82094AA::write(), gem5::FVPBasePwrCtrl::write(), gem5::X86ISA::I8259::write(), gem5::X86ISA::I8237::write(), gem5::HDLcd::write(), gem5::PL031::write(), gem5::Gicv3::write(), gem5::EnergyCtrl::write(), gem5::Clint::write(), gem5::Pl050::write(), gem5::X86ISA::I8042::write(), gem5::Plic::write(), gem5::MHU::write(), gem5::Gicv3Its::write(), gem5::Sp804::write(), gem5::CopyEngine::write(), gem5::CpuLocalTimer::write(), gem5::X86ISA::Interrupts::write(), gem5::Uart8250::write(), gem5::sinic::Device::write(), gem5::GenericPciHost::write(), gem5::HSAPacketProcessor::write(), gem5::NSGigE::write(), gem5::Pl111::write(), gem5::memory::CfiMemory::write(), gem5::GenericTimerFrame::write(), gem5::IGbE::write(), gem5::GenericTimerMem::write(), gem5::UFSHostDevice::write(), gem5::AMDGPUDevice::writeConfig(), gem5::IdeController::writeConfig(), gem5::PciDevice::writeConfig(), gem5::VirtIODeviceBase::writeConfigBlob(), gem5::SMMUv3::writeControl(), writeData(), and gem5::GicV2::writeDistributor().

◆ getUintX()

uint64_t gem5::Packet::getUintX ( ByteOrder  endian) const

◆ hasData()

bool gem5::Packet::hasData ( ) const
inline

◆ hasRespData()

bool gem5::Packet::hasRespData ( ) const
inline

◆ hasSharers()

bool gem5::Packet::hasSharers ( ) const
inline

◆ htmTransactionFailedInCache()

bool gem5::Packet::htmTransactionFailedInCache ( ) const

Returns whether or not this packet/request has returned from the cache hierarchy in a failed transaction.

The core is notified liked this.

Definition at line 508 of file packet.cc.

References FAILS_TRANSACTION, flags, and gem5::Flags< T >::isSet().

Referenced by gem5::o3::LSQUnit::completeDataAccess(), gem5::TimingSimpleCPU::completeDataAccess(), getHtmTransactionFailedInCacheRC(), Packet(), gem5::ruby::RubyPort::MemRequestPort::recvTimingResp(), gem5::TimingSimpleCPU::IcachePort::recvTimingResp(), and gem5::o3::LSQUnit::writeback().

◆ isAtomicOp()

bool gem5::Packet::isAtomicOp ( ) const
inline

◆ isBlockCached()

bool gem5::Packet::isBlockCached ( ) const
inline

◆ isClean()

bool gem5::Packet::isClean ( ) const
inline

◆ isCleanEviction()

bool gem5::Packet::isCleanEviction ( ) const
inline

Is this packet a clean eviction, including both actual clean evict packets, but also clean writebacks.

Definition at line 1394 of file packet.hh.

References gem5::MemCmd::CleanEvict, cmd, and gem5::MemCmd::WritebackClean.

Referenced by gem5::BaseCache::access(), and gem5::CoherentXBar::sinkPacket().

◆ isDemand()

bool gem5::Packet::isDemand ( ) const
inline

Definition at line 584 of file packet.hh.

References cmd, and gem5::MemCmd::isDemand().

Referenced by gem5::BaseCache::handleTimingReqMiss().

◆ isError()

bool gem5::Packet::isError ( ) const
inline

◆ isEviction()

bool gem5::Packet::isEviction ( ) const
inline

◆ isExpressSnoop()

bool gem5::Packet::isExpressSnoop ( ) const
inline

◆ isFlush()

bool gem5::Packet::isFlush ( ) const
inline

◆ isHtmTransactional()

bool gem5::Packet::isHtmTransactional ( ) const

Returns whether or not this packet/request originates in the CPU executing in transactional mode, i.e.

within a transaction.

Definition at line 528 of file packet.cc.

References flags, FROM_TRANSACTION, and gem5::Flags< T >::isSet().

Referenced by gem5::o3::LSQUnit::completeDataAccess(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::ruby::Sequencer::issueRequest(), and Packet().

◆ isInvalidate()

bool gem5::Packet::isInvalidate ( ) const
inline

◆ isLLSC()

bool gem5::Packet::isLLSC ( ) const
inline

◆ isMaskedWrite()

bool gem5::Packet::isMaskedWrite ( ) const
inline

◆ isPrint()

bool gem5::Packet::isPrint ( ) const
inline

◆ isRead()

bool gem5::Packet::isRead ( ) const
inline

Definition at line 582 of file packet.hh.

References cmd, and gem5::MemCmd::isRead().

Referenced by gem5::memory::AbstractMemory::access(), gem5::BaseCache::access(), gem5::SimpleCache::accessFunctional(), gem5::SimpleCache::accessTiming(), gem5::MemTest::completeRequest(), convertLlToRead(), gem5::SimpleMemDelay::delayReq(), gem5::SimpleMemDelay::delayResp(), gem5::Cache::doTimingSupplyResponse(), gem5::CoherentXBar::forwardPacket(), gem5::memory::AbstractMemory::functionalAccess(), gem5::ruby::GPUCoalescer::getRequestType(), gem5::NoncoherentCache::handleAtomicReqMiss(), gem5::Cache::handleAtomicReqMiss(), gem5::BaseCache::handleFill(), gem5::TimingSimpleCPU::handleReadPacket(), gem5::Cache::handleSnoop(), gem5::Cache::handleTimingReqMiss(), gem5::ruby::DMASequencer::makeRequest(), gem5::ruby::Sequencer::makeRequest(), gem5::ruby::GPUCoalescer::makeRequest(), gem5::prefetch::Base::observeAccess(), sc_gem5::packet2payload(), gem5::ComputeUnit::DataPort::processMemRespEvent(), gem5::memory::qos::MemSinkCtrl::processNextReqEvent(), gem5::PioPort< gem5::X86ISA::Interrupts >::recvAtomic(), gem5::NoncoherentCache::recvAtomic(), gem5::SMMUControlPort::recvAtomic(), gem5::ruby::RubyPort::MemResponsePort::recvFunctional(), gem5::RiscvISA::Walker::WalkerState::recvPacket(), gem5::X86ISA::Walker::WalkerState::recvPacket(), gem5::TimingSimpleCPU::DcachePort::recvReqRetry(), gem5::NoncoherentCache::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::memory::DRAMSim2::recvTimingReq(), gem5::MemCheckerMonitor::recvTimingReq(), gem5::memory::DRAMsim3::recvTimingReq(), gem5::CommMonitor::recvTimingReq(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::memory::MemCtrl::recvTimingReq(), gem5::NoncoherentCache::recvTimingResp(), gem5::ruby::AbstractController::recvTimingResp(), gem5::MemCheckerMonitor::recvTimingResp(), gem5::CommMonitor::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::ComputeUnit::ScalarDataPort::recvTimingResp(), gem5::Cache::recvTimingSnoopReq(), gem5::NoncoherentCache::satisfyRequest(), gem5::Cache::satisfyRequest(), gem5::BaseCache::satisfyRequest(), gem5::ComputeUnit::sendRequest(), gem5::ComputeUnit::sendScalarRequest(), gem5::Cache::serviceMSHRTargets(), gem5::CoherentXBar::sinkPacket(), and trySatisfyFunctional().

◆ isRequest()

bool gem5::Packet::isRequest ( ) const
inline

◆ isResponse()

bool gem5::Packet::isResponse ( ) const
inline

Definition at line 587 of file packet.hh.

References cmd, and gem5::MemCmd::isResponse().

Referenced by gem5::memory::DRAMSim2::accessAndRespond(), gem5::memory::DRAMsim3::accessAndRespond(), gem5::memory::MemCtrl::accessAndRespond(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::b_transport(), gem5::GarnetSyntheticTraffic::completeRequest(), gem5::CoherentXBar::forwardAtomic(), gem5::CoherentXBar::forwardFunctional(), gem5::NoncoherentCache::handleAtomicReqMiss(), gem5::Cache::handleAtomicReqMiss(), gem5::BaseCache::handleFill(), gem5::DmaPort::handleRespPacket(), gem5::ArmISA::TableWalker::Port::handleRespPacket(), gem5::Cache::handleSnoop(), gem5::ruby::RubyPort::MemResponsePort::hitCallback(), gem5::SimpleCache::insert(), gem5::PioPort< gem5::X86ISA::Interrupts >::recvAtomic(), gem5::CommMonitor::recvAtomic(), gem5::NoncoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicSnoop(), gem5::ruby::RubyPort::MemResponsePort::recvFunctional(), gem5::CoherentXBar::recvFunctional(), gem5::X86ISA::Walker::WalkerState::recvPacket(), gem5::RiscvISA::Walker::WalkerState::recvPacket(), gem5::SimpleTimingPort::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::ruby::RubyPort::MemRequestPort::recvTimingResp(), gem5::NoncoherentCache::recvTimingResp(), gem5::X86ISA::IntRequestPort< gem5::X86ISA::I82094AA >::recvTimingResp(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::recvTimingResp(), gem5::ruby::AbstractController::recvTimingResp(), gem5::MemCheckerMonitor::recvTimingResp(), gem5::CommMonitor::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::BaseCache::CpuSidePort::recvTimingSnoopResp(), gem5::TimingResponseProtocol::sendResp(), gem5::TimingRequestProtocol::sendSnoopResp(), setBadAddress(), gem5::SnoopFilter::updateResponse(), gem5::SnoopFilter::updateSnoopForward(), and gem5::SnoopFilter::updateSnoopResponse().

◆ isSecure()

bool gem5::Packet::isSecure ( ) const
inline

◆ isUpgrade()

bool gem5::Packet::isUpgrade ( ) const
inline

◆ isWholeLineWrite()

bool gem5::Packet::isWholeLineWrite ( unsigned  blk_size)
inline

◆ isWrite()

bool gem5::Packet::isWrite ( ) const
inline

Definition at line 583 of file packet.hh.

References cmd, and gem5::MemCmd::isWrite().

Referenced by gem5::Cache::access(), gem5::memory::AbstractMemory::access(), gem5::BaseCache::access(), gem5::SimpleCache::accessFunctional(), gem5::SimpleCache::accessTiming(), gem5::memory::MemCtrl::addToReadQueue(), gem5::memory::MemCtrl::addToWriteQueue(), gem5::WriteQueueEntry::allocate(), gem5::BaseCache::allocateWriteBuffer(), gem5::memory::CfiMemory::cfiAccess(), gem5::CacheBlk::checkWrite(), gem5::o3::LSQUnit::completeDataAccess(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::TraceCPU::ElasticDataGen::completeMemAccess(), gem5::GarnetSyntheticTraffic::completeRequest(), gem5::MemTest::completeRequest(), convertScToWrite(), gem5::SimpleMemDelay::delayReq(), gem5::SimpleMemDelay::delayResp(), gem5::CoherentXBar::forwardPacket(), gem5::SMMUTranslRequest::fromPacket(), gem5::memory::AbstractMemory::functionalAccess(), gem5::ruby::SequencerRequest::functionalWrite(), gem5::ruby::GPUCoalescer::getRequestType(), gem5::Cache::handleAtomicReqMiss(), gem5::ArmISA::handleLockedSnoop(), gem5::Cache::handleTimingReqMiss(), gem5::BaseCache::handleTimingReqMiss(), gem5::ruby::RubyPort::MemResponsePort::hitCallback(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::ruby::DMASequencer::makeRequest(), gem5::ruby::Sequencer::makeRequest(), gem5::ruby::GPUCoalescer::makeRequest(), sc_gem5::packet2payload(), gem5::prefetch::Base::probeNotify(), gem5::NoncoherentCache::recvAtomic(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), gem5::ruby::RubyPort::MemResponsePort::recvFunctional(), gem5::TimingSimpleCPU::DcachePort::recvReqRetry(), gem5::NoncoherentCache::recvTimingReq(), gem5::SMMUv3DeviceInterface::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::memory::DRAMSim2::recvTimingReq(), gem5::MemCheckerMonitor::recvTimingReq(), gem5::memory::DRAMsim3::recvTimingReq(), gem5::CommMonitor::recvTimingReq(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::memory::MemCtrl::recvTimingReq(), gem5::BaseTrafficGen::recvTimingResp(), gem5::ruby::AbstractController::recvTimingResp(), gem5::MemCheckerMonitor::recvTimingResp(), gem5::CommMonitor::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::ComputeUnit::ScalarDataPort::recvTimingResp(), gem5::TimingSimpleCPU::DcachePort::recvTimingSnoopReq(), gem5::minor::LSQ::recvTimingSnoopReq(), gem5::NoncoherentCache::satisfyRequest(), gem5::BaseCache::satisfyRequest(), gem5::BaseCache::sendMSHRQueuePacket(), gem5::ComputeUnit::sendRequest(), gem5::ComputeUnit::sendScalarRequest(), setFunctionalResponseStatus(), gem5::CoherentXBar::sinkPacket(), gem5::minor::LSQ::threadSnoop(), trySatisfyFunctional(), and gem5::MSHR::TargetList::updateWriteFlags().

◆ isWriteback()

bool gem5::Packet::isWriteback ( ) const
inline

◆ makeAtomicResponse()

void gem5::Packet::makeAtomicResponse ( )
inline

Definition at line 1043 of file packet.hh.

References makeResponse().

Referenced by gem5::SMMUTranslationProcess::completeTransaction(), gem5::AMDGPUDevice::dispatchAccess(), gem5::IdeController::dispatchAccess(), gem5::SparcISA::TLB::doMmuRegRead(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::NoncoherentCache::handleAtomicReqMiss(), gem5::Cache::handleAtomicReqMiss(), gem5::Cache::handleSnoop(), gem5::SimpleUart::read(), gem5::MmDisk::read(), gem5::DumbTOD::read(), gem5::AmbaFake::read(), gem5::Pl011::read(), gem5::X86ISA::Speaker::read(), gem5::A9SCU::read(), gem5::IsaFake::read(), gem5::X86ISA::I8254::read(), gem5::X86ISA::Cmos::read(), gem5::X86ISA::I82094AA::read(), gem5::X86ISA::I8237::read(), gem5::X86ISA::I8259::read(), gem5::HDLcd::read(), gem5::Gicv2m::read(), gem5::PL031::read(), gem5::Gicv3::read(), gem5::EnergyCtrl::read(), gem5::Iob::read(), gem5::Pl050::read(), gem5::X86ISA::I8042::read(), gem5::I2CBus::read(), gem5::MHU::read(), gem5::Sp804::read(), gem5::Gicv3Its::read(), gem5::RealViewCtrl::read(), gem5::CopyEngine::read(), gem5::CpuLocalTimer::read(), gem5::X86ISA::Interrupts::read(), gem5::Uart8250::read(), gem5::GenericPciHost::read(), gem5::HSAPacketProcessor::read(), gem5::NSGigE::read(), gem5::Pl111::read(), gem5::IGbE::read(), gem5::IdeController::readConfig(), gem5::PciDevice::readConfig(), gem5::SMMUv3::readControl(), gem5::GicV2::readCpu(), gem5::VGic::readCtrl(), gem5::GicV2::readDistributor(), gem5::VGic::readVCpu(), gem5::BaseCache::recvAtomic(), gem5::X86ISA::Interrupts::recvMessage(), gem5::SimpleUart::write(), gem5::MmDisk::write(), gem5::AmbaFake::write(), gem5::NoMaliGpu::write(), gem5::Pl011::write(), gem5::X86ISA::Speaker::write(), gem5::IsaFake::write(), gem5::A9SCU::write(), gem5::X86ISA::I8254::write(), gem5::X86ISA::Cmos::write(), gem5::X86ISA::I82094AA::write(), gem5::X86ISA::I8237::write(), gem5::X86ISA::I8259::write(), gem5::HDLcd::write(), gem5::Gicv2m::write(), gem5::PL031::write(), gem5::Gicv3::write(), gem5::Iob::write(), gem5::EnergyCtrl::write(), gem5::Pl050::write(), gem5::X86ISA::I8042::write(), gem5::MHU::write(), gem5::Gicv3Its::write(), gem5::Sp804::write(), gem5::CopyEngine::write(), gem5::RealViewCtrl::write(), gem5::CpuLocalTimer::write(), gem5::X86ISA::Interrupts::write(), gem5::Uart8250::write(), gem5::HSAPacketProcessor::write(), gem5::NSGigE::write(), gem5::Pl111::write(), gem5::IGbE::write(), gem5::IdeController::writeConfig(), gem5::PciDevice::writeConfig(), gem5::SMMUv3::writeControl(), gem5::GicV2::writeCpu(), gem5::VGic::writeCtrl(), gem5::GicV2::writeDistributor(), and gem5::VGic::writeVCpu().

◆ makeHtmTransactionalReqResponse()

void gem5::Packet::makeHtmTransactionalReqResponse ( const HtmCacheFailure  ret_code)

Communicates to the core that a packet was processed by the memory subsystem while running in transactional mode.

It may happen that the transaction has failed at the memory subsystem and this needs to be communicated to the core somehow. This function decorates the response packet with flags to indicate such a situation has occurred.

Definition at line 482 of file packet.cc.

References gem5::Flags< T >::clear(), cmd, EXPRESS_SNOOP, flags, isRequest(), needsResponse(), gem5::MemCmd::responseCommand(), and setHtmTransactionFailedInCache().

Referenced by gem5::ruby::HTMSequencer::rubyHtmCallback().

◆ makeReadCmd()

static MemCmd gem5::Packet::makeReadCmd ( const RequestPtr req)
inlinestatic

◆ makeResponse()

void gem5::Packet::makeResponse ( )
inline

Take a request packet and modify it in place to be suitable for returning as a response to that request.

Definition at line 1031 of file packet.hh.

References gem5::Flags< T >::clear(), cmd, EXPRESS_SNOOP, flags, isRequest(), needsResponse(), and gem5::MemCmd::responseCommand().

Referenced by gem5::memory::AbstractMemory::access(), gem5::SimpleCache::accessTiming(), gem5::memory::AbstractMemory::functionalAccess(), gem5::BaseCache::functionalAccess(), gem5::SimpleCache::handleFunctional(), gem5::SimpleCache::handleResponse(), gem5::ruby::RubyPort::MemResponsePort::hitCallback(), makeAtomicResponse(), makeTimingResponse(), gem5::StubSlavePort::processResponseEvent(), gem5::MmioVirtIO::read(), gem5::PciVirtIO::read(), gem5::Sp805::read(), gem5::NoMaliGpu::read(), gem5::GenericWatchdog::read(), gem5::FVPBasePwrCtrl::read(), gem5::Clint::read(), gem5::Plic::read(), gem5::memory::CfiMemory::read(), gem5::GenericTimerFrame::read(), gem5::GenericTimerMem::read(), gem5::o3::LSQUnit::read(), gem5::UFSHostDevice::read(), gem5::VirtIODeviceBase::readConfigBlob(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvAtomic(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::ruby::RubyPort::MemResponsePort::recvFunctional(), gem5::MemDelay::ResponsePort::recvFunctional(), gem5::NoncoherentXBar::recvFunctional(), gem5::SerialLink::SerialLinkResponsePort::recvFunctional(), gem5::Bridge::BridgeResponsePort::recvFunctional(), gem5::CoherentXBar::recvFunctional(), gem5::MemDelay::RequestPort::recvFunctionalSnoop(), gem5::CoherentXBar::recvFunctionalSnoop(), gem5::ruby::RubyPort::MemResponsePort::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::TimingSimpleCPU::sendData(), gem5::TimingSimpleCPU::sendSplitData(), gem5::SerialLink::SerialLinkRequestPort::trySatisfyFunctional(), gem5::Bridge::BridgeRequestPort::trySatisfyFunctional(), gem5::minor::LSQ::tryToSendToTransfers(), gem5::MmioVirtIO::write(), gem5::PciVirtIO::write(), gem5::Sp805::write(), gem5::GenericWatchdog::write(), gem5::FVPBasePwrCtrl::write(), gem5::Clint::write(), gem5::Plic::write(), gem5::memory::CfiMemory::write(), gem5::GenericTimerFrame::write(), gem5::GenericTimerMem::write(), gem5::UFSHostDevice::write(), and gem5::VirtIODeviceBase::writeConfigBlob().

◆ makeTimingResponse()

void gem5::Packet::makeTimingResponse ( )
inline

◆ makeWriteCmd()

static MemCmd gem5::Packet::makeWriteCmd ( const RequestPtr req)
inlinestatic

◆ matchAddr() [1/2]

bool gem5::Packet::matchAddr ( const Addr  addr,
const bool  is_secure 
) const

Check if packet corresponds to a given address and address space.

Parameters
addrThe address to compare against.
is_secureWhether addr belongs to the secure address space.
Returns
Whether packet matches description.

Definition at line 408 of file packet.cc.

References addr, getAddr(), and isSecure().

Referenced by matchAddr(), and gem5::Cache::serviceMSHRTargets().

◆ matchAddr() [2/2]

bool gem5::Packet::matchAddr ( const PacketPtr  pkt) const

Check if this packet refers to the same address and address space as another packet.

Parameters
pktThe packet to compare against.
Returns
Whether packet matches description.

Definition at line 414 of file packet.cc.

References getAddr(), isSecure(), and matchAddr().

◆ matchBlockAddr() [1/2]

bool gem5::Packet::matchBlockAddr ( const Addr  addr,
const bool  is_secure,
const int  blk_size 
) const

Check if packet corresponds to a given block-aligned address and address space.

Parameters
addrThe address to compare against.
is_secureWhether addr belongs to the secure address space.
blk_sizeBlock size in bytes.
Returns
Whether packet matches description.

Definition at line 394 of file packet.cc.

References addr, getBlockAddr(), and isSecure().

Referenced by gem5::WriteQueueEntry::allocate(), gem5::MSHR::allocate(), gem5::WriteQueueEntry::matchBlockAddr(), gem5::MSHR::matchBlockAddr(), and matchBlockAddr().

◆ matchBlockAddr() [2/2]

bool gem5::Packet::matchBlockAddr ( const PacketPtr  pkt,
const int  blk_size 
) const

Check if this packet refers to the same block-aligned address and address space as another packet.

Parameters
pktThe packet to compare against.
blk_sizeBlock size in bytes.
Returns
Whether packet matches description.

Definition at line 401 of file packet.cc.

References getBlockAddr(), isSecure(), and matchBlockAddr().

◆ mustCheckAbove()

bool gem5::Packet::mustCheckAbove ( ) const
inline

Does the request need to check for cached copies of the same block in the memory hierarchy above.

Definition at line 1384 of file packet.hh.

References cmd, gem5::MemCmd::HardPFReq, and isEviction().

Referenced by gem5::Cache::handleSnoop(), and gem5::Cache::recvTimingSnoopReq().

◆ needsResponse()

bool gem5::Packet::needsResponse ( ) const
inline

Definition at line 597 of file packet.hh.

References cmd, and gem5::MemCmd::needsResponse().

Referenced by gem5::memory::AbstractMemory::access(), gem5::BaseCache::access(), gem5::memory::DRAMSim2::accessAndRespond(), gem5::memory::DRAMsim3::accessAndRespond(), gem5::memory::MemCtrl::accessAndRespond(), gem5::SimpleCache::accessTiming(), gem5::BaseTrafficGen::allocateWaitingRespSlot(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::b_transport(), gem5::NoncoherentCache::createMissPacket(), gem5::Cache::createMissPacket(), gem5::Cache::doTimingSupplyResponse(), gem5::NoncoherentCache::handleAtomicReqMiss(), gem5::Cache::handleAtomicReqMiss(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::handleBeginReq(), gem5::Cache::handleSnoop(), gem5::MSHR::handleSnoop(), gem5::BaseCache::handleTimingReqHit(), gem5::Cache::handleTimingReqMiss(), gem5::ruby::RubyPort::MemResponsePort::hitCallback(), gem5::SnoopFilter::lookupRequest(), makeHtmTransactionalReqResponse(), makeResponse(), gem5::memory::qos::MemSinkCtrl::processNextReqEvent(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvAtomic(), gem5::CommMonitor::recvAtomic(), gem5::BaseCache::recvAtomic(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::ruby::RubyPort::MemResponsePort::recvFunctional(), gem5::NoncoherentXBar::recvFunctional(), gem5::CoherentXBar::recvFunctional(), gem5::CoherentXBar::recvFunctionalSnoop(), gem5::SimpleTimingPort::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::SerialLink::SerialLinkResponsePort::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::Bridge::BridgeResponsePort::recvTimingReq(), gem5::MemCheckerMonitor::recvTimingReq(), gem5::AddrMapper::recvTimingReq(), gem5::CommMonitor::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::Cache::recvTimingSnoopReq(), gem5::ruby::HTMSequencer::rubyHtmCallback(), gem5::CoherentXBar::sinkPacket(), and gem5::minor::Fetch1::tryToSendToTransfers().

◆ needsWritable()

bool gem5::Packet::needsWritable ( ) const
inline

◆ popLabel()

void gem5::Packet::popLabel ( )
inline

◆ popSenderState()

Packet::SenderState * gem5::Packet::popSenderState ( )

◆ print() [1/2]

std::string gem5::Packet::print ( ) const

A no-args wrapper of print(std::ostream...) meant to be invoked from DPRINTFs avoiding string overheads in fast mode.

Returns
string with the request's type and start<->end addresses

Definition at line 387 of file packet.cc.

◆ print() [2/2]

void gem5::Packet::print ( std::ostream &  o,
int  verbosity = 0,
const std::string &  prefix = "" 
) const
virtual

Implements gem5::Printable.

Definition at line 373 of file packet.cc.

References gem5::ccprintf(), cmdString(), getAddr(), getSize(), isExpressSnoop(), and req.

Referenced by gem5::Cache::access(), gem5::memory::AbstractMemory::access(), gem5::BaseCache::access(), gem5::memory::MemCtrl::accessAndRespond(), gem5::SimpleCache::accessTiming(), gem5::MSHR::TargetList::add(), gem5::BaseCache::allocateWriteBuffer(), gem5::Cache::cleanEvictBlk(), gem5::NoncoherentCache::createMissPacket(), gem5::Cache::createMissPacket(), gem5::Cache::doTimingSupplyResponse(), gem5::CoherentXBar::forwardTiming(), gem5::BaseCache::functionalAccess(), gem5::NoncoherentCache::handleAtomicReqMiss(), gem5::Cache::handleAtomicReqMiss(), gem5::Cache::handleSnoop(), gem5::MSHR::handleSnoop(), gem5::BaseCache::handleTimingReqHit(), gem5::BaseCache::handleTimingReqMiss(), gem5::SimpleCache::insert(), gem5::SnoopFilter::lookupRequest(), gem5::SnoopFilter::lookupSnoop(), gem5::Cache::recvAtomic(), gem5::BaseCache::recvAtomic(), gem5::memory::MemCtrl::recvAtomic(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::NoncoherentCache::recvAtomicSnoop(), gem5::CoherentXBar::recvAtomicSnoop(), gem5::CoherentXBar::recvFunctional(), gem5::memory::MemCtrl::recvFunctional(), gem5::CoherentXBar::recvFunctionalSnoop(), gem5::SimpleCache::CPUSidePort::recvRespRetry(), gem5::Cache::recvTimingReq(), gem5::SimpleCache::CPUSidePort::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::memory::MemCtrl::recvTimingReq(), gem5::BaseTrafficGen::recvTimingResp(), gem5::CoherentXBar::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::NoncoherentCache::recvTimingSnoopReq(), gem5::Cache::recvTimingSnoopReq(), gem5::CoherentXBar::recvTimingSnoopReq(), gem5::NoncoherentCache::recvTimingSnoopResp(), gem5::Cache::recvTimingSnoopResp(), gem5::CoherentXBar::recvTimingSnoopResp(), gem5::BaseCache::satisfyRequest(), gem5::Cache::sendMSHRQueuePacket(), gem5::BaseCache::sendMSHRQueuePacket(), gem5::SimpleCache::CPUSidePort::sendPacket(), gem5::BaseCache::sendWriteQueuePacket(), gem5::Cache::serviceMSHRTargets(), gem5::o3::LSQUnit::trySendPacket(), gem5::SnoopFilter::updateResponse(), gem5::SnoopFilter::updateSnoopForward(), gem5::SnoopFilter::updateSnoopResponse(), gem5::BaseCache::writebackBlk(), and gem5::BaseCache::writecleanBlk().

◆ pushLabel()

void gem5::Packet::pushLabel ( const std::string &  lbl)
inline

◆ pushSenderState()

void gem5::Packet::pushSenderState ( Packet::SenderState sender_state)

◆ qosValue() [1/2]

uint8_t gem5::Packet::qosValue ( ) const
inline

QoS Value getter Returns 0 if QoS value was never set (constructor default).

Returns
QoS priority value of the packet

Definition at line 756 of file packet.hh.

References _qosValue.

Referenced by gem5::memory::MemCtrl::addToReadQueue(), gem5::memory::MemCtrl::addToWriteQueue(), gem5::memory::qos::MemSinkCtrl::processNextReqEvent(), gem5::memory::qos::MemCtrl::qosSchedule(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), and gem5::memory::qos::MemCtrl::schedule().

◆ qosValue() [2/2]

void gem5::Packet::qosValue ( const uint8_t  qos_value)
inline

QoS Value setter Interface for setting QoS priority value of the packet.

Parameters
qos_valueQoS priority value

Definition at line 764 of file packet.hh.

References _qosValue.

◆ requestorId()

RequestorID gem5::Packet::requestorId ( ) const
inline

◆ responderHadWritable()

bool gem5::Packet::responderHadWritable ( ) const
inline

◆ satisfied()

bool gem5::Packet::satisfied ( ) const
inline

◆ set()

template<typename T >
void gem5::Packet::set ( v,
ByteOrder  endian 
)
inline

Set the value in the data pointer to v using the specified endianness.

Definition at line 115 of file packet_access.hh.

References panic, and gem5::ArmISA::v.

◆ setAddr()

void gem5::Packet::setAddr ( Addr  _addr)
inline

Update the address of this packet mid-transaction.

This is used by the address mapper to change an already set address to a new one based on the system configuration. It is intended to remap an existing address, so it asserts that the current address is valid.

Definition at line 789 of file packet.hh.

References addr, flags, gem5::Flags< T >::isSet(), and VALID_ADDR.

Referenced by gem5::SMMUTranslationProcess::completeTransaction(), gem5::ruby::VIPERCoalescer::makeWriteCompletePkts(), gem5::AddrMapper::recvAtomic(), gem5::AddrMapper::recvAtomicSnoop(), gem5::AddrMapper::recvFunctional(), gem5::AddrMapper::recvFunctionalSnoop(), gem5::AddrMapper::recvTimingReq(), and gem5::AddrMapper::recvTimingResp().

◆ setBadAddress()

void gem5::Packet::setBadAddress ( )
inline

◆ setBE()

template<typename T >
void gem5::Packet::setBE ( v)
inline

Set the value in the data pointer to v as big endian.

Definition at line 101 of file packet_access.hh.

References gem5::htobe(), setRaw(), and gem5::ArmISA::v.

Referenced by gem5::SparcISA::TLB::doMmuRegRead(), gem5::DumbTOD::read(), gem5::Iob::readIob(), and gem5::Iob::readJBus().

◆ setBlockCached()

void gem5::Packet::setBlockCached ( )
inline

◆ setCacheResponding()

void gem5::Packet::setCacheResponding ( )
inline

Snoop flags.

Set the cacheResponding flag. This is used by the caches to signal another cache that they are responding to a request. A cache will only respond to snoops if it has the line in either Modified or Owned state. Note that on snoop hits we always pass the line as Modified and never Owned. In the case of an Owned line we proceed to invalidate all other copies.

On a cache fill (see Cache::handleFill), we check hasSharers first, ignoring the cacheResponding flag if hasSharers is set. A line is consequently allocated as:

hasSharers cacheResponding state true false Shared true true Shared false false Exclusive false true Modified

Definition at line 640 of file packet.hh.

References CACHE_RESPONDING, flags, isRequest(), gem5::Flags< T >::isSet(), and gem5::Flags< T >::set().

Referenced by gem5::Cache::handleSnoop(), gem5::MSHR::handleSnoop(), gem5::Cache::recvTimingReq(), gem5::Cache::recvTimingSnoopReq(), gem5::Cache::satisfyRequest(), and gem5::BaseCache::satisfyRequest().

◆ setData()

void gem5::Packet::setData ( const uint8_t *  p)
inline

◆ setDataFromBlock()

void gem5::Packet::setDataFromBlock ( const uint8_t *  blk_data,
int  blkSize 
)
inline

Copy data into the packet from the provided block pointer, which is aligned to the given block size.

Definition at line 1271 of file packet.hh.

References getOffset(), and setData().

Referenced by gem5::SimpleCache::accessFunctional(), gem5::Cache::doTimingSupplyResponse(), gem5::Cache::handleSnoop(), gem5::BaseCache::satisfyRequest(), gem5::BaseCache::writebackBlk(), and gem5::BaseCache::writecleanBlk().

◆ setExpressSnoop()

void gem5::Packet::setExpressSnoop ( )
inline

The express snoop flag is used for two purposes.

Firstly, it is used to bypass flow control for normal (non-snoop) requests going downstream in the memory system. In cases where a cache is responding to a snoop from another cache (it had a dirty line), but the line is not writable (and there are possibly other copies), the express snoop flag is set by the downstream cache to invalidate all other copies in zero time. Secondly, the express snoop flag is also set to be able to distinguish snoop packets that came from a downstream cache, rather than snoop packets from neighbouring caches.

Definition at line 688 of file packet.hh.

References EXPRESS_SNOOP, flags, and gem5::Flags< T >::set().

Referenced by gem5::Cache::handleSnoop(), gem5::Cache::isCachedAbove(), gem5::Cache::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), and gem5::Cache::sendMSHRQueuePacket().

◆ setFunctionalResponseStatus()

void gem5::Packet::setFunctionalResponseStatus ( bool  success)
inline

◆ setHasSharers()

void gem5::Packet::setHasSharers ( )
inline

On fills, the hasSharers flag is used by the caches in combination with the cacheResponding flag, as clarified above.

If the hasSharers flag is not set, the packet is passing writable. Thus, a response from a memory passes the line as writable by default.

The hasSharers flag is also used by upstream caches to inform a downstream cache that they have the block (by calling setHasSharers on snoop request packets that hit in upstream cachs tags or MSHRs). If the snoop packet has sharers, a downstream cache is prevented from passing a dirty line upwards if it was not explicitly asked for a writable copy. See Cache::satisfyCpuSideRequest.

The hasSharers flag is also used on writebacks, in combination with the WritbackClean or WritebackDirty commands, to allocate the block downstream either as:

command hasSharers state WritebackDirty false Modified WritebackDirty true Owned WritebackClean false Exclusive WritebackClean true Shared

Definition at line 672 of file packet.hh.

References flags, HAS_SHARERS, and gem5::Flags< T >::set().

Referenced by gem5::Cache::createMissPacket(), gem5::Cache::handleSnoop(), gem5::MSHR::handleSnoop(), gem5::Cache::recvTimingSnoopReq(), gem5::Cache::satisfyRequest(), gem5::BaseCache::writebackBlk(), and gem5::BaseCache::writecleanBlk().

◆ setHtmTransactional()

void gem5::Packet::setHtmTransactional ( uint64_t  val)

Stipulates that this packet/request originates in the CPU executing in transactional mode, i.e.

within a transaction.

Definition at line 521 of file packet.cc.

References flags, FROM_TRANSACTION, htmTransactionUid, and gem5::Flags< T >::set().

Referenced by gem5::TimingSimpleCPU::completeDataAccess(), gem5::o3::CPU::htmSendAbortSignal(), Packet(), gem5::o3::LSQUnit::read(), gem5::TimingSimpleCPU::sendData(), and gem5::TimingSimpleCPU::sendSplitData().

◆ setHtmTransactionFailedInCache()

void gem5::Packet::setHtmTransactionFailedInCache ( const HtmCacheFailure  ret_code)

Stipulates that this packet/request has returned from the cache hierarchy in a failed transaction.

The core is notified like this.

Definition at line 498 of file packet.cc.

References FAILS_TRANSACTION, flags, htmReturnReason, gem5::NO_FAIL, and gem5::Flags< T >::set().

Referenced by gem5::o3::LSQUnit::completeDataAccess(), gem5::TimingSimpleCPU::completeDataAccess(), makeHtmTransactionalReqResponse(), and Packet().

◆ setLE()

template<typename T >
void gem5::Packet::setLE ( v)
inline

◆ setRaw()

template<typename T >
void gem5::Packet::setRaw ( v)
inline

Set the value in the data pointer to v without byte swapping.

Definition at line 61 of file packet_access.hh.

References data, DYNAMIC_DATA, flags, gem5::Flags< T >::isSet(), size, STATIC_DATA, and gem5::ArmISA::v.

Referenced by gem5::X86ISA::buildIntPacket(), gem5::MmDisk::read(), gem5::I2CBus::read(), setBE(), and setLE().

◆ setResponderHadWritable()

void gem5::Packet::setResponderHadWritable ( )
inline

On responding to a snoop request (which only happens for Modified or Owned lines), make sure that we can transform an Owned response to a Modified one.

If this flag is not set, the responding cache had the line in the Owned state, and there are possibly other Shared copies in the memory system. A downstream cache helps in orchestrating the invalidation of these copies by sending out the appropriate express snoops.

Definition at line 700 of file packet.hh.

References cacheResponding(), flags, RESPONDER_HAD_WRITABLE, responderHadWritable(), and gem5::Flags< T >::set().

Referenced by gem5::Cache::handleSnoop(), gem5::MSHR::handleSnoop(), and gem5::Cache::recvTimingSnoopReq().

◆ setSatisfied()

void gem5::Packet::setSatisfied ( )
inline

Set when a request hits in a cache and the cache is not going to respond.

This is used by the crossbar to coordinate responses for cache maintenance operations.

Definition at line 736 of file packet.hh.

References cmd, flags, gem5::MemCmd::isClean(), gem5::Flags< T >::isSet(), SATISFIED, and gem5::Flags< T >::set().

Referenced by gem5::Cache::handleSnoop(), gem5::MSHR::handleSnoop(), gem5::BaseCache::recvAtomic(), and gem5::BaseCache::sendMSHRQueuePacket().

◆ setSize()

void gem5::Packet::setSize ( unsigned  size)
inline

Definition at line 1067 of file packet.hh.

References flags, gem5::Flags< T >::isSet(), gem5::Flags< T >::set(), size, and VALID_SIZE.

◆ setSuppressFuncError()

void gem5::Packet::setSuppressFuncError ( )
inline

◆ setUintX()

void gem5::Packet::setUintX ( uint64_t  w,
ByteOrder  endian 
)

◆ setWriteThrough()

void gem5::Packet::setWriteThrough ( )
inline

A writeback/writeclean cmd gets propagated further downstream by the receiver when the flag is set.

Definition at line 722 of file packet.hh.

References cmd, flags, gem5::MemCmd::isEviction(), gem5::MemCmd::isWrite(), gem5::Flags< T >::set(), WRITE_THROUGH, and gem5::MemCmd::WriteClean.

Referenced by gem5::BaseCache::writecleanBlk().

◆ suppressFuncError()

bool gem5::Packet::suppressFuncError ( ) const
inline

◆ trySatisfyFunctional() [1/2]

bool gem5::Packet::trySatisfyFunctional ( PacketPtr  other)
inline

◆ trySatisfyFunctional() [2/2]

bool gem5::Packet::trySatisfyFunctional ( Printable obj,
Addr  base,
bool  is_secure,
int  size,
uint8_t *  _data 
)

Check a functional request against a memory value represented by a base/size pair and an associated data array.

If the current packet is a read, it may be satisfied by the memory value. If the current packet is a write, it may update the memory value.

Definition at line 231 of file packet.cc.

References _isSecure, addr, bytesValid, cmdString(), getAddr(), getSize(), gem5::ArmISA::i, isPrint(), isRead(), isWrite(), panic, senderState, and size.

◆ writeData()

void gem5::Packet::writeData ( uint8_t *  p) const
inline

◆ writeDataToBlock()

void gem5::Packet::writeDataToBlock ( uint8_t *  blk_data,
int  blkSize 
) const
inline

Copy data from the packet to the provided block pointer, which is aligned to the given block size.

Parameters
blk_dataPointer to block to which data will be copied.
blkSizeBlock size in bytes.

Definition at line 1305 of file packet.hh.

References getOffset(), and writeData().

Referenced by gem5::SimpleCache::accessFunctional(), gem5::SimpleCache::insert(), and gem5::BaseCache::updateBlockData().

◆ writeThrough()

bool gem5::Packet::writeThrough ( ) const
inline

Definition at line 729 of file packet.hh.

References flags, gem5::Flags< T >::isSet(), and WRITE_THROUGH.

Referenced by gem5::BaseCache::access().

Member Data Documentation

◆ _isSecure

bool gem5::Packet::_isSecure
private

True if the request targets the secure memory space.

Definition at line 383 of file packet.hh.

Referenced by isSecure(), Packet(), and trySatisfyFunctional().

◆ _qosValue

uint8_t gem5::Packet::_qosValue
private

Definition at line 394 of file packet.hh.

Referenced by qosValue().

◆ addr

Addr gem5::Packet::addr
private

The address of the request.

This address could be virtual or physical, depending on the system configuration.

Definition at line 380 of file packet.hh.

Referenced by getAddr(), matchAddr(), matchBlockAddr(), Packet(), setAddr(), and trySatisfyFunctional().

◆ bytesValid

std::vector<bool> gem5::Packet::bytesValid
private

Track the bytes found that satisfy a functional read.

Definition at line 391 of file packet.hh.

Referenced by trySatisfyFunctional().

◆ cmd

MemCmd gem5::Packet::cmd

The command field of the packet.

Definition at line 361 of file packet.hh.

Referenced by gem5::NoncoherentCache::access(), gem5::memory::AbstractMemory::access(), gem5::BaseCache::access(), gem5::WriteQueueEntry::allocate(), gem5::MSHR::allocate(), gem5::BaseCache::allocateMissBuffer(), gem5::MSHR::allocateTarget(), gem5::BaseCache::allocateWriteBuffer(), gem5::TimingSimpleCPU::buildSplitPacket(), cmdString(), cmdToIndex(), gem5::ruby::GPUCoalescer::coalescePacket(), convertLlToRead(), convertScToWrite(), copyError(), gem5::Cache::createMissPacket(), gem5::Cache::doTimingSupplyResponse(), gem5::Cache::doWritebacks(), gem5::Cache::doWritebacksAtomic(), gem5::MSHR::extractServiceableTargets(), gem5::FetchUnit::fetch(), gem5::CoherentXBar::forwardAtomic(), fromCache(), gem5::NoncoherentCache::handleAtomicReqMiss(), gem5::Cache::handleAtomicReqMiss(), gem5::BaseCache::handleFill(), gem5::MSHR::handleSnoop(), gem5::Cache::handleTimingReqMiss(), gem5::BaseCache::handleTimingReqMiss(), hasData(), hasRespData(), gem5::DmaThread::hitCallback(), gem5::GpuWavefront::hitCallback(), gem5::ruby::RubyPort::MemResponsePort::hitCallback(), gem5::Cache::isCachedAbove(), isClean(), isCleanEviction(), isDemand(), isError(), isEviction(), isFlush(), isInvalidate(), isLLSC(), isMaskedWrite(), isPrint(), isRead(), isRequest(), isResponse(), gem5::ruby::VIPERCoalescer::issueRequest(), isUpgrade(), isWholeLineWrite(), isWrite(), isWriteback(), makeHtmTransactionalReqResponse(), gem5::ruby::VIPERCoalescer::makeRequest(), gem5::ruby::GPUCoalescer::makeRequest(), makeResponse(), mustCheckAbove(), needsResponse(), needsWritable(), gem5::prefetch::BOP::notifyFill(), gem5::prefetch::Base::observeAccess(), gem5::prefetch::Base::probeNotify(), gem5::ComputeUnit::DataPort::processMemRespEvent(), gem5::Cache::promoteWholeLineWrites(), gem5::Clint::read(), gem5::Plic::read(), gem5::X86ISA::IntResponsePort< gem5::X86ISA::Interrupts >::recvAtomic(), gem5::ruby::RubyPort::MemResponsePort::recvAtomic(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicSnoop(), gem5::X86ISA::Interrupts::recvMessage(), gem5::ruby::RubyPort::MemResponsePort::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::NoncoherentCache::recvTimingResp(), gem5::ComputeUnit::DataPort::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::ComputeUnit::DTLBPort::recvTimingResp(), gem5::ComputeUnit::ScalarDTLBPort::recvTimingResp(), gem5::minor::LSQ::recvTimingResp(), gem5::ComputeUnit::ITLBPort::recvTimingResp(), gem5::Cache::recvTimingSnoopReq(), gem5::Cache::recvTimingSnoopResp(), gem5::replaceUpgrade(), gem5::Cache::satisfyRequest(), gem5::BaseCache::satisfyRequest(), gem5::Cache::sendMSHRQueuePacket(), gem5::ComputeUnit::sendRequest(), gem5::NoncoherentCache::serviceMSHRTargets(), gem5::Cache::serviceMSHRTargets(), setBadAddress(), setFunctionalResponseStatus(), setSatisfied(), setWriteThrough(), gem5::RiscvISA::Walker::WalkerState::stepWalk(), gem5::X86ISA::Walker::WalkerState::stepWalk(), and gem5::MSHR::TargetList::updateFlags().

◆ data

PacketDataPtr gem5::Packet::data
private

A pointer to the data being transferred.

It can be different sizes at each level of the hierarchy so it belongs to the packet, not request. This may or may not be populated when a responder receives the packet. If not populated memory should be allocated.

Definition at line 376 of file packet.hh.

Referenced by allocate(), dataDynamic(), dataStatic(), dataStaticConst(), deleteData(), getConstPtr(), getPtr(), getRaw(), Packet(), and setRaw().

◆ flags

Flags gem5::Packet::flags
private

◆ headerDelay

uint32_t gem5::Packet::headerDelay

The extra delay from seeing the packet until the header is transmitted.

This delay is used to communicate the crossbar forwarding latency to the neighbouring object (e.g. a cache) that actually makes the packet wait. As the delay is relative, a 32-bit unsigned should be sufficient.

Definition at line 420 of file packet.hh.

Referenced by gem5::BaseCache::access(), gem5::memory::DRAMSim2::accessAndRespond(), gem5::memory::DRAMsim3::accessAndRespond(), gem5::memory::MemCtrl::accessAndRespond(), gem5::SMMUv3DeviceInterface::atsRecvTimingReq(), gem5::SMMUv3DeviceInterface::atsRecvTimingResp(), gem5::BaseXBar::calcPacketTiming(), gem5::Cache::doTimingSupplyResponse(), gem5::BaseCache::handleFill(), gem5::Cache::handleSnoop(), gem5::BaseCache::handleTimingReqHit(), gem5::BaseCache::handleUncacheableWriteResp(), gem5::StubSlavePort::processResponseEvent(), gem5::GenericPciHost::read(), gem5::PioPort< gem5::X86ISA::Interrupts >::recvAtomic(), gem5::X86ISA::IntResponsePort< gem5::X86ISA::Interrupts >::recvAtomic(), gem5::SMMUControlPort::recvAtomic(), gem5::X86ISA::Walker::WalkerState::recvPacket(), gem5::RiscvISA::Walker::WalkerState::recvPacket(), gem5::HMCController::recvTimingReq(), gem5::Cache::recvTimingReq(), gem5::SMMUv3DeviceInterface::recvTimingReq(), gem5::MemDelay::ResponsePort::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvTimingReq(), gem5::SerialLink::SerialLinkResponsePort::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::Bridge::BridgeResponsePort::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::BaseCache::recvTimingReq(), gem5::MemDelay::RequestPort::recvTimingResp(), gem5::Gicv3Its::recvTimingResp(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::SMMUv3::recvTimingResp(), gem5::SerialLink::SerialLinkRequestPort::recvTimingResp(), gem5::CoherentXBar::recvTimingResp(), gem5::Bridge::BridgeRequestPort::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::CoherentXBar::recvTimingSnoopReq(), gem5::Cache::recvTimingSnoopResp(), gem5::CoherentXBar::recvTimingSnoopResp(), gem5::SMMUv3::runProcessTiming(), gem5::NoncoherentCache::serviceMSHRTargets(), gem5::Cache::serviceMSHRTargets(), gem5::SMMUv3::tableWalkRecvTimingResp(), and gem5::GenericPciHost::write().

◆ htmReturnReason

HtmCacheFailure gem5::Packet::htmReturnReason
private

Holds the return status of the transaction.

The default case will be NO_FAIL, otherwise this will specify the reason for the transaction's failure in the memory subsystem.

Definition at line 403 of file packet.hh.

Referenced by getHtmTransactionFailedInCacheRC(), and setHtmTransactionFailedInCache().

◆ htmTransactionUid

uint64_t gem5::Packet::htmTransactionUid
private

A global unique identifier of the transaction.

This is used for correctness/debugging only.

Definition at line 409 of file packet.hh.

Referenced by getHtmTransactionUid(), and setHtmTransactional().

◆ id

const PacketId gem5::Packet::id

◆ payloadDelay

uint32_t gem5::Packet::payloadDelay

The extra pipelining delay from seeing the packet until the end of payload is transmitted by the component that provided it (if any).

This includes the header delay. Similar to the header delay, this is used to make up for the fact that the crossbar does not make the packet wait. As the delay is relative, a 32-bit unsigned should be sufficient.

Definition at line 438 of file packet.hh.

Referenced by gem5::BaseCache::access(), gem5::memory::DRAMSim2::accessAndRespond(), gem5::memory::DRAMsim3::accessAndRespond(), gem5::memory::MemCtrl::accessAndRespond(), gem5::BaseCache::allocateWriteBuffer(), gem5::SMMUv3DeviceInterface::atsRecvTimingReq(), gem5::SMMUv3DeviceInterface::atsRecvTimingResp(), gem5::BaseXBar::calcPacketTiming(), gem5::Cache::doTimingSupplyResponse(), gem5::BaseCache::handleFill(), gem5::Cache::handleSnoop(), gem5::BaseCache::handleTimingReqHit(), gem5::BaseCache::handleUncacheableWriteResp(), gem5::StubSlavePort::processResponseEvent(), gem5::GenericPciHost::read(), gem5::PioPort< gem5::X86ISA::Interrupts >::recvAtomic(), gem5::X86ISA::IntResponsePort< gem5::X86ISA::Interrupts >::recvAtomic(), gem5::SMMUControlPort::recvAtomic(), gem5::NoncoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvAtomicSnoop(), gem5::X86ISA::Walker::WalkerState::recvPacket(), gem5::RiscvISA::Walker::WalkerState::recvPacket(), gem5::HMCController::recvTimingReq(), gem5::Cache::recvTimingReq(), gem5::SMMUv3DeviceInterface::recvTimingReq(), gem5::MemDelay::ResponsePort::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvTimingReq(), gem5::SerialLink::SerialLinkResponsePort::recvTimingReq(), gem5::memory::SimpleMemory::recvTimingReq(), gem5::Bridge::BridgeResponsePort::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::memory::CfiMemory::recvTimingReq(), gem5::BaseCache::recvTimingReq(), gem5::MemDelay::RequestPort::recvTimingResp(), gem5::Gicv3Its::recvTimingResp(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::SMMUv3::recvTimingResp(), gem5::SerialLink::SerialLinkRequestPort::recvTimingResp(), gem5::CoherentXBar::recvTimingResp(), gem5::Bridge::BridgeRequestPort::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::Cache::recvTimingSnoopResp(), gem5::CoherentXBar::recvTimingSnoopResp(), gem5::SMMUv3::runProcessTiming(), gem5::NoncoherentCache::serviceMSHRTargets(), gem5::Cache::serviceMSHRTargets(), gem5::SMMUv3::tableWalkRecvTimingResp(), gem5::GenericPciHost::write(), gem5::BaseCache::writebackBlk(), and gem5::BaseCache::writecleanBlk().

◆ req

RequestPtr gem5::Packet::req

A pointer to the original request.

Definition at line 366 of file packet.hh.

Referenced by gem5::Cache::access(), gem5::memory::AbstractMemory::access(), gem5::BaseCache::access(), gem5::SimpleCache::accessTiming(), gem5::TraceCPU::ElasticDataGen::addToSortedReadyList(), gem5::minor::ForwardLineData::adoptPacketData(), gem5::WriteQueueEntry::allocate(), gem5::MSHR::allocate(), gem5::MSHR::allocateTarget(), gem5::BaseTrafficGen::allocateWaitingRespSlot(), gem5::TLBCoalescer::canCoalesce(), gem5::minor::LSQ::StoreBuffer::canForwardDataToLoad(), gem5::memory::AbstractMemory::checkLockedAddrList(), gem5::CacheBlk::checkWrite(), gem5::BaseCache::cmpAndSwap(), gem5::ruby::GPUCoalescer::coalescePacket(), gem5::o3::DynInst::completeAcc(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::TimingSimpleCPU::completeIfetch(), gem5::TraceCPU::ElasticDataGen::completeMemAccess(), gem5::GarnetSyntheticTraffic::completeRequest(), gem5::MemTest::completeRequest(), gem5::NoncoherentCache::createMissPacket(), gem5::Cache::createMissPacket(), gem5::prefetch::Queued::DeferredPacket::createPkt(), gem5::prefetch::Queued::createPrefetchRequest(), createRead(), createWrite(), gem5::Shader::doFunctionalAccess(), gem5::SparcISA::TLB::doMmuRegRead(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::AddressMonitor::doMonitor(), gem5::Cache::doTimingSupplyResponse(), gem5::TraceCPU::ElasticDataGen::execute(), gem5::FetchUnit::fetch(), gem5::SMMUTranslRequest::fromPacket(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::get_direct_mem_ptr(), getAtomicOp(), gem5::BaseCache::getNextQueueEntry(), gem5::ruby::RubyRequest::getRequestPtr(), gem5::ruby::GPUCoalescer::getRequestType(), gem5::replacement_policy::SHiPPC::getSignature(), gem5::Cache::handleAtomicReqMiss(), gem5::X86ISA::GpuTLB::handleFuncTranslationReturn(), gem5::o3::LSQ::SingleDataRequest::handleLocalAccess(), gem5::TimingSimpleCPU::handleReadPacket(), gem5::SimpleMemobj::handleResponse(), gem5::DmaPort::handleRespPacket(), gem5::ArmISA::TableWalker::Port::handleRespPacket(), gem5::Cache::handleSnoop(), gem5::MSHR::handleSnoop(), gem5::Cache::handleTimingReqHit(), gem5::Cache::handleTimingReqMiss(), gem5::BaseCache::handleTimingReqMiss(), gem5::X86ISA::GpuTLB::handleTranslationReturn(), gem5::TimingSimpleCPU::handleWritePacket(), gem5::ruby::RubyPort::MemResponsePort::hitCallback(), gem5::ruby::Sequencer::hitCallback(), gem5::ruby::HTMSequencer::htmCallback(), gem5::ruby::htmCmdToRubyRequestType(), gem5::BaseCache::incHitCount(), gem5::BaseCache::incMissCount(), gem5::ComputeUnit::injectGlobalMemFence(), gem5::prefetch::Queued::insert(), gem5::BaseTags::insertBlock(), gem5::ruby::UncoalescedTable::insertPacket(), gem5::ruby::HTMSequencer::insertRequest(), isAtomicOp(), gem5::CoherentXBar::isDestination(), isMaskedWrite(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::ruby::Sequencer::issueRequest(), gem5::X86ISA::GpuTLB::issueTLBLookup(), gem5::SnoopFilter::lookupRequest(), gem5::SnoopFilter::lookupSnoop(), gem5::ItsTranslation::main(), makeReadCmd(), gem5::ruby::VIPERCoalescer::makeRequest(), gem5::ruby::DMASequencer::makeRequest(), gem5::ruby::Sequencer::makeRequest(), gem5::ruby::GPUCoalescer::makeRequest(), makeWriteCmd(), gem5::BaseCPU::mwait(), gem5::prefetch::Base::observeAccess(), gem5::AMBA::orderId(), Packet(), sc_gem5::packet2payload(), gem5::X86ISA::GpuTLB::pagingProtectionChecks(), gem5::prefetch::Base::PrefetchInfo::PrefetchInfo(), print(), gem5::prefetch::Base::probeNotify(), gem5::o3::Fetch::processCacheCompletion(), gem5::FetchStage::processFetchReturn(), gem5::FetchUnit::processFetchReturn(), gem5::ComputeUnit::DataPort::processMemReqEvent(), gem5::ComputeUnit::DataPort::processMemRespEvent(), gem5::memory::qos::MemSinkCtrl::processNextReqEvent(), gem5::TLBCoalescer::processProbeTLBEvent(), gem5::MSHR::promoteWritable(), gem5::Gicv3::read(), gem5::CpuLocalTimer::read(), gem5::sinic::Device::read(), gem5::o3::LSQUnit::read(), gem5::GicV2::readCpu(), gem5::VGic::readCtrl(), gem5::GicV2::readDistributor(), gem5::Iob::readJBus(), gem5::VGic::readVCpu(), gem5::Cache::recvAtomic(), gem5::BaseCache::recvAtomic(), gem5::TLBCoalescer::CpuSidePort::recvFunctional(), gem5::X86ISA::GpuTLB::CpuSidePort::recvFunctional(), gem5::o3::Fetch::recvReqRetry(), gem5::ComputeUnit::DataPort::recvReqRetry(), gem5::ComputeUnit::SQCPort::recvReqRetry(), gem5::ComputeUnit::DTLBPort::recvReqRetry(), gem5::ComputeUnit::ITLBPort::recvReqRetry(), gem5::HMCController::recvTimingReq(), gem5::ruby::RubyPort::MemResponsePort::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::MemCheckerMonitor::recvTimingReq(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), gem5::CoherentXBar::recvTimingReq(), gem5::o3::Fetch::IcachePort::recvTimingResp(), gem5::BaseTrafficGen::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::DmaPort::recvTimingResp(), gem5::MemCheckerMonitor::recvTimingResp(), gem5::X86ISA::GpuTLB::MemSidePort::recvTimingResp(), gem5::CoherentXBar::recvTimingResp(), gem5::ComputeUnit::DataPort::recvTimingResp(), gem5::BaseCache::recvTimingResp(), gem5::ComputeUnit::ScalarDataPort::recvTimingResp(), gem5::ComputeUnit::DTLBPort::recvTimingResp(), gem5::ComputeUnit::ScalarDTLBPort::recvTimingResp(), gem5::ComputeUnit::ITLBPort::recvTimingResp(), gem5::ArmISA::TableWalker::Port::recvTimingResp(), gem5::Cache::recvTimingSnoopReq(), gem5::CoherentXBar::recvTimingSnoopReq(), gem5::Cache::recvTimingSnoopResp(), gem5::CoherentXBar::recvTimingSnoopResp(), requestorId(), gem5::minor::LSQ::SplitDataRequest::retireResponse(), gem5::ruby::HTMSequencer::rubyHtmCallback(), gem5::memory::qos::Policy::schedule(), gem5::memory::qos::MemCtrl::schedule(), gem5::Cache::sendMSHRQueuePacket(), gem5::BaseCache::sendMSHRQueuePacket(), gem5::ComputeUnit::sendRequest(), gem5::ComputeUnit::sendScalarRequest(), gem5::ComputeUnit::LDSPort::sendTimingReq(), gem5::NoncoherentCache::serviceMSHRTargets(), gem5::Cache::serviceMSHRTargets(), gem5::RiscvISA::Walker::WalkerState::stepWalk(), gem5::X86ISA::Walker::WalkerState::stepWalk(), gem5::memory::AbstractMemory::trackLoadLocked(), gem5::CacheBlk::trackLoadLocked(), gem5::X86ISA::GpuTLB::translationReturn(), gem5::minor::LSQ::tryToSend(), gem5::BaseTrafficGen::update(), gem5::TLBCoalescer::updatePhysAddresses(), gem5::SnoopFilter::updateResponse(), gem5::SnoopFilter::updateSnoopResponse(), gem5::MSHR::TargetList::updateWriteFlags(), gem5::Gicv3::write(), gem5::CpuLocalTimer::write(), gem5::sinic::Device::write(), gem5::ruby::Sequencer::writeCallback(), gem5::GicV2::writeCpu(), gem5::VGic::writeCtrl(), writeData(), gem5::GicV2::writeDistributor(), gem5::Iob::writeJBus(), gem5::memory::AbstractMemory::writeOK(), and gem5::VGic::writeVCpu().

◆ senderState

SenderState* gem5::Packet::senderState

This packet's sender state.

Devices should use dynamic_cast<> to cast to the state appropriate to the sender. The intent of this variable is to allow a device to attach extra information to a request. A response packet must return the sender state that was attached to the original request (even if a new packet is created).

Definition at line 534 of file packet.hh.

Referenced by gem5::ruby::PendingWriteInst::ackWriteCompletion(), gem5::o3::LSQ::SplitDataRequest::buildPackets(), gem5::TimingSimpleCPU::buildSplitPacket(), gem5::TLBCoalescer::canCoalesce(), gem5::TimingSimpleCPU::SplitFragmentSenderState::clearFromParent(), gem5::ruby::GPUCoalescer::coalescePacket(), gem5::o3::LSQUnit::completeDataAccess(), gem5::TimingSimpleCPU::completeDataAccess(), gem5::o3::LSQ::completeDataAccess(), gem5::LdsState::countBankConflicts(), gem5::DmaPort::DmaReqState::createPacket(), gem5::ArmISA::TableWalker::Port::createPacket(), gem5::FetchUnit::fetch(), findNextSenderState(), gem5::memory::AbstractMemory::functionalAccess(), gem5::Shader::functionalTLBAccess(), gem5::GarnetSyntheticTraffic::generatePkt(), gem5::ruby::GPUCoalescer::getDynInst(), gem5::LdsState::getDynInstr(), gem5::X86ISA::GpuTLB::handleFuncTranslationReturn(), gem5::DmaPort::handleRespPacket(), gem5::ArmISA::TableWalker::Port::handleRespPacket(), gem5::X86ISA::GpuTLB::handleTranslationReturn(), gem5::DmaThread::hitCallback(), gem5::GpuWavefront::hitCallback(), gem5::Check::initiateAction(), gem5::Check::initiateCheck(), gem5::FetchUnit::initiateFetch(), gem5::Check::initiateFlush(), gem5::Check::initiatePrefetch(), gem5::Cache::isCachedAbove(), gem5::GpuWavefront::issueAcquireOp(), gem5::GpuWavefront::issueAtomicOps(), gem5::DmaThread::issueLoadOps(), gem5::GpuWavefront::issueLoadOps(), gem5::DmaThread::issueStoreOps(), gem5::GpuWavefront::issueStoreOps(), gem5::X86ISA::GpuTLB::issueTLBLookup(), gem5::ruby::VIPERCoalescer::makeWriteCompletePkts(), popLabel(), popSenderState(), gem5::RequestPort::printAddr(), gem5::LdsState::process(), gem5::FetchStage::processFetchReturn(), gem5::FetchUnit::processFetchReturn(), gem5::ComputeUnit::DataPort::processMemReqEvent(), gem5::ComputeUnit::DataPort::processMemRespEvent(), gem5::TLBCoalescer::processProbeTLBEvent(), pushLabel(), pushSenderState(), gem5::TLBCoalescer::CpuSidePort::recvFunctional(), gem5::X86ISA::GpuTLB::CpuSidePort::recvFunctional(), gem5::TimingSimpleCPU::DcachePort::recvReqRetry(), gem5::TLBCoalescer::CpuSidePort::recvTimingReq(), gem5::ProtocolTester::SeqPort::recvTimingResp(), gem5::RubyTester::CpuPort::recvTimingResp(), gem5::ruby::AbstractController::recvTimingResp(), gem5::MemCheckerMonitor::recvTimingResp(), gem5::AddrMapper::recvTimingResp(), gem5::CommMonitor::recvTimingResp(), gem5::o3::LSQUnit::recvTimingResp(), gem5::ComputeUnit::DataPort::recvTimingResp(), gem5::ComputeUnit::ScalarDataPort::recvTimingResp(), gem5::o3::LSQ::SingleDataRequest::recvTimingResp(), gem5::ComputeUnit::DTLBPort::recvTimingResp(), gem5::ComputeUnit::ScalarDTLBPort::recvTimingResp(), gem5::ComputeUnit::ITLBPort::recvTimingResp(), gem5::o3::LSQ::SplitDataRequest::recvTimingResp(), gem5::ComputeUnit::LDSPort::recvTimingResp(), gem5::o3::LSQ::recvTimingResp(), gem5::Cache::sendMSHRQueuePacket(), gem5::ComputeUnit::sendRequest(), gem5::ComputeUnit::sendScalarRequest(), gem5::TimingSimpleCPU::sendSplitData(), gem5::ComputeUnit::LDSPort::sendTimingReq(), gem5::ComputeUnit::sendToLds(), gem5::X86ISA::GpuTLB::translationReturn(), trySatisfyFunctional(), gem5::o3::LSQUnit::trySendPacket(), and gem5::TLBCoalescer::updatePhysAddresses().

◆ size

unsigned gem5::Packet::size
private

The size of the request or transfer.

Definition at line 386 of file packet.hh.

Referenced by getRaw(), getSize(), Packet(), setRaw(), setSize(), and trySatisfyFunctional().

◆ snoopDelay

uint32_t gem5::Packet::snoopDelay

Keep track of the extra delay incurred by snooping upwards before sending a request down the memory system.

This is used by the coherent crossbar to account for the additional request delay.

Definition at line 428 of file packet.hh.

Referenced by gem5::CoherentXBar::recvTimingReq(), gem5::Cache::recvTimingSnoopReq(), and gem5::CoherentXBar::recvTimingSnoopReq().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:52 for gem5 by doxygen 1.8.17