gem5 v24.0.0.0
Loading...
Searching...
No Matches
types.hh
Go to the documentation of this file.
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
35#ifndef __BASE_TYPES_HH__
36#define __BASE_TYPES_HH__
37
38#include <inttypes.h>
39
40#include <cassert>
41#include <limits>
42#include <memory>
43#include <ostream>
44#include <stdexcept>
45
46namespace gem5
47{
48
53typedef int64_t Counter;
54
58typedef uint64_t Tick;
59
60const Tick MaxTick = 0xffffffffffffffffULL;
61
78class Cycles
79{
80
81 private:
82
84 uint64_t c;
85
86 public:
87
89 explicit constexpr Cycles(uint64_t _c) : c(_c) { }
90
92 Cycles() : c(0) { }
93
95 constexpr operator uint64_t() const { return c; }
96
98 Cycles& operator++() { ++c; return *this; }
99
101 Cycles& operator--() { assert(c != 0); --c; return *this; }
102
104 Cycles& operator+=(const Cycles& cc) { c += cc.c; return *this; }
105
107 constexpr bool
108 operator>(const Cycles& cc) const
109 {
110 return c > cc.c;
111 }
112
113 constexpr Cycles
114 operator+(const Cycles& b) const
115 {
116 return Cycles(c + b.c);
117 }
118
119 constexpr Cycles
120 operator-(const Cycles& b) const
121 {
122 return c >= b.c ? Cycles(c - b.c) :
123 throw std::invalid_argument("RHS cycle value larger than LHS");
124 }
125
126 constexpr Cycles
127 operator <<(const int32_t shift) const
128 {
129 return Cycles(c << shift);
130 }
131
132 constexpr Cycles
133 operator >>(const int32_t shift) const
134 {
135 return Cycles(c >> shift);
136 }
137
138 friend std::ostream& operator<<(std::ostream &out, const Cycles & cycles);
139};
140
147typedef uint64_t Addr;
148
149typedef uint16_t MicroPC;
150
151static const MicroPC MicroPCRomBit = 1 << (sizeof(MicroPC) * 8 - 1);
152
153static inline MicroPC
155{
156 return upc | MicroPCRomBit;
157}
158
159static inline MicroPC
161{
162 return upc & ~MicroPCRomBit;
163}
164
165static inline bool
167{
168 return MicroPCRomBit & upc;
169}
170
171const Addr MaxAddr = (Addr)-1;
172
173using RegVal = uint64_t;
174
175// Logical register index type.
176using RegIndex = uint16_t;
177
178static inline uint32_t
180{
181 union
182 {
183 float f;
184 uint32_t i;
185 } u;
186 u.f = val;
187 return u.i;
188}
189
190static inline uint64_t
192{
193 union
194 {
195 double f;
196 uint64_t i;
197 } u;
198 u.f = val;
199 return u.i;
200}
201
202static inline uint64_t floatToBits(double val) { return floatToBits64(val); }
203static inline uint32_t floatToBits(float val) { return floatToBits32(val); }
204
205static inline float
207{
208 union
209 {
210 float f;
211 uint32_t i;
212 } u;
213 u.i = val;
214 return u.f;
215}
216
217static inline double
219{
220 union
221 {
222 double f;
223 uint64_t i;
224 } u;
225 u.i = val;
226 return u.f;
227}
228
229static inline double bitsToFloat(uint64_t val) { return bitsToFloat64(val); }
230static inline float bitsToFloat(uint32_t val) { return bitsToFloat32(val); }
231
235typedef int16_t ThreadID;
237
239typedef int ContextID;
241
245typedef int16_t PortID;
247
248class FaultBase;
249typedef std::shared_ptr<FaultBase> Fault;
250
251// Rather than creating a shared_ptr instance and assigning it nullptr,
252// we just create an alias.
253constexpr decltype(nullptr) NoFault = nullptr;
254
255} // namespace gem5
256
257#endif // __BASE_TYPES_HH__
Cycles is a wrapper class for representing cycle counts, i.e.
Definition types.hh:79
constexpr Cycles operator+(const Cycles &b) const
Definition types.hh:114
Cycles & operator+=(const Cycles &cc)
In-place addition of cycles.
Definition types.hh:104
constexpr Cycles operator>>(const int32_t shift) const
Definition types.hh:133
uint64_t c
Member holding the actual value.
Definition types.hh:84
friend std::ostream & operator<<(std::ostream &out, const Cycles &cycles)
Definition types.cc:35
constexpr Cycles(uint64_t _c)
Explicit constructor assigning a value.
Definition types.hh:89
Cycles & operator--()
Prefix decrement operator.
Definition types.hh:101
Cycles & operator++()
Prefix increment operator.
Definition types.hh:98
constexpr bool operator>(const Cycles &cc) const
Greater than comparison used for > Cycles(0).
Definition types.hh:108
Cycles()
Default constructor for parameter classes.
Definition types.hh:92
constexpr Cycles operator-(const Cycles &b) const
Definition types.hh:120
Bitfield< 7 > b
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 22 > u
Bitfield< 6 > f
Definition misc_types.hh:68
Bitfield< 6, 5 > shift
Definition types.hh:117
Bitfield< 63 > val
Definition misc.hh:804
double Counter
All counters are of 64-bit values.
Definition types.hh:46
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint16_t RegIndex
Definition types.hh:176
std::shared_ptr< FaultBase > Fault
Definition types.hh:249
int16_t ThreadID
Thread index/ID type.
Definition types.hh:235
static uint32_t floatToBits32(float val)
Definition types.hh:179
uint64_t RegVal
Definition types.hh:173
const PortID InvalidPortID
Definition types.hh:246
const ThreadID InvalidThreadID
Definition types.hh:236
static uint64_t floatToBits(double val)
Definition types.hh:202
static MicroPC romMicroPC(MicroPC upc)
Definition types.hh:154
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition types.hh:245
uint64_t Tick
Tick count type.
Definition types.hh:58
const Tick MaxTick
Definition types.hh:60
static uint64_t floatToBits64(double val)
Definition types.hh:191
static double bitsToFloat(uint64_t val)
Definition types.hh:229
int ContextID
Globally unique thread context ID.
Definition types.hh:239
uint16_t MicroPC
Definition types.hh:149
static bool isRomMicroPC(MicroPC upc)
Definition types.hh:166
const ContextID InvalidContextID
Definition types.hh:240
static double bitsToFloat64(uint64_t val)
Definition types.hh:218
static const MicroPC MicroPCRomBit
Definition types.hh:151
static float bitsToFloat32(uint32_t val)
Definition types.hh:206
const Addr MaxAddr
Definition types.hh:171
constexpr decltype(nullptr) NoFault
Definition types.hh:253
static MicroPC normalMicroPC(MicroPC upc)
Definition types.hh:160

Generated on Tue Jun 18 2024 16:24:00 for gem5 by doxygen 1.11.0