gem5  v22.1.0.0
mshr_queue.hh
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40 
45 #ifndef __MEM_CACHE_MSHR_QUEUE_HH__
46 #define __MEM_CACHE_MSHR_QUEUE_HH__
47 
48 #include <string>
49 
50 #include "base/types.hh"
51 #include "mem/cache/mshr.hh"
52 #include "mem/cache/queue.hh"
53 #include "mem/packet.hh"
54 
55 namespace gem5
56 {
57 
61 class MSHRQueue : public Queue<MSHR>
62 {
63  private:
64 
69  const int demandReserve;
70 
71  public:
72 
81  MSHRQueue(const std::string &_label, int num_entries, int reserve,
82  int demand_reserve, std::string cache_name);
83 
99  MSHR *allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt,
100  Tick when_ready, Counter order, bool alloc_on_fill);
101 
105  void deallocate(MSHR *mshr) override;
106 
112  void moveToFront(MSHR *mshr);
113 
121  void delay(MSHR *mshr, Tick delay_ticks);
122 
131  void markInService(MSHR *mshr, bool pending_modified_resp);
132 
137  void markPending(MSHR *mshr);
138 
143  bool forceDeallocateTarget(MSHR *mshr);
144 
149  bool havePending() const
150  {
151  return !readyList.empty();
152  }
153 
158  bool canPrefetch() const
159  {
160  // @todo we may want to revisit the +1, currently added to
161  // keep regressions unchanged
162  return (allocated < numEntries - (numReserve + 1 + demandReserve));
163  }
164 };
165 
166 } // namespace gem5
167 
168 #endif //__MEM_CACHE_MSHR_QUEUE_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
A Class for maintaining a list of pending and allocated memory requests.
Definition: mshr_queue.hh:62
void delay(MSHR *mshr, Tick delay_ticks)
Adds a delay to the provided MSHR and moves MSHRs that will be ready earlier than this entry to the t...
Definition: mshr_queue.cc:104
void deallocate(MSHR *mshr) override
Deallocate a MSHR and its targets.
Definition: mshr_queue.cc:83
const int demandReserve
The number of entries to reserve for future demand accesses.
Definition: mshr_queue.hh:69
bool havePending() const
Returns true if the pending list is not empty.
Definition: mshr_queue.hh:149
bool canPrefetch() const
Returns true if sufficient mshrs for prefetch.
Definition: mshr_queue.hh:158
void markPending(MSHR *mshr)
Mark an in service entry as pending, used to resend a request.
Definition: mshr_queue.cc:123
bool forceDeallocateTarget(MSHR *mshr)
Deallocate top target, possibly freeing the MSHR.
Definition: mshr_queue.cc:136
void moveToFront(MSHR *mshr)
Moves the MSHR to the front of the pending list if it is not in service.
Definition: mshr_queue.cc:94
MSHRQueue(const std::string &_label, int num_entries, int reserve, int demand_reserve, std::string cache_name)
Create a queue with a given number of entries.
Definition: mshr_queue.cc:55
void markInService(MSHR *mshr, bool pending_modified_resp)
Mark the given MSHR as in service.
Definition: mshr_queue.cc:115
MSHR * allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt, Tick when_ready, Counter order, bool alloc_on_fill)
Allocates a new MSHR for the request and size.
Definition: mshr_queue.cc:63
Miss Status and handling Register.
Definition: mshr.hh:75
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
A high-level queue interface, to be used by both the MSHR queue and the write buffer.
Definition: queue.hh:71
Entry::List readyList
Holds pointers to entries that haven't been sent downstream.
Definition: queue.hh:100
const int numReserve
The number of entries to hold as a temporary overflow space.
Definition: queue.hh:93
int allocated
The number of currently allocated entries.
Definition: queue.hh:123
const int numEntries
The total number of entries in this queue.
Definition: queue.hh:85
Miss Status and Handling Register (MSHR) declaration.
double Counter
All counters are of 64-bit values.
Definition: types.hh:47
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint64_t Tick
Tick count type.
Definition: types.hh:58
Declaration of the Packet class.
Declaration of a high-level queue structure.

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