rvk.hh File Reference

#include <cstdint>

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Namespaces
namespace	gem5
	Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
namespace	gem5::RiscvISA

Functions
int32_t	gem5::RiscvISA::_rvk_emu_sll_32 (int32_t rs1, int32_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_srl_32 (int32_t rs1, int32_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_sll_64 (int64_t rs1, int64_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_srl_64 (int64_t rs1, int64_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_rol_32 (int32_t rs1, int32_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_ror_32 (int32_t rs1, int32_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_rol_64 (int64_t rs1, int64_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_ror_64 (int64_t rs1, int64_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_grev_32 (int32_t rs1, int32_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_grev_64 (int64_t rs1, int64_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_brev8_32 (int32_t rs1)
int64_t	gem5::RiscvISA::_rvk_emu_brev8_64 (int64_t rs1)
uint32_t	gem5::RiscvISA::_rvk_emu_shuffle32_stage (uint32_t src, uint32_t maskL, uint32_t maskR, int N)
int32_t	gem5::RiscvISA::_rvk_emu_shfl_32 (int32_t rs1, int32_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_unshfl_32 (int32_t rs1, int32_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_zip_32 (int32_t rs1)
int32_t	gem5::RiscvISA::_rvk_emu_unzip_32 (int32_t rs1)
int32_t	gem5::RiscvISA::_rvk_emu_clmul_32 (int32_t rs1, int32_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_clmulh_32 (int32_t rs1, int32_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_clmul_64 (int64_t rs1, int64_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_clmulh_64 (int64_t rs1, int64_t rs2)
uint32_t	gem5::RiscvISA::_rvk_emu_xperm32 (uint32_t rs1, uint32_t rs2, int sz_log2)
int32_t	gem5::RiscvISA::_rvk_emu_xperm4_32 (int32_t rs1, int32_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_xperm8_32 (int32_t rs1, int32_t rs2)
uint64_t	gem5::RiscvISA::_rvk_emu_xperm64 (uint64_t rs1, uint64_t rs2, int sz_log2)
int64_t	gem5::RiscvISA::_rvk_emu_xperm4_64 (int64_t rs1, int64_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_xperm8_64 (int64_t rs1, int64_t rs2)
uint8_t	gem5::RiscvISA::_rvk_emu_aes_xtime (uint8_t x)
uint32_t	gem5::RiscvISA::_rvk_emu_aes_fwd_mc_8 (uint32_t x)
uint32_t	gem5::RiscvISA::_rvk_emu_aes_fwd_mc_32 (uint32_t x)
uint32_t	gem5::RiscvISA::_rvk_emu_aes_inv_mc_8 (uint32_t x)
uint32_t	gem5::RiscvISA::_rvk_emu_aes_inv_mc_32 (uint32_t x)
int32_t	gem5::RiscvISA::_rvk_emu_aes32dsi (int32_t rs1, int32_t rs2, uint8_t bs)
int32_t	gem5::RiscvISA::_rvk_emu_aes32dsmi (int32_t rs1, int32_t rs2, uint8_t bs)
int64_t	gem5::RiscvISA::_rvk_emu_aes64ds (int64_t rs1, int64_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_aes64im (int64_t rs1)
int64_t	gem5::RiscvISA::_rvk_emu_aes64dsm (int64_t rs1, int64_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_aes64ks1i (int64_t rs1, int rnum)
int64_t	gem5::RiscvISA::_rvk_emu_aes64ks2 (int64_t rs1, int64_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_aes32esi (int32_t rs1, int32_t rs2, uint8_t bs)
int32_t	gem5::RiscvISA::_rvk_emu_aes32esmi (int32_t rs1, int32_t rs2, uint8_t bs)
int64_t	gem5::RiscvISA::_rvk_emu_aes64es (int64_t rs1, int64_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_aes64esm (int64_t rs1, int64_t rs2)
int32_t	gem5::RiscvISA::_rvk_emu_sha256sig0 (int32_t rs1)
int32_t	gem5::RiscvISA::_rvk_emu_sha256sig1 (int32_t rs1)
int32_t	gem5::RiscvISA::_rvk_emu_sha256sum0 (int32_t rs1)
int32_t	gem5::RiscvISA::_rvk_emu_sha256sum1 (int32_t rs1)
static int32_t	gem5::RiscvISA::_rvk_emu_sha512sig0h (int32_t rs1, int32_t rs2)
static int32_t	gem5::RiscvISA::_rvk_emu_sha512sig0l (int32_t rs1, int32_t rs2)
static int32_t	gem5::RiscvISA::_rvk_emu_sha512sig1h (int32_t rs1, int32_t rs2)
static int32_t	gem5::RiscvISA::_rvk_emu_sha512sig1l (int32_t rs1, int32_t rs2)
static int32_t	gem5::RiscvISA::_rvk_emu_sha512sum0r (int32_t rs1, int32_t rs2)
static int32_t	gem5::RiscvISA::_rvk_emu_sha512sum1r (int32_t rs1, int32_t rs2)
int64_t	gem5::RiscvISA::_rvk_emu_sha512sig0 (int64_t rs1)
int64_t	gem5::RiscvISA::_rvk_emu_sha512sig1 (int64_t rs1)
int64_t	gem5::RiscvISA::_rvk_emu_sha512sum0 (int64_t rs1)
int64_t	gem5::RiscvISA::_rvk_emu_sha512sum1 (int64_t rs1)
int32_t	gem5::RiscvISA::_rvk_emu_sm4ed (int32_t rs1, int32_t rs2, uint8_t bs)
int32_t	gem5::RiscvISA::_rvk_emu_sm4ks (int32_t rs1, int32_t rs2, uint8_t bs)
int32_t	gem5::RiscvISA::_rvk_emu_sm3p0 (int32_t rs1)
int32_t	gem5::RiscvISA::_rvk_emu_sm3p1 (int32_t rs1)

Variables
const uint8_t	gem5::RiscvISA::_rvk_emu_aes_fwd_sbox [256]
	Ref: https://github.com/rvkrypto/rvkrypto-fips.
const uint8_t	gem5::RiscvISA::_rvk_emu_aes_inv_sbox [256]
const uint8_t	gem5::RiscvISA::_rvk_emu_sm4_sbox [256]