gem5  v22.1.0.0
rvk.hh
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1 /*
2  * Copyright (c) 2021, Markku-Juhani O. Saarinen <mjos@pqshield.com>
3  * All rights reserved.
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28 
29 #ifndef __ARCH_RISCV_RVK_HH__
30 #define __ARCH_RISCV_RVK_HH__
31 
32 #include <cstdint>
33 
34 // Standard scalar cryptography extension
35 
36 namespace gem5
37 {
38 
39 namespace RiscvISA
40 {
41 
47 const uint8_t _rvk_emu_aes_fwd_sbox[256] = {
48  0x63, 0x7C, 0x77, 0x7B, 0xF2, 0x6B, 0x6F, 0xC5, 0x30, 0x01, 0x67, 0x2B,
49  0xFE, 0xD7, 0xAB, 0x76, 0xCA, 0x82, 0xC9, 0x7D, 0xFA, 0x59, 0x47, 0xF0,
50  0xAD, 0xD4, 0xA2, 0xAF, 0x9C, 0xA4, 0x72, 0xC0, 0xB7, 0xFD, 0x93, 0x26,
51  0x36, 0x3F, 0xF7, 0xCC, 0x34, 0xA5, 0xE5, 0xF1, 0x71, 0xD8, 0x31, 0x15,
52  0x04, 0xC7, 0x23, 0xC3, 0x18, 0x96, 0x05, 0x9A, 0x07, 0x12, 0x80, 0xE2,
53  0xEB, 0x27, 0xB2, 0x75, 0x09, 0x83, 0x2C, 0x1A, 0x1B, 0x6E, 0x5A, 0xA0,
54  0x52, 0x3B, 0xD6, 0xB3, 0x29, 0xE3, 0x2F, 0x84, 0x53, 0xD1, 0x00, 0xED,
55  0x20, 0xFC, 0xB1, 0x5B, 0x6A, 0xCB, 0xBE, 0x39, 0x4A, 0x4C, 0x58, 0xCF,
56  0xD0, 0xEF, 0xAA, 0xFB, 0x43, 0x4D, 0x33, 0x85, 0x45, 0xF9, 0x02, 0x7F,
57  0x50, 0x3C, 0x9F, 0xA8, 0x51, 0xA3, 0x40, 0x8F, 0x92, 0x9D, 0x38, 0xF5,
58  0xBC, 0xB6, 0xDA, 0x21, 0x10, 0xFF, 0xF3, 0xD2, 0xCD, 0x0C, 0x13, 0xEC,
59  0x5F, 0x97, 0x44, 0x17, 0xC4, 0xA7, 0x7E, 0x3D, 0x64, 0x5D, 0x19, 0x73,
60  0x60, 0x81, 0x4F, 0xDC, 0x22, 0x2A, 0x90, 0x88, 0x46, 0xEE, 0xB8, 0x14,
61  0xDE, 0x5E, 0x0B, 0xDB, 0xE0, 0x32, 0x3A, 0x0A, 0x49, 0x06, 0x24, 0x5C,
62  0xC2, 0xD3, 0xAC, 0x62, 0x91, 0x95, 0xE4, 0x79, 0xE7, 0xC8, 0x37, 0x6D,
63  0x8D, 0xD5, 0x4E, 0xA9, 0x6C, 0x56, 0xF4, 0xEA, 0x65, 0x7A, 0xAE, 0x08,
64  0xBA, 0x78, 0x25, 0x2E, 0x1C, 0xA6, 0xB4, 0xC6, 0xE8, 0xDD, 0x74, 0x1F,
65  0x4B, 0xBD, 0x8B, 0x8A, 0x70, 0x3E, 0xB5, 0x66, 0x48, 0x03, 0xF6, 0x0E,
66  0x61, 0x35, 0x57, 0xB9, 0x86, 0xC1, 0x1D, 0x9E, 0xE1, 0xF8, 0x98, 0x11,
67  0x69, 0xD9, 0x8E, 0x94, 0x9B, 0x1E, 0x87, 0xE9, 0xCE, 0x55, 0x28, 0xDF,
68  0x8C, 0xA1, 0x89, 0x0D, 0xBF, 0xE6, 0x42, 0x68, 0x41, 0x99, 0x2D, 0x0F,
69  0xB0, 0x54, 0xBB, 0x16
70 };
71 
72 // AES Inverse S-Box
73 const uint8_t _rvk_emu_aes_inv_sbox[256] = {
74  0x52, 0x09, 0x6A, 0xD5, 0x30, 0x36, 0xA5, 0x38, 0xBF, 0x40, 0xA3, 0x9E,
75  0x81, 0xF3, 0xD7, 0xFB, 0x7C, 0xE3, 0x39, 0x82, 0x9B, 0x2F, 0xFF, 0x87,
76  0x34, 0x8E, 0x43, 0x44, 0xC4, 0xDE, 0xE9, 0xCB, 0x54, 0x7B, 0x94, 0x32,
77  0xA6, 0xC2, 0x23, 0x3D, 0xEE, 0x4C, 0x95, 0x0B, 0x42, 0xFA, 0xC3, 0x4E,
78  0x08, 0x2E, 0xA1, 0x66, 0x28, 0xD9, 0x24, 0xB2, 0x76, 0x5B, 0xA2, 0x49,
79  0x6D, 0x8B, 0xD1, 0x25, 0x72, 0xF8, 0xF6, 0x64, 0x86, 0x68, 0x98, 0x16,
80  0xD4, 0xA4, 0x5C, 0xCC, 0x5D, 0x65, 0xB6, 0x92, 0x6C, 0x70, 0x48, 0x50,
81  0xFD, 0xED, 0xB9, 0xDA, 0x5E, 0x15, 0x46, 0x57, 0xA7, 0x8D, 0x9D, 0x84,
82  0x90, 0xD8, 0xAB, 0x00, 0x8C, 0xBC, 0xD3, 0x0A, 0xF7, 0xE4, 0x58, 0x05,
83  0xB8, 0xB3, 0x45, 0x06, 0xD0, 0x2C, 0x1E, 0x8F, 0xCA, 0x3F, 0x0F, 0x02,
84  0xC1, 0xAF, 0xBD, 0x03, 0x01, 0x13, 0x8A, 0x6B, 0x3A, 0x91, 0x11, 0x41,
85  0x4F, 0x67, 0xDC, 0xEA, 0x97, 0xF2, 0xCF, 0xCE, 0xF0, 0xB4, 0xE6, 0x73,
86  0x96, 0xAC, 0x74, 0x22, 0xE7, 0xAD, 0x35, 0x85, 0xE2, 0xF9, 0x37, 0xE8,
87  0x1C, 0x75, 0xDF, 0x6E, 0x47, 0xF1, 0x1A, 0x71, 0x1D, 0x29, 0xC5, 0x89,
88  0x6F, 0xB7, 0x62, 0x0E, 0xAA, 0x18, 0xBE, 0x1B, 0xFC, 0x56, 0x3E, 0x4B,
89  0xC6, 0xD2, 0x79, 0x20, 0x9A, 0xDB, 0xC0, 0xFE, 0x78, 0xCD, 0x5A, 0xF4,
90  0x1F, 0xDD, 0xA8, 0x33, 0x88, 0x07, 0xC7, 0x31, 0xB1, 0x12, 0x10, 0x59,
91  0x27, 0x80, 0xEC, 0x5F, 0x60, 0x51, 0x7F, 0xA9, 0x19, 0xB5, 0x4A, 0x0D,
92  0x2D, 0xE5, 0x7A, 0x9F, 0x93, 0xC9, 0x9C, 0xEF, 0xA0, 0xE0, 0x3B, 0x4D,
93  0xAE, 0x2A, 0xF5, 0xB0, 0xC8, 0xEB, 0xBB, 0x3C, 0x83, 0x53, 0x99, 0x61,
94  0x17, 0x2B, 0x04, 0x7E, 0xBA, 0x77, 0xD6, 0x26, 0xE1, 0x69, 0x14, 0x63,
95  0x55, 0x21, 0x0C, 0x7D
96 };
97 
98 // SM4 Forward S-Box (there is no need for an inverse S-Box)
99 const uint8_t _rvk_emu_sm4_sbox[256] = {
100  0xD6, 0x90, 0xE9, 0xFE, 0xCC, 0xE1, 0x3D, 0xB7, 0x16, 0xB6, 0x14, 0xC2,
101  0x28, 0xFB, 0x2C, 0x05, 0x2B, 0x67, 0x9A, 0x76, 0x2A, 0xBE, 0x04, 0xC3,
102  0xAA, 0x44, 0x13, 0x26, 0x49, 0x86, 0x06, 0x99, 0x9C, 0x42, 0x50, 0xF4,
103  0x91, 0xEF, 0x98, 0x7A, 0x33, 0x54, 0x0B, 0x43, 0xED, 0xCF, 0xAC, 0x62,
104  0xE4, 0xB3, 0x1C, 0xA9, 0xC9, 0x08, 0xE8, 0x95, 0x80, 0xDF, 0x94, 0xFA,
105  0x75, 0x8F, 0x3F, 0xA6, 0x47, 0x07, 0xA7, 0xFC, 0xF3, 0x73, 0x17, 0xBA,
106  0x83, 0x59, 0x3C, 0x19, 0xE6, 0x85, 0x4F, 0xA8, 0x68, 0x6B, 0x81, 0xB2,
107  0x71, 0x64, 0xDA, 0x8B, 0xF8, 0xEB, 0x0F, 0x4B, 0x70, 0x56, 0x9D, 0x35,
108  0x1E, 0x24, 0x0E, 0x5E, 0x63, 0x58, 0xD1, 0xA2, 0x25, 0x22, 0x7C, 0x3B,
109  0x01, 0x21, 0x78, 0x87, 0xD4, 0x00, 0x46, 0x57, 0x9F, 0xD3, 0x27, 0x52,
110  0x4C, 0x36, 0x02, 0xE7, 0xA0, 0xC4, 0xC8, 0x9E, 0xEA, 0xBF, 0x8A, 0xD2,
111  0x40, 0xC7, 0x38, 0xB5, 0xA3, 0xF7, 0xF2, 0xCE, 0xF9, 0x61, 0x15, 0xA1,
112  0xE0, 0xAE, 0x5D, 0xA4, 0x9B, 0x34, 0x1A, 0x55, 0xAD, 0x93, 0x32, 0x30,
113  0xF5, 0x8C, 0xB1, 0xE3, 0x1D, 0xF6, 0xE2, 0x2E, 0x82, 0x66, 0xCA, 0x60,
114  0xC0, 0x29, 0x23, 0xAB, 0x0D, 0x53, 0x4E, 0x6F, 0xD5, 0xDB, 0x37, 0x45,
115  0xDE, 0xFD, 0x8E, 0x2F, 0x03, 0xFF, 0x6A, 0x72, 0x6D, 0x6C, 0x5B, 0x51,
116  0x8D, 0x1B, 0xAF, 0x92, 0xBB, 0xDD, 0xBC, 0x7F, 0x11, 0xD9, 0x5C, 0x41,
117  0x1F, 0x10, 0x5A, 0xD8, 0x0A, 0xC1, 0x31, 0x88, 0xA5, 0xCD, 0x7B, 0xBD,
118  0x2D, 0x74, 0xD0, 0x12, 0xB8, 0xE5, 0xB4, 0xB0, 0x89, 0x69, 0x97, 0x4A,
119  0x0C, 0x96, 0x77, 0x7E, 0x65, 0xB9, 0xF1, 0x09, 0xC5, 0x6E, 0xC6, 0x84,
120  0x18, 0xF0, 0x7D, 0xEC, 0x3A, 0xDC, 0x4D, 0x20, 0x79, 0xEE, 0x5F, 0x3E,
121  0xD7, 0xCB, 0x39, 0x48
122 };
123 
124 inline int32_t _rvk_emu_sll_32(int32_t rs1, int32_t rs2)
125  { return rs1 << (rs2 & 31); }
126 inline int32_t _rvk_emu_srl_32(int32_t rs1, int32_t rs2)
127  { return (uint32_t)rs1 >> (rs2 & 31); }
128 inline int64_t _rvk_emu_sll_64(int64_t rs1, int64_t rs2)
129  { return rs1 << (rs2 & 63); }
130 inline int64_t _rvk_emu_srl_64(int64_t rs1, int64_t rs2)
131  { return (uint64_t)rs1 >> (rs2 & 63); }
132 
133 // rotate (a part of the extension). no separate intrinsic for rori
134 inline int32_t _rvk_emu_rol_32(int32_t rs1, int32_t rs2)
135  { return _rvk_emu_sll_32(rs1, rs2) | _rvk_emu_srl_32(rs1, -rs2); }
136 inline int32_t _rvk_emu_ror_32(int32_t rs1, int32_t rs2)
137  { return _rvk_emu_srl_32(rs1, rs2) | _rvk_emu_sll_32(rs1, -rs2); }
138 
139 inline int64_t _rvk_emu_rol_64(int64_t rs1, int64_t rs2)
140  { return _rvk_emu_sll_64(rs1, rs2) | _rvk_emu_srl_64(rs1, -rs2); }
141 inline int64_t _rvk_emu_ror_64(int64_t rs1, int64_t rs2)
142  { return _rvk_emu_srl_64(rs1, rs2) | _rvk_emu_sll_64(rs1, -rs2); }
143 
144 // brev8, rev8
145 inline int32_t _rvk_emu_grev_32(int32_t rs1, int32_t rs2)
146 {
147  uint32_t x = rs1;
148  int shamt = rs2 & 31;
149  if (shamt & 1) x = ((x & 0x55555555) << 1) | ((x & 0xAAAAAAAA) >> 1);
150  if (shamt & 2) x = ((x & 0x33333333) << 2) | ((x & 0xCCCCCCCC) >> 2);
151  if (shamt & 4) x = ((x & 0x0F0F0F0F) << 4) | ((x & 0xF0F0F0F0) >> 4);
152  if (shamt & 8) x = ((x & 0x00FF00FF) << 8) | ((x & 0xFF00FF00) >> 8);
153  if (shamt & 16) x = ((x & 0x0000FFFF) << 16) | ((x & 0xFFFF0000) >> 16);
154  return x;
155 }
156 
157 inline int64_t _rvk_emu_grev_64(int64_t rs1, int64_t rs2)
158 {
159  uint64_t x = rs1;
160  int shamt = rs2 & 63;
161  if (shamt & 1)
162  x = ((x & 0x5555555555555555LL) << 1) |
163  ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
164  if (shamt & 2)
165  x = ((x & 0x3333333333333333LL) << 2) |
166  ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
167  if (shamt & 4)
168  x = ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) |
169  ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
170  if (shamt & 8)
171  x = ((x & 0x00FF00FF00FF00FFLL) << 8) |
172  ((x & 0xFF00FF00FF00FF00LL) >> 8);
173  if (shamt & 16)
174  x = ((x & 0x0000FFFF0000FFFFLL) << 16) |
175  ((x & 0xFFFF0000FFFF0000LL) >> 16);
176  if (shamt & 32)
177  x = ((x & 0x00000000FFFFFFFFLL) << 32) |
178  ((x & 0xFFFFFFFF00000000LL) >> 32);
179  return x;
180 }
181 
182 inline int32_t _rvk_emu_brev8_32(int32_t rs1)
183  { return _rvk_emu_grev_32(rs1, 7); }
184 
185 inline int64_t _rvk_emu_brev8_64(int64_t rs1)
186  { return _rvk_emu_grev_64(rs1, 7); }
187 
188 inline uint32_t _rvk_emu_shuffle32_stage(uint32_t src,
189  uint32_t maskL, uint32_t maskR, int N)
190 {
191  uint32_t x = src & ~(maskL | maskR);
192  x |= ((src << N) & maskL) | ((src >> N) & maskR);
193  return x;
194 }
195 
196 inline int32_t _rvk_emu_shfl_32(int32_t rs1, int32_t rs2)
197 {
198  uint32_t x = rs1;
199  int shamt = rs2 & 15;
200 
201  if (shamt & 8) x = _rvk_emu_shuffle32_stage(x, 0x00ff0000, 0x0000ff00, 8);
202  if (shamt & 4) x = _rvk_emu_shuffle32_stage(x, 0x0f000f00, 0x00f000f0, 4);
203  if (shamt & 2) x = _rvk_emu_shuffle32_stage(x, 0x30303030, 0x0c0c0c0c, 2);
204  if (shamt & 1) x = _rvk_emu_shuffle32_stage(x, 0x44444444, 0x22222222, 1);
205 
206  return x;
207 }
208 
209 inline int32_t _rvk_emu_unshfl_32(int32_t rs1, int32_t rs2)
210 {
211  uint32_t x = rs1;
212  int shamt = rs2 & 15;
213 
214  if (shamt & 1) x = _rvk_emu_shuffle32_stage(x, 0x44444444, 0x22222222, 1);
215  if (shamt & 2) x = _rvk_emu_shuffle32_stage(x, 0x30303030, 0x0c0c0c0c, 2);
216  if (shamt & 4) x = _rvk_emu_shuffle32_stage(x, 0x0f000f00, 0x00f000f0, 4);
217  if (shamt & 8) x = _rvk_emu_shuffle32_stage(x, 0x00ff0000, 0x0000ff00, 8);
218 
219  return x;
220 }
221 
222 inline int32_t _rvk_emu_zip_32(int32_t rs1)
223  { return _rvk_emu_shfl_32(rs1, 15); }
224 
225 inline int32_t _rvk_emu_unzip_32(int32_t rs1)
226  { return _rvk_emu_unshfl_32(rs1, 15); }
227 
228 // Zbkc: Carry-less multiply instructions
229 inline int32_t _rvk_emu_clmul_32(int32_t rs1, int32_t rs2)
230 {
231  uint32_t a = rs1, b = rs2, x = 0;
232  for (int i = 0; i < 32; i++) {
233  if ((b >> i) & 1)
234  x ^= a << i;
235  }
236  return x;
237 }
238 
239 inline int32_t _rvk_emu_clmulh_32(int32_t rs1, int32_t rs2)
240 {
241  uint32_t a = rs1, b = rs2, x = 0;
242  for (int i = 1; i < 32; i++) {
243  if ((b >> i) & 1)
244  x ^= a >> (32-i);
245  }
246  return x;
247 }
248 
249 inline int64_t _rvk_emu_clmul_64(int64_t rs1, int64_t rs2)
250 {
251  uint64_t a = rs1, b = rs2, x = 0;
252 
253  for (int i = 0; i < 64; i++) {
254  if ((b >> i) & 1)
255  x ^= a << i;
256  }
257  return x;
258 }
259 
260 inline int64_t _rvk_emu_clmulh_64(int64_t rs1, int64_t rs2)
261 {
262  uint64_t a = rs1, b = rs2, x = 0;
263 
264  for (int i = 1; i < 64; i++) {
265  if ((b >> i) & 1)
266  x ^= a >> (64-i);
267  }
268  return x;
269 }
270 
271 // Zbkx: Crossbar permutation instructions
272 inline uint32_t _rvk_emu_xperm32(uint32_t rs1, uint32_t rs2, int sz_log2)
273 {
274  uint32_t r = 0;
275  uint32_t sz = 1LL << sz_log2;
276  uint32_t mask = (1LL << sz) - 1;
277  for (int i = 0; i < 32; i += sz) {
278  uint32_t pos = ((rs2 >> i) & mask) << sz_log2;
279  if (pos < 32)
280  r |= ((rs1 >> pos) & mask) << i;
281  }
282  return r;
283 }
284 
285 inline int32_t _rvk_emu_xperm4_32(int32_t rs1, int32_t rs2)
286  { return _rvk_emu_xperm32(rs1, rs2, 2); }
287 
288 inline int32_t _rvk_emu_xperm8_32(int32_t rs1, int32_t rs2)
289  { return _rvk_emu_xperm32(rs1, rs2, 3); }
290 
291 inline uint64_t _rvk_emu_xperm64(uint64_t rs1, uint64_t rs2, int sz_log2)
292 {
293  uint64_t r = 0;
294  uint64_t sz = 1LL << sz_log2;
295  uint64_t mask = (1LL << sz) - 1;
296  for (int i = 0; i < 64; i += sz) {
297  uint64_t pos = ((rs2 >> i) & mask) << sz_log2;
298  if (pos < 64)
299  r |= ((rs1 >> pos) & mask) << i;
300  }
301  return r;
302 }
303 
304 inline int64_t _rvk_emu_xperm4_64(int64_t rs1, int64_t rs2)
305  { return _rvk_emu_xperm64(rs1, rs2, 2); }
306 
307 inline int64_t _rvk_emu_xperm8_64(int64_t rs1, int64_t rs2)
308  { return _rvk_emu_xperm64(rs1, rs2, 3); }
309 
310 // rvk_emu internal: multiply by 0x02 in AES's GF(256) - LFSR style.
311 inline uint8_t _rvk_emu_aes_xtime(uint8_t x)
312 {
313  return (x << 1) ^ ((x & 0x80) ? 0x11B : 0x00);
314 }
315 
316 // rvk_emu internal: AES forward MixColumns 8->32 bits
317 inline uint32_t _rvk_emu_aes_fwd_mc_8(uint32_t x)
318 {
319  uint32_t x2;
320  x2 = _rvk_emu_aes_xtime(x);
321  x = ((x ^ x2) << 24) | (x << 16) |(x << 8) | x2;
322  return x;
323 }
324 
325 // rvk_emu internal: AES forward MixColumns 32->32 bits
326 inline uint32_t _rvk_emu_aes_fwd_mc_32(uint32_t x)
327 {
328  return _rvk_emu_aes_fwd_mc_8(x & 0xFF) ^
329  _rvk_emu_rol_32(_rvk_emu_aes_fwd_mc_8((x >> 8) & 0xFF), 8) ^
330  _rvk_emu_rol_32(_rvk_emu_aes_fwd_mc_8((x >> 16) & 0xFF), 16) ^
331  _rvk_emu_rol_32(_rvk_emu_aes_fwd_mc_8((x >> 24) & 0xFF), 24);
332 }
333 
334 // rvk_emu internal: AES inverse MixColumns 8->32 bits
335 inline uint32_t _rvk_emu_aes_inv_mc_8(uint32_t x)
336 {
337  uint32_t x2, x4, x8;
338 
339  x2 = _rvk_emu_aes_xtime(x);
340  x4 = _rvk_emu_aes_xtime(x2);
341  x8 = _rvk_emu_aes_xtime(x4);
342 
343  x = ((x ^ x2 ^ x8) << 24) |
344  ((x ^ x4 ^ x8) << 16) |
345  ((x ^ x8) << 8) |
346  (x2 ^ x4 ^ x8);
347 
348  return x;
349 }
350 
351 // rvk_emu internal: AES inverse MixColumns 32->32 bits
352 inline uint32_t _rvk_emu_aes_inv_mc_32(uint32_t x)
353 {
354  return _rvk_emu_aes_inv_mc_8(x & 0xFF) ^
355  _rvk_emu_rol_32(_rvk_emu_aes_inv_mc_8((x >> 8) & 0xFF), 8) ^
356  _rvk_emu_rol_32(_rvk_emu_aes_inv_mc_8((x >> 16) & 0xFF), 16) ^
357  _rvk_emu_rol_32(_rvk_emu_aes_inv_mc_8((x >> 24) & 0xFF), 24);
358 }
359 
360 // Zknd: NIST Suite: AES Decryption
361 inline int32_t _rvk_emu_aes32dsi(int32_t rs1, int32_t rs2, uint8_t bs)
362 {
363  int32_t x;
364 
365  bs = (bs & 3) << 3;
366  x = (rs2 >> bs) & 0xFF;
368 
369  return rs1 ^ _rvk_emu_rol_32(x, bs);
370 }
371 
372 inline int32_t _rvk_emu_aes32dsmi(int32_t rs1, int32_t rs2, uint8_t bs)
373 {
374  int32_t x;
375 
376  bs = (bs & 3) << 3;
377  x = (rs2 >> bs) & 0xFF;
380 
381  return rs1 ^ _rvk_emu_rol_32(x, bs);
382 }
383 
384 inline int64_t _rvk_emu_aes64ds(int64_t rs1, int64_t rs2)
385 {
386  return ((int64_t) _rvk_emu_aes_inv_sbox[rs1 & 0xFF]) |
387  (((int64_t) _rvk_emu_aes_inv_sbox[(rs2 >> 40) & 0xFF]) << 8) |
388  (((int64_t) _rvk_emu_aes_inv_sbox[(rs2 >> 16) & 0xFF]) << 16) |
389  (((int64_t) _rvk_emu_aes_inv_sbox[(rs1 >> 56) & 0xFF]) << 24) |
390  (((int64_t) _rvk_emu_aes_inv_sbox[(rs1 >> 32) & 0xFF]) << 32) |
391  (((int64_t) _rvk_emu_aes_inv_sbox[(rs1 >> 8) & 0xFF]) << 40) |
392  (((int64_t) _rvk_emu_aes_inv_sbox[(rs2 >> 48) & 0xFF]) << 48) |
393  (((int64_t) _rvk_emu_aes_inv_sbox[(rs2 >> 24) & 0xFF]) << 56);
394 }
395 
396 inline int64_t _rvk_emu_aes64im(int64_t rs1)
397 {
398  return ((int64_t) _rvk_emu_aes_inv_mc_32(rs1)) |
399  (((int64_t) _rvk_emu_aes_inv_mc_32(rs1 >> 32)) << 32);
400 }
401 
402 inline int64_t _rvk_emu_aes64dsm(int64_t rs1, int64_t rs2)
403 {
404  int64_t x;
405 
406  x = _rvk_emu_aes64ds(rs1, rs2);
407  x = _rvk_emu_aes64im(x);
408  return x;
409 }
410 
411 inline int64_t _rvk_emu_aes64ks1i(int64_t rs1, int rnum)
412 {
413  const uint8_t aes_rcon[] = {
414  0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1B, 0x36
415  };
416 
417  uint32_t t, rc;
418 
419  t = rs1 >> 32;
420  rc = 0;
421 
422  if (rnum < 10) {
423  t = _rvk_emu_ror_32(t, 8);
424  rc = aes_rcon[rnum];
425  }
426 
427  t = ((uint32_t) _rvk_emu_aes_fwd_sbox[t & 0xFF]) |
428  (((uint32_t) _rvk_emu_aes_fwd_sbox[(t >> 8) & 0xFF]) << 8) |
429  (((uint32_t) _rvk_emu_aes_fwd_sbox[(t >> 16) & 0xFF]) << 16) |
430  (((uint32_t) _rvk_emu_aes_fwd_sbox[(t >> 24) & 0xFF]) << 24);
431 
432  t ^= rc;
433 
434  return ((int64_t) t) | (((int64_t) t) << 32);
435 }
436 
437 inline int64_t _rvk_emu_aes64ks2(int64_t rs1, int64_t rs2)
438 {
439  uint32_t t;
440 
441  t = (rs1 >> 32) ^ (rs2 & 0xFFFFFFFF);
442 
443  return ((int64_t) t) ^
444  (((int64_t) t) << 32) ^ (rs2 & 0xFFFFFFFF00000000ULL);
445 }
446 
447 inline int32_t _rvk_emu_aes32esi(int32_t rs1, int32_t rs2, uint8_t bs)
448 {
449  int32_t x;
450 
451  bs = (bs & 3) << 3;
452  x = (rs2 >> bs) & 0xFF;
454 
455  return rs1 ^ _rvk_emu_rol_32(x, bs);
456 }
457 
458 inline int32_t _rvk_emu_aes32esmi(int32_t rs1, int32_t rs2, uint8_t bs)
459 {
460  uint32_t x;
461 
462  bs = (bs & 3) << 3;
463  x = (rs2 >> bs) & 0xFF;
466 
467  return rs1 ^ _rvk_emu_rol_32(x, bs);
468 }
469 
470 inline int64_t _rvk_emu_aes64es(int64_t rs1, int64_t rs2)
471 {
472  return ((int64_t) _rvk_emu_aes_fwd_sbox[rs1 & 0xFF]) |
473  (((int64_t) _rvk_emu_aes_fwd_sbox[(rs1 >> 40) & 0xFF]) << 8) |
474  (((int64_t) _rvk_emu_aes_fwd_sbox[(rs2 >> 16) & 0xFF]) << 16) |
475  (((int64_t) _rvk_emu_aes_fwd_sbox[(rs2 >> 56) & 0xFF]) << 24) |
476  (((int64_t) _rvk_emu_aes_fwd_sbox[(rs1 >> 32) & 0xFF]) << 32) |
477  (((int64_t) _rvk_emu_aes_fwd_sbox[(rs2 >> 8) & 0xFF]) << 40) |
478  (((int64_t) _rvk_emu_aes_fwd_sbox[(rs2 >> 48) & 0xFF]) << 48) |
479  (((int64_t) _rvk_emu_aes_fwd_sbox[(rs1 >> 24) & 0xFF]) << 56);
480 }
481 
482 inline int64_t _rvk_emu_aes64esm(int64_t rs1, int64_t rs2)
483 {
484  int64_t x;
485 
486  x = _rvk_emu_aes64es(rs1, rs2);
487  x = ((int64_t) _rvk_emu_aes_fwd_mc_32(x)) |
488  (((int64_t) _rvk_emu_aes_fwd_mc_32(x >> 32)) << 32);
489  return x;
490 }
491 
492 inline int32_t _rvk_emu_sha256sig0(int32_t rs1)
493 {
494  int32_t x;
495 
496  x = _rvk_emu_ror_32(rs1, 7) ^ _rvk_emu_ror_32(rs1, 18) ^
497  _rvk_emu_srl_32(rs1, 3);
498  return (int32_t) x;
499 }
500 
501 inline int32_t _rvk_emu_sha256sig1(int32_t rs1)
502 {
503  int32_t x;
504 
505  x = _rvk_emu_ror_32(rs1, 17) ^ _rvk_emu_ror_32(rs1, 19) ^
506  _rvk_emu_srl_32(rs1, 10);
507  return (int32_t) x;
508 }
509 
510 inline int32_t _rvk_emu_sha256sum0(int32_t rs1)
511 {
512  int32_t x;
513 
514  x = _rvk_emu_ror_32(rs1, 2) ^ _rvk_emu_ror_32(rs1, 13) ^
515  _rvk_emu_ror_32(rs1, 22);
516  return (int32_t) x;
517 }
518 
519 inline int32_t _rvk_emu_sha256sum1(int32_t rs1)
520 {
521  int32_t x;
522 
523  x = _rvk_emu_ror_32(rs1, 6) ^ _rvk_emu_ror_32(rs1, 11) ^
524  _rvk_emu_ror_32(rs1, 25);
525  return (int32_t) x;
526 }
527 
528 inline int64_t _rvk_emu_sha512sig0(int64_t rs1)
529 {
530  return _rvk_emu_ror_64(rs1, 1) ^ _rvk_emu_ror_64(rs1, 8) ^
531  _rvk_emu_srl_64(rs1,7);
532 }
533 
534 inline int64_t _rvk_emu_sha512sig1(int64_t rs1)
535 {
536  return _rvk_emu_ror_64(rs1, 19) ^ _rvk_emu_ror_64(rs1, 61) ^
537  _rvk_emu_srl_64(rs1, 6);
538 }
539 
540 inline int64_t _rvk_emu_sha512sum0(int64_t rs1)
541 {
542  return _rvk_emu_ror_64(rs1, 28) ^ _rvk_emu_ror_64(rs1, 34) ^
543  _rvk_emu_ror_64(rs1, 39);
544 }
545 
546 inline int64_t _rvk_emu_sha512sum1(int64_t rs1)
547 {
548  return _rvk_emu_ror_64(rs1, 14) ^ _rvk_emu_ror_64(rs1, 18) ^
549  _rvk_emu_ror_64(rs1, 41);
550 }
551 
552 // Zksed: ShangMi Suite: SM4 Block Cipher Instructions
553 inline int32_t _rvk_emu_sm4ed(int32_t rs1, int32_t rs2, uint8_t bs)
554 {
555  int32_t x;
556 
557  bs = (bs & 3) << 3;
558  x = (rs2 >> bs) & 0xFF;
559  x = _rvk_emu_sm4_sbox[x];
560 
561  x = x ^ (x << 8) ^ (x << 2) ^ (x << 18) ^
562  ((x & 0x3F) << 26) ^ ((x & 0xC0) << 10);
563  x = rs1 ^ _rvk_emu_rol_32(x, bs);
564  return (int32_t) x;
565 }
566 
567 inline int32_t _rvk_emu_sm4ks(int32_t rs1, int32_t rs2, uint8_t bs)
568 {
569  int32_t x;
570 
571  bs = (bs & 3) << 3;
572  x = (rs2 >> bs) & 0xFF;
573  x = _rvk_emu_sm4_sbox[x];
574 
575  x = x ^ ((x & 0x07) << 29) ^ ((x & 0xFE) << 7) ^
576  ((x & 1) << 23) ^ ((x & 0xF8) << 13);
577  x = rs1 ^ _rvk_emu_rol_32(x, bs);
578  return (int32_t) x;
579 }
580 
581 // Zksh: ShangMi Suite: SM3 Hash Function Instructions
582 inline int32_t _rvk_emu_sm3p0(int32_t rs1)
583 {
584  int32_t x;
585 
586  x = rs1 ^ _rvk_emu_rol_32(rs1, 9) ^ _rvk_emu_rol_32(rs1, 17);
587  return (int32_t) x;
588 }
589 
590 inline int32_t _rvk_emu_sm3p1(int32_t rs1)
591 {
592  int32_t x;
593 
594  x = rs1 ^ _rvk_emu_rol_32(rs1, 15) ^ _rvk_emu_rol_32(rs1, 23);
595  return (int32_t) x;
596 }
597 
598 } // namespace RiscvISA
599 } // namespace gem5
600 
601 #endif // __ARCH_RISCV_UTILITY_HH__
Bitfield< 7 > b
Definition: misc_types.hh:388
Bitfield< 0 > rc
Definition: types.hh:87
int32_t _rvk_emu_sll_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:124
const uint8_t _rvk_emu_aes_fwd_sbox[256]
Ref: https://github.com/rvkrypto/rvkrypto-fips.
Definition: rvk.hh:47
uint64_t _rvk_emu_xperm64(uint64_t rs1, uint64_t rs2, int sz_log2)
Definition: rvk.hh:291
int64_t _rvk_emu_xperm8_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:307
int32_t _rvk_emu_sm4ed(int32_t rs1, int32_t rs2, uint8_t bs)
Definition: rvk.hh:553
int32_t _rvk_emu_sha256sum1(int32_t rs1)
Definition: rvk.hh:519
int64_t _rvk_emu_aes64es(int64_t rs1, int64_t rs2)
Definition: rvk.hh:470
int64_t _rvk_emu_aes64im(int64_t rs1)
Definition: rvk.hh:396
int32_t _rvk_emu_unshfl_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:209
int32_t _rvk_emu_sha256sig0(int32_t rs1)
Definition: rvk.hh:492
int64_t _rvk_emu_aes64ks2(int64_t rs1, int64_t rs2)
Definition: rvk.hh:437
int32_t _rvk_emu_clmul_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:229
int64_t _rvk_emu_sha512sum0(int64_t rs1)
Definition: rvk.hh:540
int64_t _rvk_emu_srl_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:130
int32_t _rvk_emu_sm3p0(int32_t rs1)
Definition: rvk.hh:582
int64_t _rvk_emu_aes64dsm(int64_t rs1, int64_t rs2)
Definition: rvk.hh:402
Bitfield< 6 > a
Definition: pagetable.hh:69
int64_t _rvk_emu_xperm4_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:304
int64_t _rvk_emu_sha512sum1(int64_t rs1)
Definition: rvk.hh:546
int32_t _rvk_emu_xperm8_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:288
int32_t _rvk_emu_sha256sig1(int32_t rs1)
Definition: rvk.hh:501
uint8_t _rvk_emu_aes_xtime(uint8_t x)
Definition: rvk.hh:311
int32_t _rvk_emu_aes32esi(int32_t rs1, int32_t rs2, uint8_t bs)
Definition: rvk.hh:447
int32_t _rvk_emu_sha256sum0(int32_t rs1)
Definition: rvk.hh:510
int32_t _rvk_emu_sm3p1(int32_t rs1)
Definition: rvk.hh:590
const uint8_t _rvk_emu_sm4_sbox[256]
Definition: rvk.hh:99
int64_t _rvk_emu_brev8_64(int64_t rs1)
Definition: rvk.hh:185
int64_t _rvk_emu_sha512sig0(int64_t rs1)
Definition: rvk.hh:528
int64_t _rvk_emu_sha512sig1(int64_t rs1)
Definition: rvk.hh:534
int32_t _rvk_emu_sm4ks(int32_t rs1, int32_t rs2, uint8_t bs)
Definition: rvk.hh:567
const uint8_t _rvk_emu_aes_inv_sbox[256]
Definition: rvk.hh:73
int32_t _rvk_emu_shfl_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:196
uint32_t _rvk_emu_xperm32(uint32_t rs1, uint32_t rs2, int sz_log2)
Definition: rvk.hh:272
Bitfield< 2 > i
int64_t _rvk_emu_clmulh_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:260
uint32_t _rvk_emu_shuffle32_stage(uint32_t src, uint32_t maskL, uint32_t maskR, int N)
Definition: rvk.hh:188
int32_t _rvk_emu_aes32dsmi(int32_t rs1, int32_t rs2, uint8_t bs)
Definition: rvk.hh:372
int32_t _rvk_emu_xperm4_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:285
int32_t _rvk_emu_srl_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:126
int32_t _rvk_emu_brev8_32(int32_t rs1)
Definition: rvk.hh:182
int64_t _rvk_emu_aes64ks1i(int64_t rs1, int rnum)
Definition: rvk.hh:411
int32_t _rvk_emu_clmulh_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:239
int64_t _rvk_emu_ror_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:141
uint32_t _rvk_emu_aes_inv_mc_8(uint32_t x)
Definition: rvk.hh:335
int32_t _rvk_emu_rol_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:134
int32_t _rvk_emu_zip_32(int32_t rs1)
Definition: rvk.hh:222
uint32_t _rvk_emu_aes_fwd_mc_32(uint32_t x)
Definition: rvk.hh:326
int64_t _rvk_emu_aes64ds(int64_t rs1, int64_t rs2)
Definition: rvk.hh:384
int64_t _rvk_emu_sll_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:128
uint32_t _rvk_emu_aes_fwd_mc_8(uint32_t x)
Definition: rvk.hh:317
int64_t _rvk_emu_grev_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:157
int32_t _rvk_emu_aes32esmi(int32_t rs1, int32_t rs2, uint8_t bs)
Definition: rvk.hh:458
Bitfield< 3 > x
Definition: pagetable.hh:73
int32_t _rvk_emu_ror_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:136
uint32_t _rvk_emu_aes_inv_mc_32(uint32_t x)
Definition: rvk.hh:352
int64_t _rvk_emu_clmul_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:249
int32_t _rvk_emu_unzip_32(int32_t rs1)
Definition: rvk.hh:225
int32_t _rvk_emu_grev_32(int32_t rs1, int32_t rs2)
Definition: rvk.hh:145
int32_t _rvk_emu_aes32dsi(int32_t rs1, int32_t rs2, uint8_t bs)
Definition: rvk.hh:361
int64_t _rvk_emu_aes64esm(int64_t rs1, int64_t rs2)
Definition: rvk.hh:482
int64_t _rvk_emu_rol_64(int64_t rs1, int64_t rs2)
Definition: rvk.hh:139
Bitfield< 1 > r
Definition: pagetable.hh:75
Bitfield< 51 > t
Definition: pagetable.hh:56
Bitfield< 14 > bs
Definition: misc.hh:658
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....

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