simpoint.hh

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/*
 * Copyright (c) 2012-2014 ARM Limited
 * All rights reserved.
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
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 * modified or unmodified, in source code or in binary form.
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 * met: redistributions of source code must retain the above copyright
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#ifndef __CPU_SIMPLE_PROBES_SIMPOINT_HH__
#define __CPU_SIMPLE_PROBES_SIMPOINT_HH__
 
#include <unordered_map>
 
#include "base/output.hh"
#include "cpu/simple_thread.hh"
#include "params/SimPoint.hh"
#include "sim/probe/probe.hh"
 
namespace gem5
{
 
typedef std::pair<Addr, Addr> BasicBlockRange;
 
} // namespace gem5
 
namespace std
{
template <>
struct hash<gem5::BasicBlockRange>
{
  public:
    size_t operator()(const gem5::BasicBlockRange &bb) const
    {
        return hash<gem5::Addr>()(bb.first + bb.second);
    }
};
} // namespace std
 
namespace gem5
{
 
class SimPoint : public ProbeListenerObject
{
  public:
    SimPoint(const SimPointParams &params);
    virtual ~SimPoint();
 
    virtual void init();
 
    virtual void regProbeListeners();
 
    void profile(const std::pair<SimpleThread*, StaticInstPtr>&);
 
  private:
    const uint64_t intervalSize;
 
    uint64_t intervalCount;
    uint64_t intervalDrift;
    OutputStream *simpointStream;
 
    struct BBInfo
    {
        uint64_t id;
        uint64_t insts;
        uint64_t count;
    };
 
    std::unordered_map<BasicBlockRange, BBInfo> bbMap;
    BasicBlockRange currentBBV;
    uint64_t currentBBVInstCount;
};
 
} // namespace gem5
 
#endif // __CPU_SIMPLE_PROBES_SIMPOINT_HH__