gem5 v24.0.0.0
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#include <gpu_registers.hh>
Public Member Functions | |
StatusReg () | |
Public Attributes | |
uint32_t | SCC: 1 |
uint32_t | SPI_PRIO: 2 |
uint32_t | USER_PRIO: 2 |
uint32_t | PRIV: 1 |
uint32_t | TRAP_EN: 1 |
uint32_t | TTRACE_EN: 1 |
uint32_t | EXPORT_RDY: 1 |
uint32_t | EXECZ: 1 |
uint32_t | VCCZ: 1 |
uint32_t | IN_TG: 1 |
uint32_t | IN_BARRIER: 1 |
uint32_t | HALT: 1 |
uint32_t | TRAP: 1 |
uint32_t | TTRACE_CU_EN: 1 |
uint32_t | VALID: 1 |
uint32_t | ECC_ERR: 1 |
uint32_t | SKIP_EXPORT: 1 |
uint32_t | PERF_EN: 1 |
uint32_t | COND_DBG_USER: 1 |
uint32_t | COND_DBG_SYS: 1 |
uint32_t | ALLOW_REPLAY: 1 |
uint32_t | INSTRUCTION_ATC: 1 |
uint32_t | RESERVED: 3 |
uint32_t | MUST_EXPORT: 1 |
uint32_t | RESERVED_1: 4 |
Definition at line 183 of file gpu_registers.hh.
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inline |
Definition at line 185 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::ALLOW_REPLAY |
Definition at line 214 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::COND_DBG_SYS |
Definition at line 213 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::COND_DBG_USER |
Definition at line 212 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::ECC_ERR |
Definition at line 209 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::EXECZ |
Definition at line 201 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::EXPORT_RDY |
Definition at line 200 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::HALT |
Definition at line 205 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::IN_BARRIER |
Definition at line 204 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::IN_TG |
Definition at line 203 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::INSTRUCTION_ATC |
Definition at line 215 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::MUST_EXPORT |
Definition at line 217 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::PERF_EN |
Definition at line 211 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::PRIV |
Definition at line 197 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::RESERVED |
Definition at line 216 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::RESERVED_1 |
Definition at line 218 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::SCC |
Definition at line 194 of file gpu_registers.hh.
Referenced by gem5::VegaISA::GPUISA::readMiscReg(), and gem5::VegaISA::GPUISA::writeMiscReg().
uint32_t gem5::VegaISA::StatusReg::SKIP_EXPORT |
Definition at line 210 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::SPI_PRIO |
Definition at line 195 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::TRAP |
Definition at line 206 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::TRAP_EN |
Definition at line 198 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::TTRACE_CU_EN |
Definition at line 207 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::TTRACE_EN |
Definition at line 199 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::USER_PRIO |
Definition at line 196 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::VALID |
Definition at line 208 of file gpu_registers.hh.
uint32_t gem5::VegaISA::StatusReg::VCCZ |
Definition at line 202 of file gpu_registers.hh.