38 #ifndef __DEV_ARM_GENERIC_TIMER_HH__ 39 #define __DEV_ARM_GENERIC_TIMER_HH__ 58 class SystemCounterParams;
59 class GenericTimerParams;
60 class GenericTimerFrameParams;
61 class GenericTimerMemParams;
70 virtual void notify(
void) = 0;
100 static constexpr
size_t MAX_FREQ_ENTRIES = 1004;
112 uint32_t
freq()
const {
return _freq; }
132 void freqUpdateSchedule(
size_t new_freq_entry);
135 void setValue(uint64_t new_value);
141 Tick whenValue(uint64_t target_val);
142 Tick whenValue(uint64_t cur_val, uint64_t target_val)
const;
155 void freqUpdateCallback();
158 void updateValue(
void);
161 void updateTick(
void);
164 void notifyListeners(
void)
const;
179 const std::string _name;
199 void updateCounter();
202 void counterLimitReached();
214 std::string
name()
const {
return _name; }
219 void setCompareValue(uint64_t
val);
222 uint32_t
timerValue()
const {
return _counterLimit - value(); }
224 void setTimerValue(uint32_t val);
228 void setControl(uint32_t val);
230 uint64_t
offset()
const {
return _offset; }
231 void setOffset(uint64_t val);
234 uint64_t value()
const;
236 return _systemCounter.
whenValue(value(), target_val);
239 void notify(
void)
override;
247 void drainResume()
override;
265 :
ArchTimer(name, parent, sysctr, interrupt), system(system) {}
279 const GenericTimerParams * params()
const;
287 void setMiscReg(
int misc_reg,
unsigned cpu,
RegVal val);
288 RegVal readMiscReg(
int misc_reg,
unsigned cpu);
335 uint64_t bit_val =
bits(val, transitionBit);
336 uint64_t ret_val =
mbits(val, 63, transitionBit);
337 uint64_t incr_val = 1 << transitionBit;
338 if (bit_val == transitionTo)
340 return ret_val + incr_val;
346 void physEventStreamCallback();
347 void virtEventStreamCallback();
348 void eventStreamCallback()
const;
351 void notify(
void)
override;
362 void createTimers(
unsigned cpus);
382 : parent(_parent), cpu(_cpu) {}
384 void setMiscReg(
int misc_reg,
RegVal val)
override;
385 RegVal readMiscReg(
int misc_reg)
override;
401 bool hasVirtualTimer()
const;
405 uint64_t getVirtOffset()
const;
409 void setVirtOffset(uint64_t new_offset);
412 bool hasEl0View()
const;
415 uint8_t getAccessBits()
const;
418 void setAccessBits(uint8_t
data);
421 bool hasNonSecureAccess()
const;
425 void setNonSecureAccess();
428 bool hasReadableVoff()
const;
437 uint64_t timerRead(
Addr addr,
size_t size,
bool is_sec,
bool to_el0)
const;
438 void timerWrite(
Addr addr,
size_t size, uint64_t data,
bool is_sec,
443 static const Addr TIMER_CNTPCT_LO = 0x00;
444 static const Addr TIMER_CNTPCT_HI = 0x04;
445 static const Addr TIMER_CNTVCT_LO = 0x08;
446 static const Addr TIMER_CNTVCT_HI = 0x0c;
447 static const Addr TIMER_CNTFRQ = 0x10;
448 static const Addr TIMER_CNTEL0ACR = 0x14;
449 static const Addr TIMER_CNTVOFF_LO = 0x18;
450 static const Addr TIMER_CNTVOFF_HI = 0x1c;
451 static const Addr TIMER_CNTP_CVAL_LO = 0x20;
452 static const Addr TIMER_CNTP_CVAL_HI = 0x24;
453 static const Addr TIMER_CNTP_TVAL = 0x28;
454 static const Addr TIMER_CNTP_CTL = 0x2c;
455 static const Addr TIMER_CNTV_CVAL_LO = 0x30;
456 static const Addr TIMER_CNTV_CVAL_HI = 0x34;
457 static const Addr TIMER_CNTV_TVAL = 0x38;
458 static const Addr TIMER_CNTV_CTL = 0x3c;
479 AccessBits accessBits;
488 AccessBitsEl0 accessBitsEl0;
503 static void validateFrameRange(
const AddrRange &range);
508 static bool validateAccessPerm(
ArmSystem &sys,
bool is_sec);
517 uint64_t counterCtrlRead(
Addr addr,
size_t size,
bool is_sec)
const;
518 void counterCtrlWrite(
Addr addr,
size_t size, uint64_t
data,
bool is_sec);
522 Bitfield<17,8> fcreq;
529 Bitfield<31,8> fcack;
532 static const
Addr COUNTER_CTRL_CNTCR = 0x00;
533 static const
Addr COUNTER_CTRL_CNTSR = 0x04;
534 static const
Addr COUNTER_CTRL_CNTCV_LO = 0x08;
535 static const
Addr COUNTER_CTRL_CNTCV_HI = 0x0c;
536 static const
Addr COUNTER_CTRL_CNTSCR = 0x10;
537 static const
Addr COUNTER_CTRL_CNTID = 0x1c;
538 static const
Addr COUNTER_CTRL_CNTFID = 0x20;
541 uint64_t counterStatusRead(
Addr addr,
size_t size) const;
542 void counterStatusWrite(
Addr addr,
size_t size, uint64_t data);
545 static const
Addr COUNTER_STATUS_CNTCV_LO = 0x00;
546 static const
Addr COUNTER_STATUS_CNTCV_HI = 0x04;
549 uint64_t timerCtrlRead(
Addr addr,
size_t size,
bool is_sec) const;
550 void timerCtrlWrite(
Addr addr,
size_t size, uint64_t data,
bool is_sec);
556 static const
Addr TIMER_CTRL_CNTFRQ = 0x00;
557 static const
Addr TIMER_CTRL_CNTNSAR = 0x04;
558 static const
Addr TIMER_CTRL_CNTTIDR = 0x08;
559 static const
Addr TIMER_CTRL_CNTACR = 0x40;
560 static const
Addr TIMER_CTRL_CNTVOFF_LO = 0x80;
561 static const
Addr TIMER_CTRL_CNTVOFF_HI = 0x84;
570 static constexpr
size_t MAX_TIMER_FRAMES = 8;
578 #endif // __DEV_ARM_GENERIC_TIMER_HH__ const AddrRange counterCtrlRange
EventFunctionWrapper _counterLimitReachedEvent
EventFunctionWrapper event
uint64_t _counterLimit
Programmed limit value for the upcounter ({CNTP/CNTHP/CNTV}_CVAL).
std::vector< uint32_t > _freqTable
Frequency modes table with all possible frequencies for the counter.
std::vector< SystemCounterListener * > _listeners
Listeners to changes in counting speed.
ArmInterruptPin const * irqPhysNS
ArmInterruptPin const * irqVirt
Tick _updateTick
Counter cycle start Tick when the counter status affecting its value has been updated.
const std::string & name()
EndBitUnion(UserDescFlags) struct UserDesc32
ArmInterruptPin const * irqPhysS
SystemCounter & systemCounter
System counter reference.
CNTKCTL cntkctl
Kernel control register.
Per-CPU architected timer.
ThreadContext * threadContext
Thread (HW) context associated to this PE implementation.
Base class for devices that use the MiscReg interfaces.
uint32_t cntfrq
System counter frequency as visible from this core.
const AddrRange timerRange
uint32_t freq() const
Returns the counter frequency.
Overload hash function for BasicBlockRange type.
SystemCounter & systemCounter
System counter reference.
ThreadContext is the external interface to all thread state for anything outside of the CPU...
ArmSystem & system
ARM system containing this timer.
DrainState
Object drain/handover states.
ArchTimerCtrl _control
Value of the control register ({CNTP/CNTHP/CNTV}_CTL).
bool enabled() const
Indicates if the counter is enabled.
Tick _period
Cached copy of the counter period (inverse of the frequency).
Interface for objects that might require draining before checkpointing.
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
virtual void serialize(CheckpointOut &cp) const =0
Serialize an object.
bool scheduleEvents() override
EventFunctionWrapper _freqUpdateEvent
Frequency update event handling.
uint64_t eventTargetValue(uint64_t val) const
uint64_t Tick
Tick count type.
AddrRangeList addrRanges
All MMIO ranges GenericTimerFrame responds to.
size_t activeFreqEntry() const
Returns the currently active frequency table entry.
uint32_t timerValue() const
Returns the TimerValue view of the timer.
This device is the base class which all devices senstive to an address range inherit from...
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
bool nonSecureAccess
Reports whether non-secure accesses are allowed to this frame.
virtual bool scheduleEvents()
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Basic support for object serialization.
Tick whenValue(uint64_t target_val)
Abstract class for elements whose events depend on the counting speed of the System Counter...
virtual void unserialize(CheckpointIn &cp)=0
Unserialize an object.
bool validKvmEnvironment() const
Verify gem5 configuration will support KVM emulation.
std::string name() const
Returns the timer name.
Base class for ARM GIC implementations.
std::ostream CheckpointOut
Tick whenValue(uint64_t target_val)
Returns the tick at which a certain counter value is reached.
uint64_t compareValue() const
Returns the CompareValue view of the timer.
ArmInterruptPin *const _interrupt
GenericTimerISA(GenericTimer &_parent, unsigned _cpu)
uint64_t _value
Counter value (as specified in CNTCV).
std::vector< std::unique_ptr< CoreTimers > > timers
Per-CPU physical architected timers.
ArmInterruptPin const * irqHyp
uint64_t increment() const
Returns the value increment.
bool _enabled
Indicates if the counter is enabled.
BitUnion32(UserDescFlags) Bitfield< 0 > seg_32bit
SystemCounter & _systemCounter
ArchTimerKvm(const std::string &name, ArmSystem &system, SimObject &parent, SystemCounter &sysctr, ArmInterruptPin *interrupt)
T mbits(T val, int first, int last)
Mask off the given bits in place like bits() but without shifting.
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it...
uint32_t control() const
Sets the control register.
size_t _activeFreqEntry
Currently selected entry in the table, its contents should match _freq.
virtual void notify(void)=0
Called from the SystemCounter when a change in counting speed occurred Events should be rescheduled p...
std::vector< uint32_t > & freqTable()
Returns a reference to the frequency modes table.
CNTHCTL cnthctl
Hypervisor control register.
GenericTimer & parent
Generic Timer parent reference.
Generic representation of an Arm interrupt pin.
Tick period() const
Returns the counter period.
Abstract superclass for simulation objects.
uint32_t _freq
Counter frequency (as specified by CNTFRQ).
ArchTimer physTimer
Physical and virtual timers.
uint64_t _increment
Value increment in each counter cycle.
uint64_t _offset
Offset relative to the physical timer (CNTVOFF)
EndBitUnion(ArchTimerCtrl) const std SimObject & _parent
Name of this timer.