gem5  v20.0.0.3
BaseO3CPU Member List

This is the complete list of members for BaseO3CPU, including all inherited members.

_cacheLineSizeBaseCPUprotected
_cpuIdBaseCPUprotected
_dataMasterIdBaseCPUprotected
_instMasterIdBaseCPUprotected
_paramsSimObjectprotected
_pidBaseCPUprotected
_socketIdBaseCPUprotected
_switchedOutBaseCPUprotected
_taskIdBaseCPUprotected
activateContext(ThreadID thread_num)BaseCPUvirtual
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
armMonitor(ThreadID tid, Addr address)BaseCPU
BaseCPU(Params *params, bool is_checker=false)BaseCPU
BaseO3CPU(BaseCPUParams *params)BaseO3CPU
cacheLineSize() constBaseCPUinline
checkInterrupts(ThreadContext *tc) constBaseCPUinline
clearInterrupt(ThreadID tid, int int_num, int index)BaseCPUinline
clearInterrupts(ThreadID tid)BaseCPUinline
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
contextToThread(ContextID cid)BaseCPUinline
CPU_STATE_ON enum valueBaseCPUprotected
CPU_STATE_SLEEP enum valueBaseCPUprotected
CPU_STATE_WAKEUP enum valueBaseCPUprotected
cpuId() constBaseCPUinline
CPUState enum nameBaseCPUprotected
curCycle() constClockedinline
currentSection()Serializablestatic
cyclesToTicks(Cycles c) constClockedinline
dataMasterId() constBaseCPUinline
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
deschedulePowerGatingEvent()BaseCPU
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
enterPwrGating()BaseCPUprotected
enterPwrGatingEventBaseCPUprotected
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
find(const char *name)SimObjectstatic
findContext(ThreadContext *tc)BaseCPU
flushTLBs()BaseCPU
frequency() constClockedinline
getContext(int tn)BaseCPUinlinevirtual
getCpuAddrMonitor(ThreadID tid)BaseCPUinline
getCurrentInstCount(ThreadID tid)BaseCPU
getDataPort()=0BaseCPUpure virtual
getInstPort()=0BaseCPUpure virtual
getInterruptController(ThreadID tid)BaseCPUinline
getPid() constBaseCPUinline
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideBaseCPUvirtual
getProbeManager()SimObject
getSendFunctional()BaseCPUinlinevirtual
getStatGroups() constStats::Group
getStats() constStats::Group
getTracer()BaseCPUinline
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
haltContext(ThreadID thread_num)BaseCPUvirtual
init() overrideBaseCPUvirtual
initState()SimObjectvirtual
instCntBaseCPUprotected
instCount()BaseCPUinline
instMasterId() constBaseCPUinline
interruptsBaseCPUprotected
invldPidBaseCPUstatic
loadState(CheckpointIn &cp)SimObjectvirtual
memInvalidate()SimObjectinlinevirtual
memWriteback()SimObjectinlinevirtual
microcodeRomBaseCPU
mwait(ThreadID tid, PacketPtr pkt)BaseCPU
mwaitAtomic(ThreadID tid, ThreadContext *tc, BaseTLB *dtb)BaseCPU
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
notifyFork()Drainableinlinevirtual
numContexts()BaseCPUinline
numCyclesBaseCPU
numSimulatedCPUs()BaseCPUinlinestatic
numSimulatedInsts()BaseCPUinlinestatic
numSimulatedInsts()BaseCPUinlinestatic
numSimulatedOps()BaseCPUinlinestatic
numSimulatedOps()BaseCPUinlinestatic
numThreadsBaseCPU
numWorkItemsCompletedBaseCPU
numWorkItemsStartedBaseCPU
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
Params typedefBaseCPU
params() constBaseCPUinline
PCMaskBaseCPUstatic
pmuProbePoint(const char *name)BaseCPUprotected
postInterrupt(ThreadID tid, int int_num, int index)BaseCPUinline
powerGatingOnIdleBaseCPUprotected
powerStateClockedObject
ppActiveCyclesBaseCPUprotected
ppAllCyclesBaseCPUprotected
ppRetiredBranchesBaseCPUprotected
ppRetiredInstsBaseCPUprotected
ppRetiredInstsPCBaseCPUprotected
ppRetiredLoadsBaseCPUprotected
ppRetiredStoresBaseCPUprotected
ppSleepingBaseCPUprotected
preDumpStats()Stats::Groupvirtual
previousCycleBaseCPUprotected
previousStateBaseCPUprotected
probeInstCommit(const StaticInstPtr &inst, Addr pc)BaseCPUvirtual
processProfileEvent()BaseCPU
profileEventBaseCPU
pwrGatingLatencyBaseCPUprotected
registerThreadContexts()BaseCPU
regProbeListeners()SimObjectvirtual
regProbePoints() overrideBaseCPUvirtual
regStats()BaseO3CPUvirtual
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() constClockedinlineprotected
resetStats()Stats::Groupvirtual
resolveStat(std::string name) constStats::Group
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
scheduleInstStop(ThreadID tid, Counter insts, const char *cause)BaseCPU
schedulePowerGatingEvent()BaseCPU
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideBaseCPUvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
serializeThread(CheckpointOut &cp, ThreadID tid) constBaseCPUinlinevirtual
setCurTick(Tick newVal)EventManagerinline
setPid(uint32_t pid)BaseCPUinline
signalDrainDone() constDrainableinlineprotected
SimObject(const Params *_params)SimObject
socketId() constBaseCPUinline
startup() overrideBaseCPUvirtual
suspendContext(ThreadID thread_num)BaseCPUvirtual
switchedOut() constBaseCPUinline
switchOut()BaseCPUvirtual
syscallRetryLatencyBaseCPU
systemBaseCPU
takeOverFrom(BaseCPU *cpu)BaseCPUvirtual
taskId() constBaseCPUinline
taskId(uint32_t id)BaseCPUinline
threadContextsBaseCPUprotected
ticksToCycles(Tick t) constClockedinline
totalInsts() const =0BaseCPUpure virtual
totalOps() const =0BaseCPUpure virtual
traceFunctions(Addr pc)BaseCPUinline
tracerBaseCPUprotected
unserialize(CheckpointIn &cp) overrideBaseCPUvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
unserializeThread(CheckpointIn &cp, ThreadID tid)BaseCPUinlinevirtual
updateClockPeriod()Clockedinline
updateCycleCounters(CPUState state)BaseCPUinlineprotected
verifyMemoryMode() constBaseCPUinlinevirtual
voltage() constClockedinline
waitForRemoteGDB() constBaseCPU
wakeup(ThreadID tid)BaseCPUinlinestatic
wakeup(ThreadID tid)=0BaseCPUpure virtual
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
workItemBegin()BaseCPUinline
workItemEnd()BaseCPUinline
~BaseCPU()BaseCPUvirtual
~Clocked()Clockedinlineprotectedvirtual
~Drainable()Drainableprotectedvirtual
~Group()Stats::Groupvirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual

Generated on Fri Jul 3 2020 15:53:11 for gem5 by doxygen 1.8.13