gem5  v20.0.0.3
DMASequencer Member List

This is the complete list of members for DMASequencer, including all inherited members.

_paramsSimObjectprotected
ackCallback(const Addr &addr)DMASequencer
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
busy()DMASequencerinline
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
curCycle() constClockedinline
currentSection()Serializablestatic
cyclesToTicks(Cycles c) constClockedinline
dataCallback(const DataBlock &dblk, const Addr &addr)DMASequencer
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
descheduleDeadlockEvent() overrideDMASequencerinlinevirtual
DMASequencer(const Params *)DMASequencer
drain() overrideRubyPortvirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
find(const char *name)SimObjectstatic
frequency() constClockedinline
functionalWrite(Packet *func_pkt)RubyPortvirtual
getId()RubyPortinline
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideRubyPortvirtual
getProbeManager()SimObject
getStatGroups() constStats::Group
getStats() constStats::Group
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
init() overrideDMASequencervirtual
initState()SimObjectvirtual
isCPUSequencer()RubyPortinline
isDeadlockEventScheduled() const overrideDMASequencerinlinevirtual
issueNext(const Addr &addr)DMASequencerprivate
loadState(CheckpointIn &cp)SimObjectvirtual
m_controllerRubyPortprotected
m_data_block_maskDMASequencerprivate
m_mandatory_q_ptrRubyPortprotected
m_max_outstanding_requestsDMASequencerprivate
m_outstanding_countDMASequencerprivate
m_RequestTableDMASequencerprivate
m_ruby_systemRubyPortprotected
m_usingRubyTesterRubyPortprotected
m_versionRubyPortprotected
makeRequest(PacketPtr pkt) overrideDMASequencervirtual
memInvalidate()SimObjectinlinevirtual
memWriteback()SimObjectinlinevirtual
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
notifyFork()Drainableinlinevirtual
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
outstandingCount() const overrideDMASequencerinlinevirtual
Params typedefDMASequencer
params() constClockedObjectinline
powerStateClockedObject
preDumpStats()Stats::Groupvirtual
recordRequestType(DMASequencerRequestType requestType)DMASequencer
recvTimingResp(PacketPtr pkt, PortID master_port_id)RubyPortprotected
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats()Stats::Groupvirtual
RequestTable typedefDMASequencerprivate
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() constClockedinlineprotected
resetStats()Stats::Groupvirtual
resolveStat(std::string name) constStats::Group
ruby_eviction_callback(Addr address)RubyPortprotected
ruby_hit_callback(PacketPtr pkt)RubyPortprotected
RubyPort(const Params *p)RubyPort
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideClockedObjectvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
setController(AbstractController *_cntrl)RubyPortinline
setCurTick(Tick newVal)EventManagerinline
signalDrainDone() constDrainableinlineprotected
SimObject(const Params *_params)SimObject
slave_portsRubyPortprotected
startup()SimObjectvirtual
systemRubyPortprotected
testDrainComplete()RubyPortprotected
ticksToCycles(Tick t) constClockedinline
trySendRetries()RubyPortprotected
unserialize(CheckpointIn &cp) overrideClockedObjectvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
updateClockPeriod()Clockedinline
voltage() constClockedinline
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
~Clocked()Clockedinlineprotectedvirtual
~Drainable()Drainableprotectedvirtual
~Group()Stats::Groupvirtual
~RubyPort()RubyPortinlinevirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual

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