gem5
v20.0.0.3
|
#include <op_encodings.hh>
Public Member Functions | |
Inst_MIMG (InFmt_MIMG *, const std::string &opcode) | |
~Inst_MIMG () | |
int | instSize () const override |
![]() | |
GCN3GPUStaticInst (const std::string &opcode) | |
~GCN3GPUStaticInst () | |
void | generateDisassembly () override |
bool | isFlatScratchRegister (int opIdx) override |
bool | isExecMaskRegister (int opIdx) override |
bool | isScalarRegister (int opIdx) override |
bool | isVectorRegister (int opIdx) override |
bool | isSrcOperand (int opIdx) override |
bool | isDstOperand (int opIdx) override |
int | getOperandSize (int opIdx) override |
int | getRegisterIndex (int opIdx, GPUDynInstPtr gpuDynInst) override |
int | coalescerTokenCount () const override |
Return the number of tokens needed by the coalescer. More... | |
ScalarRegU32 | srcLiteral () const override |
![]() | |
GPUStaticInst (const std::string &opcode) | |
void | instAddr (int inst_addr) |
int | instAddr () const |
int | nextInstAddr () const |
void | instNum (int num) |
int | instNum () |
void | ipdInstNum (int num) |
int | ipdInstNum () const |
virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
const std::string & | disassemble () |
virtual int | getNumOperands ()=0 |
virtual bool | isCondRegister (int operandIndex)=0 |
virtual int | numDstRegOperands ()=0 |
virtual int | numSrcRegOperands ()=0 |
virtual bool | isValid () const =0 |
bool | isALU () const |
bool | isBranch () const |
bool | isNop () const |
bool | isReturn () const |
bool | isUnconditionalJump () const |
bool | isSpecialOp () const |
bool | isWaitcnt () const |
bool | isBarrier () const |
bool | isMemFence () const |
bool | isMemRef () const |
bool | isFlat () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isAtomicNoRet () const |
bool | isAtomicRet () const |
bool | isScalar () const |
bool | readsSCC () const |
bool | writesSCC () const |
bool | readsVCC () const |
bool | writesVCC () const |
bool | isAtomicAnd () const |
bool | isAtomicOr () const |
bool | isAtomicXor () const |
bool | isAtomicCAS () const |
bool | isAtomicExch () const |
bool | isAtomicAdd () const |
bool | isAtomicSub () const |
bool | isAtomicInc () const |
bool | isAtomicDec () const |
bool | isAtomicMax () const |
bool | isAtomicMin () const |
bool | isArgLoad () const |
bool | isGlobalMem () const |
bool | isLocalMem () const |
bool | isArgSeg () const |
bool | isGlobalSeg () const |
bool | isGroupSeg () const |
bool | isKernArgSeg () const |
bool | isPrivateSeg () const |
bool | isReadOnlySeg () const |
bool | isSpillSeg () const |
bool | isWorkitemScope () const |
bool | isWavefrontScope () const |
bool | isWorkgroupScope () const |
bool | isDeviceScope () const |
bool | isSystemScope () const |
bool | isNoScope () const |
bool | isRelaxedOrder () const |
bool | isAcquire () const |
bool | isRelease () const |
bool | isAcquireRelease () const |
bool | isNoOrder () const |
bool | isGloballyCoherent () const |
Coherence domain of a memory instruction. More... | |
bool | isSystemCoherent () const |
virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
virtual uint32_t | getTargetPc () |
void | setFlag (Flags flag) |
virtual void | execLdAcq (GPUDynInstPtr gpuDynInst) |
virtual void | execSt (GPUDynInstPtr gpuDynInst) |
virtual void | execAtomic (GPUDynInstPtr gpuDynInst) |
virtual void | execAtomicAcq (GPUDynInstPtr gpuDynInst) |
Protected Attributes | |
InFmt_MIMG | instData |
InFmt_MIMG_1 | extData |
![]() | |
ScalarRegU32 | _srcLiteral |
if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More... | |
![]() | |
const std::string | opcode |
std::string | disassembly |
int | _instNum |
int | _instAddr |
int | _ipdInstNum |
Identifier of the immediate post-dominator instruction. More... | |
std::bitset< Num_Flags > | _flags |
Additional Inherited Members | |
![]() | |
Enums::StorageClassType | executed_as |
![]() | |
static uint64_t | dynamic_id_count |
![]() | |
void | panicUnimplemented () const |
Definition at line 726 of file op_encodings.hh.
Gcn3ISA::Inst_MIMG::Inst_MIMG | ( | InFmt_MIMG * | iFmt, |
const std::string & | opcode | ||
) |
Definition at line 2001 of file op_encodings.cc.
References Gcn3ISA::GCN3GPUStaticInst::_srcLiteral, extData, Gcn3ISA::InFmt_MIMG::GLC, instData, GPUStaticInst::setFlag(), and Gcn3ISA::InFmt_MIMG::SLC.
Gcn3ISA::Inst_MIMG::~Inst_MIMG | ( | ) |
Definition at line 2017 of file op_encodings.cc.
|
overridevirtual |
Implements GPUStaticInst.
Definition at line 2022 of file op_encodings.cc.
|
protected |
Definition at line 738 of file op_encodings.hh.
Referenced by Inst_MIMG().
|
protected |
Definition at line 736 of file op_encodings.hh.
Referenced by Inst_MIMG(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_ADD::Inst_MIMG__IMAGE_ATOMIC_ADD(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_AND::Inst_MIMG__IMAGE_ATOMIC_AND(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_CMPSWAP::Inst_MIMG__IMAGE_ATOMIC_CMPSWAP(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_DEC::Inst_MIMG__IMAGE_ATOMIC_DEC(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_INC::Inst_MIMG__IMAGE_ATOMIC_INC(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_OR::Inst_MIMG__IMAGE_ATOMIC_OR(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_SMAX::Inst_MIMG__IMAGE_ATOMIC_SMAX(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_SMIN::Inst_MIMG__IMAGE_ATOMIC_SMIN(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_SUB::Inst_MIMG__IMAGE_ATOMIC_SUB(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_SWAP::Inst_MIMG__IMAGE_ATOMIC_SWAP(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_UMAX::Inst_MIMG__IMAGE_ATOMIC_UMAX(), Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_UMIN::Inst_MIMG__IMAGE_ATOMIC_UMIN(), and Gcn3ISA::Inst_MIMG__IMAGE_ATOMIC_XOR::Inst_MIMG__IMAGE_ATOMIC_XOR().