gem5  v20.0.0.3
float.hh
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37 
38 #ifndef __ARCH_X86_FLOATREGS_HH__
39 #define __ARCH_X86_FLOATREGS_HH__
40 
41 #include "arch/x86/x86_traits.hh"
42 #include "base/bitunion.hh"
43 
44 namespace X86ISA
45 {
46  enum FloatRegIndex
47  {
48  // MMX/X87 registers
49  FLOATREG_MMX_BASE,
50  FLOATREG_FPR_BASE = FLOATREG_MMX_BASE,
51  FLOATREG_MMX0 = FLOATREG_MMX_BASE,
52  FLOATREG_MMX1,
53  FLOATREG_MMX2,
54  FLOATREG_MMX3,
55  FLOATREG_MMX4,
56  FLOATREG_MMX5,
57  FLOATREG_MMX6,
58  FLOATREG_MMX7,
59 
60  FLOATREG_FPR0 = FLOATREG_FPR_BASE,
61  FLOATREG_FPR1,
62  FLOATREG_FPR2,
63  FLOATREG_FPR3,
64  FLOATREG_FPR4,
65  FLOATREG_FPR5,
66  FLOATREG_FPR6,
67  FLOATREG_FPR7,
68 
69  FLOATREG_XMM_BASE = FLOATREG_MMX_BASE + NumMMXRegs,
70  FLOATREG_XMM0_LOW = FLOATREG_XMM_BASE,
71  FLOATREG_XMM0_HIGH,
72  FLOATREG_XMM1_LOW,
73  FLOATREG_XMM1_HIGH,
74  FLOATREG_XMM2_LOW,
75  FLOATREG_XMM2_HIGH,
76  FLOATREG_XMM3_LOW,
77  FLOATREG_XMM3_HIGH,
78  FLOATREG_XMM4_LOW,
79  FLOATREG_XMM4_HIGH,
80  FLOATREG_XMM5_LOW,
81  FLOATREG_XMM5_HIGH,
82  FLOATREG_XMM6_LOW,
83  FLOATREG_XMM6_HIGH,
84  FLOATREG_XMM7_LOW,
85  FLOATREG_XMM7_HIGH,
86  FLOATREG_XMM8_LOW,
87  FLOATREG_XMM8_HIGH,
88  FLOATREG_XMM9_LOW,
89  FLOATREG_XMM9_HIGH,
90  FLOATREG_XMM10_LOW,
91  FLOATREG_XMM10_HIGH,
92  FLOATREG_XMM11_LOW,
93  FLOATREG_XMM11_HIGH,
94  FLOATREG_XMM12_LOW,
95  FLOATREG_XMM12_HIGH,
96  FLOATREG_XMM13_LOW,
97  FLOATREG_XMM13_HIGH,
98  FLOATREG_XMM14_LOW,
99  FLOATREG_XMM14_HIGH,
100  FLOATREG_XMM15_LOW,
101  FLOATREG_XMM15_HIGH,
102 
103  FLOATREG_MICROFP_BASE = FLOATREG_XMM_BASE + 2 * NumXMMRegs,
104  FLOATREG_MICROFP0 = FLOATREG_MICROFP_BASE,
105  FLOATREG_MICROFP1,
106  FLOATREG_MICROFP2,
107  FLOATREG_MICROFP3,
108  FLOATREG_MICROFP4,
109  FLOATREG_MICROFP5,
110  FLOATREG_MICROFP6,
111  FLOATREG_MICROFP7,
112 
113  NUM_FLOATREGS = FLOATREG_MICROFP_BASE + NumMicroFpRegs
114  };
115 
116  static inline FloatRegIndex
117  FLOATREG_MMX(int index)
118  {
119  return (FloatRegIndex)(FLOATREG_MMX_BASE + index);
120  }
121 
122  static inline FloatRegIndex
123  FLOATREG_FPR(int index)
124  {
125  return (FloatRegIndex)(FLOATREG_FPR_BASE + index);
126  }
127 
128  static inline FloatRegIndex
129  FLOATREG_XMM_LOW(int index)
130  {
131  return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index);
132  }
133 
134  static inline FloatRegIndex
135  FLOATREG_XMM_HIGH(int index)
136  {
137  return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index + 1);
138  }
139 
140  static inline FloatRegIndex
141  FLOATREG_MICROFP(int index)
142  {
143  return (FloatRegIndex)(FLOATREG_MICROFP_BASE + index);
144  }
145 
146  static inline FloatRegIndex
147  FLOATREG_STACK(int index, int top)
148  {
149  return FLOATREG_FPR((top + index + 8) % 8);
150  }
151 }
152 
153 #endif // __ARCH_X86_FLOATREGS_HH__
X86ISA::index
Bitfield< 5, 3 > index
Definition: types.hh:93
top
Definition: test.h:61
X86ISA::FLOATREG_MMX
static FloatRegIndex FLOATREG_MMX(int index)
Definition: float.hh:117
X86ISA::NumMicroFpRegs
const int NumMicroFpRegs
Definition: x86_traits.hh:59
X86ISA::NumMMXRegs
const int NumMMXRegs
Definition: x86_traits.hh:57
X86ISA::NumXMMRegs
const int NumXMMRegs
Definition: x86_traits.hh:58
x86_traits.hh
X86ISA::FLOATREG_FPR
static FloatRegIndex FLOATREG_FPR(int index)
Definition: float.hh:123
X86ISA::FLOATREG_XMM_HIGH
static FloatRegIndex FLOATREG_XMM_HIGH(int index)
Definition: float.hh:135
X86ISA::FLOATREG_STACK
static FloatRegIndex FLOATREG_STACK(int index, int top)
Definition: float.hh:147
X86ISA::FloatRegIndex
FloatRegIndex
Definition: float.hh:46
X86ISA::FLOATREG_MICROFP
static FloatRegIndex FLOATREG_MICROFP(int index)
Definition: float.hh:141
X86ISA::FLOATREG_XMM_LOW
static FloatRegIndex FLOATREG_XMM_LOW(int index)
Definition: float.hh:129
X86ISA
This is exposed globally, independent of the ISA.
Definition: acpi.hh:55
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