gem5  v20.1.0.0
Checker< Impl > Member List

This is the complete list of members for Checker< Impl >, including all inherited members.

_cacheLineSizeBaseCPUprotected
_cpuIdBaseCPUprotected
_dataRequestorIdBaseCPUprotected
_instRequestorIdBaseCPUprotected
_pidBaseCPUprotected
_socketIdBaseCPUprotected
_switchedOutBaseCPUprotected
_taskIdBaseCPUprotected
activateContext(ThreadID thread_num)BaseCPUvirtual
addressMonitorBaseCPUprivate
advancePC(const Fault &fault)Checker< Impl >
amoMem(Addr addr, uint8_t *data, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op) overrideCheckerCPUinline
ExecContext::amoMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op)ExecContextinlinevirtual
armMonitor(Addr address) overrideCheckerCPUinlinevirtual
BaseCPU::armMonitor(ThreadID tid, Addr address)BaseCPU
BaseCPU(Params *params, bool is_checker=false)BaseCPU
cacheLineSize() constBaseCPUinline
changedPCCheckerCPU
Checker(Params *p)Checker< Impl >inline
CheckerCPU(Params *p)CheckerCPU
checkFlags(const RequestPtr &unverified_req, Addr vAddr, Addr pAddr, int flags)CheckerCPU
checkInterrupts(ThreadID tid) constBaseCPUinline
clearInterrupt(ThreadID tid, int int_num, int index)BaseCPUinline
clearInterrupts(ThreadID tid)BaseCPUinline
contextToThread(ContextID cid)BaseCPUinline
copyResult(const DynInstPtr &inst, const InstResult &mismatch_val, int start_idx)Checker< Impl >
CPU_STATE_ON enum valueBaseCPUprotected
CPU_STATE_SLEEP enum valueBaseCPUprotected
CPU_STATE_WAKEUP enum valueBaseCPUprotected
cpuId() constBaseCPUinline
cpuListBaseCPUprivatestatic
CPUState enum nameBaseCPUprotected
curMacroStaticInstCheckerCPUprotected
currentFunctionEndBaseCPUprivate
currentFunctionStartBaseCPUprivate
curStaticInstCheckerCPUprotected
dataRequestorId() constBaseCPUinline
dcachePortCheckerCPUprotected
demapDataPage(Addr vaddr, uint64_t asn)CheckerCPUinline
demapInstPage(Addr vaddr, uint64_t asn)CheckerCPUinline
demapPage(Addr vaddr, uint64_t asn) overrideCheckerCPUinlinevirtual
deschedulePowerGatingEvent()BaseCPU
dtbCheckerCPUprotected
dumpAndExit(const DynInstPtr &inst)Checker< Impl >private
CheckerCPU::dumpAndExit()CheckerCPU
dumpInsts()Checker< Impl >private
DynInstPtr typedefChecker< Impl >private
enableFunctionTrace()BaseCPUprivate
enterPwrGating()BaseCPUprotected
enterPwrGatingEventBaseCPUprotected
exitOnErrorCheckerCPU
findContext(ThreadContext *tc)BaseCPU
flushTLBs()BaseCPU
functionEntryTickBaseCPUprivate
functionTraceStreamBaseCPUprivate
functionTracingEnabledBaseCPUprivate
genMemFragmentRequest(Addr frag_addr, int size, Request::Flags flags, const std::vector< bool > &byte_enable, int &frag_size, int &size_left) constCheckerCPU
getAddrMonitor() overrideCheckerCPUinlinevirtual
getContext(int tn)BaseCPUinlinevirtual
getCpuAddrMonitor(ThreadID tid)BaseCPUinline
getCurrentInstCount(ThreadID tid)BaseCPU
getDataPort() overrideCheckerCPUinlinevirtual
getDTBPtr()CheckerCPUinline
getHtmTransactionalDepth() const overrideCheckerCPUinlinevirtual
getHtmTransactionUid() const overrideCheckerCPUinlinevirtual
getInstPort() overrideCheckerCPUinlinevirtual
getInterruptController(ThreadID tid)BaseCPUinline
getITBPtr()CheckerCPUinline
getPid() constBaseCPUinline
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideBaseCPU
getSendFunctional()BaseCPUinlinevirtual
getTracer()BaseCPUinline
getWritableVecPredRegOperand(const StaticInst *si, int idx) overrideCheckerCPUinlinevirtual
getWritableVecRegOperand(const StaticInst *si, int idx) overrideCheckerCPUinlinevirtual
haltContext(ThreadID thread_num)BaseCPUvirtual
handleError(const DynInstPtr &inst)Checker< Impl >inlineprivate
CheckerCPU::handleError()CheckerCPUinline
handlePendingInt()Checker< Impl >
icachePortCheckerCPUprotected
inHtmTransactionalState() const overrideCheckerCPUinlinevirtual
init() overrideCheckerCPU
initiateHtmCmd(Request::Flags flags) overrideCheckerCPUinlinevirtual
initiateMemAMO(Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op)ExecContextinlinevirtual
initiateMemRead(Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >())ExecContextinlinevirtual
instAddr()CheckerCPUinline
instCntBaseCPUprotected
instCount()BaseCPUinline
instListChecker< Impl >private
InstListIt typedefChecker< Impl >private
instRequestorId() constBaseCPUinline
interruptsBaseCPUprotected
invldPidBaseCPUstatic
itbCheckerCPUprotected
MachInst typedefCheckerCPUprotected
microPC()CheckerCPUinline
miscRegIdxsCheckerCPUprotected
mwait(PacketPtr pkt) overrideCheckerCPUinlinevirtual
BaseCPU::mwait(ThreadID tid, PacketPtr pkt)BaseCPU
mwaitAtomic(ThreadContext *tc) overrideCheckerCPUinlinevirtual
BaseCPU::mwaitAtomic(ThreadID tid, ThreadContext *tc, BaseTLB *dtb)BaseCPU
newHtmTransactionUid() const overrideCheckerCPUinlinevirtual
newPCStateCheckerCPU
nextInstAddr()CheckerCPUinline
numContexts()BaseCPUinline
numCyclesBaseCPU
numInstCheckerCPUprotected
numLoadCheckerCPU
numSimulatedCPUs()BaseCPUinlinestatic
numSimulatedInsts()BaseCPUinlinestatic
numSimulatedInsts()BaseCPUinlinestatic
numSimulatedOps()BaseCPUinlinestatic
numSimulatedOps()BaseCPUinlinestatic
numThreadsBaseCPU
numWorkItemsCompletedBaseCPU
numWorkItemsStartedBaseCPU
Params typedefCheckerCPU
params() constBaseCPUinline
PCMaskBaseCPUstatic
PCState typedefExecContext
pcState() const overrideCheckerCPUinlinevirtual
pcState(const TheISA::PCState &val) overrideCheckerCPUinlinevirtual
pmuProbePoint(const char *name)BaseCPUprotected
postInterrupt(ThreadID tid, int int_num, int index)BaseCPU
powerGatingOnIdleBaseCPUprotected
ppActiveCyclesBaseCPUprotected
ppAllCyclesBaseCPUprotected
ppRetiredBranchesBaseCPUprotected
ppRetiredInstsBaseCPUprotected
ppRetiredInstsPCBaseCPUprotected
ppRetiredLoadsBaseCPUprotected
ppRetiredStoresBaseCPUprotected
ppSleepingBaseCPUprotected
previousCycleBaseCPUprotected
previousStateBaseCPUprotected
probeInstCommit(const StaticInstPtr &inst, Addr pc)BaseCPUvirtual
pwrGatingLatencyBaseCPUprotected
readCCRegOperand(const StaticInst *si, int idx) overrideCheckerCPUinlinevirtual
readFloatRegOperandBits(const StaticInst *si, int idx) overrideCheckerCPUinlinevirtual
readIntRegOperand(const StaticInst *si, int idx) overrideCheckerCPUinlinevirtual
readMem(Addr addr, uint8_t *data, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) overrideCheckerCPU
ExecContext::readMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >())ExecContextinlinevirtual
readMemAccPredicate() const overrideCheckerCPUinlinevirtual
readMiscReg(int misc_reg) overrideCheckerCPUinlinevirtual
readMiscRegNoEffect(int misc_reg) constCheckerCPUinline
readMiscRegOperand(const StaticInst *si, int idx) overrideCheckerCPUinlinevirtual
readPredicate() const overrideCheckerCPUinlinevirtual
readStCondFailures() const overrideCheckerCPUinlinevirtual
readVec16BitLaneOperand(const StaticInst *si, int idx) const overrideCheckerCPUinlinevirtual
readVec32BitLaneOperand(const StaticInst *si, int idx) const overrideCheckerCPUinlinevirtual
readVec64BitLaneOperand(const StaticInst *si, int idx) const overrideCheckerCPUinlinevirtual
readVec8BitLaneOperand(const StaticInst *si, int idx) const overrideCheckerCPUinlinevirtual
readVecElemOperand(const StaticInst *si, int idx) const overrideCheckerCPUinlinevirtual
readVecPredRegOperand(const StaticInst *si, int idx) const overrideCheckerCPUinlinevirtual
readVecRegOperand(const StaticInst *si, int idx) const overrideCheckerCPUinlinevirtual
recordPCChange(const TheISA::PCState &val)CheckerCPUinline
registerThreadContexts()BaseCPU
regProbePoints() overrideBaseCPU
regStats() overrideBaseCPU
requestorIdCheckerCPUprotected
resultCheckerCPUprotected
scheduleInstStop(ThreadID tid, Counter insts, const char *cause)BaseCPU
schedulePowerGatingEvent()BaseCPU
serialize(CheckpointOut &cp) const overrideCheckerCPU
serializeThread(CheckpointOut &cp, ThreadID tid) constBaseCPUinlinevirtual
setCCRegOperand(const StaticInst *si, int idx, RegVal val) overrideCheckerCPUinlinevirtual
setDcachePort(RequestPort *dcache_port)CheckerCPU
setFloatRegOperandBits(const StaticInst *si, int idx, RegVal val) overrideCheckerCPUinlinevirtual
setIcachePort(RequestPort *icache_port)CheckerCPU
setIntRegOperand(const StaticInst *si, int idx, RegVal val) overrideCheckerCPUinlinevirtual
setMemAccPredicate(bool val) overrideCheckerCPUinlinevirtual
setMiscReg(int misc_reg, RegVal val) overrideCheckerCPUinlinevirtual
setMiscRegNoEffect(int misc_reg, RegVal val)CheckerCPUinline
setMiscRegOperand(const StaticInst *si, int idx, RegVal val) overrideCheckerCPUinlinevirtual
setPid(uint32_t pid)BaseCPUinline
setPredicate(bool val) overrideCheckerCPUinlinevirtual
setScalarResult(T &&t)CheckerCPUinline
setStCondFailures(unsigned int sc_failures) overrideCheckerCPUinlinevirtual
setSystem(System *system)CheckerCPU
setVecElemOperand(const StaticInst *si, int idx, const VecElem val) overrideCheckerCPUinlinevirtual
setVecElemResult(T &&t)CheckerCPUinline
setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::Byte > &val) overrideCheckerCPUinlinevirtual
setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::TwoByte > &val) overrideCheckerCPUinlinevirtual
setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::FourByte > &val) overrideCheckerCPUinlinevirtual
setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::EightByte > &val) overrideCheckerCPUinlinevirtual
setVecLaneOperandT(const StaticInst *si, int idx, const LD &val)CheckerCPUinline
setVecPredRegOperand(const StaticInst *si, int idx, const VecPredRegContainer &val) overrideCheckerCPUinlinevirtual
setVecPredResult(T &&t)CheckerCPUinline
setVecRegOperand(const StaticInst *si, int idx, const VecRegContainer &val) overrideCheckerCPUinlinevirtual
setVecResult(T &&t)CheckerCPUinline
socketId() constBaseCPUinline
startNumInstCheckerCPUprotected
startNumLoadCheckerCPU
startup() overrideBaseCPU
suspendContext(ThreadID thread_num)BaseCPUvirtual
switchedOut() constBaseCPUinline
switchOut()Checker< Impl >virtual
syscall() overrideCheckerCPUinlinevirtual
syscallRetryLatencyBaseCPU
systemBaseCPU
systemPtrCheckerCPUprotected
takeOverFrom(BaseCPU *oldCPU)Checker< Impl >virtual
taskId() constBaseCPUinline
taskId(uint32_t id)BaseCPUinline
tcCheckerCPUprotected
tcBase() const overrideCheckerCPUinlinevirtual
threadCheckerCPU
threadBase()CheckerCPUinline
threadContextsBaseCPUprotected
totalInsts() const overrideCheckerCPUinlinevirtual
totalOps() const overrideCheckerCPUinlinevirtual
traceFunctions(Addr pc)BaseCPUinline
traceFunctionsInternal(Addr pc)BaseCPUprivate
tracerBaseCPUprotected
unserialize(CheckpointIn &cp) overrideCheckerCPU
unserializeThread(CheckpointIn &cp, ThreadID tid)BaseCPUinlinevirtual
unverifiedInstChecker< Impl >private
unverifiedMemDataCheckerCPU
unverifiedReqCheckerCPU
unverifiedResultCheckerCPU
updateCycleCounters(CPUState state)BaseCPUinlineprotected
updateOnErrorCheckerCPU
updateThisCycleChecker< Impl >private
validateExecution(const DynInstPtr &inst)Checker< Impl >
validateInst(const DynInstPtr &inst)Checker< Impl >
validateState()Checker< Impl >
VecElem typedefExecContext
VecPredRegContainer typedefExecContext
VecRegContainer typedefCheckerCPUprotected
verify(const DynInstPtr &inst)Checker< Impl >
verifyMemoryMode() constBaseCPUinlinevirtual
waitForRemoteGDB() constBaseCPU
wakeup(ThreadID tid) overrideCheckerCPUinlinevirtual
warnOnlyOnLoadErrorCheckerCPU
willChangePCCheckerCPU
workItemBegin()BaseCPUinline
workItemEnd()BaseCPUinline
workloadCheckerCPUprotected
writeMem(uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable=std::vector< bool >()) overrideCheckerCPU
ExecContext::writeMem(uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable=std::vector< bool >())=0ExecContextpure virtual
youngestSNCheckerCPU
~BaseCPU()BaseCPUvirtual
~CheckerCPU()CheckerCPUvirtual

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