gem5
v20.1.0.0
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#include <op_encodings.hh>
Public Member Functions | |
Inst_SOP1 (InFmt_SOP1 *, const std::string &opcode) | |
~Inst_SOP1 () | |
int | instSize () const override |
void | generateDisassembly () override |
bool | isScalarRegister (int opIdx) override |
bool | isVectorRegister (int opIdx) override |
int | getRegisterIndex (int opIdx, GPUDynInstPtr gpuDynInst) override |
Public Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst | |
GCN3GPUStaticInst (const std::string &opcode) | |
~GCN3GPUStaticInst () | |
bool | isFlatScratchRegister (int opIdx) override |
bool | isExecMaskRegister (int opIdx) override |
bool | isSrcOperand (int opIdx) override |
bool | isDstOperand (int opIdx) override |
int | getOperandSize (int opIdx) override |
int | coalescerTokenCount () const override |
Return the number of tokens needed by the coalescer. More... | |
ScalarRegU32 | srcLiteral () const override |
Public Member Functions inherited from GPUStaticInst | |
GPUStaticInst (const std::string &opcode) | |
virtual | ~GPUStaticInst () |
void | instAddr (int inst_addr) |
int | instAddr () const |
int | nextInstAddr () const |
void | instNum (int num) |
int | instNum () |
void | ipdInstNum (int num) |
int | ipdInstNum () const |
virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
const std::string & | disassemble () |
virtual int | getNumOperands ()=0 |
virtual int | numDstRegOperands ()=0 |
virtual int | numSrcRegOperands ()=0 |
int | numDstVecOperands () |
int | numSrcVecOperands () |
int | numDstVecDWORDs () |
int | numSrcVecDWORDs () |
int | numOpdDWORDs (int operandIdx) |
bool | isALU () const |
bool | isBranch () const |
bool | isCondBranch () const |
bool | isNop () const |
bool | isReturn () const |
bool | isEndOfKernel () const |
bool | isKernelLaunch () const |
bool | isSDWAInst () const |
bool | isDPPInst () const |
bool | isUnconditionalJump () const |
bool | isSpecialOp () const |
bool | isWaitcnt () const |
bool | isBarrier () const |
bool | isMemSync () const |
bool | isMemRef () const |
bool | isFlat () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isAtomicNoRet () const |
bool | isAtomicRet () const |
bool | isScalar () const |
bool | readsSCC () const |
bool | writesSCC () const |
bool | readsVCC () const |
bool | writesVCC () const |
bool | readsEXEC () const |
bool | writesEXEC () const |
bool | readsMode () const |
bool | writesMode () const |
bool | ignoreExec () const |
bool | isAtomicAnd () const |
bool | isAtomicOr () const |
bool | isAtomicXor () const |
bool | isAtomicCAS () const |
bool | isAtomicExch () const |
bool | isAtomicAdd () const |
bool | isAtomicSub () const |
bool | isAtomicInc () const |
bool | isAtomicDec () const |
bool | isAtomicMax () const |
bool | isAtomicMin () const |
bool | isArgLoad () const |
bool | isGlobalMem () const |
bool | isLocalMem () const |
bool | isArgSeg () const |
bool | isGlobalSeg () const |
bool | isGroupSeg () const |
bool | isKernArgSeg () const |
bool | isPrivateSeg () const |
bool | isReadOnlySeg () const |
bool | isSpillSeg () const |
bool | isGloballyCoherent () const |
Coherence domain of a memory instruction. More... | |
bool | isSystemCoherent () const |
bool | isF16 () const |
bool | isF32 () const |
bool | isF64 () const |
bool | isFMA () const |
bool | isMAC () const |
bool | isMAD () const |
virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
virtual uint32_t | getTargetPc () |
void | setFlag (Flags flag) |
const std::string & | opcode () const |
Protected Attributes | |
InFmt_SOP1 | instData |
InstFormat | extData |
uint32_t | varSize |
Protected Attributes inherited from Gcn3ISA::GCN3GPUStaticInst | |
ScalarRegU32 | _srcLiteral |
if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More... | |
Protected Attributes inherited from GPUStaticInst | |
const std::string | _opcode |
std::string | disassembly |
int | _instNum |
int | _instAddr |
int | srcVecOperands |
int | dstVecOperands |
int | srcVecDWORDs |
int | dstVecDWORDs |
int | _ipdInstNum |
Identifier of the immediate post-dominator instruction. More... | |
std::bitset< Num_Flags > | _flags |
Private Member Functions | |
bool | hasSecondDword (InFmt_SOP1 *) |
Additional Inherited Members | |
Public Attributes inherited from GPUStaticInst | |
Enums::StorageClassType | executed_as |
Static Public Attributes inherited from GPUStaticInst | |
static uint64_t | dynamic_id_count |
Protected Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst | |
void | panicUnimplemented () const |
Definition at line 121 of file op_encodings.hh.
Gcn3ISA::Inst_SOP1::Inst_SOP1 | ( | InFmt_SOP1 * | iFmt, |
const std::string & | opcode | ||
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Definition at line 268 of file op_encodings.cc.
References Gcn3ISA::GCN3GPUStaticInst::_srcLiteral, extData, hasSecondDword(), instData, GPUStaticInst::setFlag(), and varSize.
Gcn3ISA::Inst_SOP1::~Inst_SOP1 | ( | ) |
Definition at line 285 of file op_encodings.cc.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 305 of file op_encodings.cc.
References GPUStaticInst::_opcode, GPUStaticInst::disassembly, extData, Gcn3ISA::InstFormat::imm_u32, instData, Gcn3ISA::opSelectorToRegSym(), Gcn3ISA::REG_SRC_LITERAL, Gcn3ISA::InFmt_SOP1::SDST, and Gcn3ISA::InFmt_SOP1::SSRC0.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 354 of file op_encodings.cc.
References fatal, GPUStaticInst::getNumOperands(), instData, Gcn3ISA::InFmt_SOP1::OP, Gcn3ISA::opSelectorToRegIdx(), Gcn3ISA::InFmt_SOP1::SDST, and Gcn3ISA::InFmt_SOP1::SSRC0.
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private |
Definition at line 296 of file op_encodings.cc.
References Gcn3ISA::REG_SRC_LITERAL, and Gcn3ISA::InFmt_SOP1::SSRC0.
Referenced by Inst_SOP1().
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overridevirtual |
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 322 of file op_encodings.cc.
References fatal, GPUStaticInst::getNumOperands(), instData, Gcn3ISA::isScalarReg(), Gcn3ISA::InFmt_SOP1::OP, Gcn3ISA::InFmt_SOP1::SDST, and Gcn3ISA::InFmt_SOP1::SSRC0.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 344 of file op_encodings.cc.
References GPUStaticInst::getNumOperands().
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protected |
Definition at line 138 of file op_encodings.hh.
Referenced by generateDisassembly(), and Inst_SOP1().
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protected |
Definition at line 136 of file op_encodings.hh.
Referenced by Gcn3ISA::Inst_SOP1__S_MOV_B32::execute(), Gcn3ISA::Inst_SOP1__S_MOV_B64::execute(), Gcn3ISA::Inst_SOP1__S_CMOV_B32::execute(), Gcn3ISA::Inst_SOP1__S_CMOV_B64::execute(), Gcn3ISA::Inst_SOP1__S_NOT_B32::execute(), Gcn3ISA::Inst_SOP1__S_NOT_B64::execute(), Gcn3ISA::Inst_SOP1__S_WQM_B32::execute(), Gcn3ISA::Inst_SOP1__S_WQM_B64::execute(), Gcn3ISA::Inst_SOP1__S_BREV_B32::execute(), Gcn3ISA::Inst_SOP1__S_BREV_B64::execute(), Gcn3ISA::Inst_SOP1__S_BCNT0_I32_B32::execute(), Gcn3ISA::Inst_SOP1__S_BCNT0_I32_B64::execute(), Gcn3ISA::Inst_SOP1__S_BCNT1_I32_B32::execute(), Gcn3ISA::Inst_SOP1__S_BCNT1_I32_B64::execute(), Gcn3ISA::Inst_SOP1__S_FF0_I32_B32::execute(), Gcn3ISA::Inst_SOP1__S_FF0_I32_B64::execute(), Gcn3ISA::Inst_SOP1__S_FF1_I32_B32::execute(), Gcn3ISA::Inst_SOP1__S_FF1_I32_B64::execute(), Gcn3ISA::Inst_SOP1__S_FLBIT_I32_B32::execute(), Gcn3ISA::Inst_SOP1__S_FLBIT_I32_B64::execute(), Gcn3ISA::Inst_SOP1__S_FLBIT_I32::execute(), Gcn3ISA::Inst_SOP1__S_FLBIT_I32_I64::execute(), Gcn3ISA::Inst_SOP1__S_SEXT_I32_I8::execute(), Gcn3ISA::Inst_SOP1__S_SEXT_I32_I16::execute(), Gcn3ISA::Inst_SOP1__S_BITSET0_B32::execute(), Gcn3ISA::Inst_SOP1__S_BITSET0_B64::execute(), Gcn3ISA::Inst_SOP1__S_BITSET1_B32::execute(), Gcn3ISA::Inst_SOP1__S_BITSET1_B64::execute(), Gcn3ISA::Inst_SOP1__S_GETPC_B64::execute(), Gcn3ISA::Inst_SOP1__S_SETPC_B64::execute(), Gcn3ISA::Inst_SOP1__S_SWAPPC_B64::execute(), Gcn3ISA::Inst_SOP1__S_AND_SAVEEXEC_B64::execute(), Gcn3ISA::Inst_SOP1__S_OR_SAVEEXEC_B64::execute(), Gcn3ISA::Inst_SOP1__S_XOR_SAVEEXEC_B64::execute(), Gcn3ISA::Inst_SOP1__S_ANDN2_SAVEEXEC_B64::execute(), Gcn3ISA::Inst_SOP1__S_ORN2_SAVEEXEC_B64::execute(), Gcn3ISA::Inst_SOP1__S_NAND_SAVEEXEC_B64::execute(), Gcn3ISA::Inst_SOP1__S_NOR_SAVEEXEC_B64::execute(), Gcn3ISA::Inst_SOP1__S_XNOR_SAVEEXEC_B64::execute(), Gcn3ISA::Inst_SOP1__S_QUADMASK_B32::execute(), Gcn3ISA::Inst_SOP1__S_QUADMASK_B64::execute(), Gcn3ISA::Inst_SOP1__S_MOVRELS_B32::execute(), Gcn3ISA::Inst_SOP1__S_MOVRELS_B64::execute(), Gcn3ISA::Inst_SOP1__S_MOVRELD_B32::execute(), Gcn3ISA::Inst_SOP1__S_MOVRELD_B64::execute(), Gcn3ISA::Inst_SOP1__S_ABS_I32::execute(), generateDisassembly(), getRegisterIndex(), Inst_SOP1(), and isScalarRegister().
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protected |
Definition at line 139 of file op_encodings.hh.
Referenced by Inst_SOP1(), and instSize().