gem5
v20.1.0.0
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#include <op_encodings.hh>
Public Member Functions | |
Inst_SOP2 (InFmt_SOP2 *, const std::string &opcode) | |
int | instSize () const override |
void | generateDisassembly () override |
bool | isScalarRegister (int opIdx) override |
bool | isVectorRegister (int opIdx) override |
int | getRegisterIndex (int opIdx, GPUDynInstPtr gpuDynInst) override |
Public Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst | |
GCN3GPUStaticInst (const std::string &opcode) | |
~GCN3GPUStaticInst () | |
bool | isFlatScratchRegister (int opIdx) override |
bool | isExecMaskRegister (int opIdx) override |
bool | isSrcOperand (int opIdx) override |
bool | isDstOperand (int opIdx) override |
int | getOperandSize (int opIdx) override |
int | coalescerTokenCount () const override |
Return the number of tokens needed by the coalescer. More... | |
ScalarRegU32 | srcLiteral () const override |
Public Member Functions inherited from GPUStaticInst | |
GPUStaticInst (const std::string &opcode) | |
virtual | ~GPUStaticInst () |
void | instAddr (int inst_addr) |
int | instAddr () const |
int | nextInstAddr () const |
void | instNum (int num) |
int | instNum () |
void | ipdInstNum (int num) |
int | ipdInstNum () const |
virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
const std::string & | disassemble () |
virtual int | getNumOperands ()=0 |
virtual int | numDstRegOperands ()=0 |
virtual int | numSrcRegOperands ()=0 |
int | numDstVecOperands () |
int | numSrcVecOperands () |
int | numDstVecDWORDs () |
int | numSrcVecDWORDs () |
int | numOpdDWORDs (int operandIdx) |
bool | isALU () const |
bool | isBranch () const |
bool | isCondBranch () const |
bool | isNop () const |
bool | isReturn () const |
bool | isEndOfKernel () const |
bool | isKernelLaunch () const |
bool | isSDWAInst () const |
bool | isDPPInst () const |
bool | isUnconditionalJump () const |
bool | isSpecialOp () const |
bool | isWaitcnt () const |
bool | isBarrier () const |
bool | isMemSync () const |
bool | isMemRef () const |
bool | isFlat () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isAtomicNoRet () const |
bool | isAtomicRet () const |
bool | isScalar () const |
bool | readsSCC () const |
bool | writesSCC () const |
bool | readsVCC () const |
bool | writesVCC () const |
bool | readsEXEC () const |
bool | writesEXEC () const |
bool | readsMode () const |
bool | writesMode () const |
bool | ignoreExec () const |
bool | isAtomicAnd () const |
bool | isAtomicOr () const |
bool | isAtomicXor () const |
bool | isAtomicCAS () const |
bool | isAtomicExch () const |
bool | isAtomicAdd () const |
bool | isAtomicSub () const |
bool | isAtomicInc () const |
bool | isAtomicDec () const |
bool | isAtomicMax () const |
bool | isAtomicMin () const |
bool | isArgLoad () const |
bool | isGlobalMem () const |
bool | isLocalMem () const |
bool | isArgSeg () const |
bool | isGlobalSeg () const |
bool | isGroupSeg () const |
bool | isKernArgSeg () const |
bool | isPrivateSeg () const |
bool | isReadOnlySeg () const |
bool | isSpillSeg () const |
bool | isGloballyCoherent () const |
Coherence domain of a memory instruction. More... | |
bool | isSystemCoherent () const |
bool | isF16 () const |
bool | isF32 () const |
bool | isF64 () const |
bool | isFMA () const |
bool | isMAC () const |
bool | isMAD () const |
virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
virtual uint32_t | getTargetPc () |
void | setFlag (Flags flag) |
const std::string & | opcode () const |
Protected Attributes | |
InFmt_SOP2 | instData |
InstFormat | extData |
uint32_t | varSize |
Protected Attributes inherited from Gcn3ISA::GCN3GPUStaticInst | |
ScalarRegU32 | _srcLiteral |
if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More... | |
Protected Attributes inherited from GPUStaticInst | |
const std::string | _opcode |
std::string | disassembly |
int | _instNum |
int | _instAddr |
int | srcVecOperands |
int | dstVecOperands |
int | srcVecDWORDs |
int | dstVecDWORDs |
int | _ipdInstNum |
Identifier of the immediate post-dominator instruction. More... | |
std::bitset< Num_Flags > | _flags |
Private Member Functions | |
bool | hasSecondDword (InFmt_SOP2 *) |
Additional Inherited Members | |
Public Attributes inherited from GPUStaticInst | |
Enums::StorageClassType | executed_as |
Static Public Attributes inherited from GPUStaticInst | |
static uint64_t | dynamic_id_count |
Protected Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst | |
void | panicUnimplemented () const |
Definition at line 74 of file op_encodings.hh.
Gcn3ISA::Inst_SOP2::Inst_SOP2 | ( | InFmt_SOP2 * | iFmt, |
const std::string & | opcode | ||
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Definition at line 44 of file op_encodings.cc.
References Gcn3ISA::GCN3GPUStaticInst::_srcLiteral, extData, hasSecondDword(), instData, GPUStaticInst::setFlag(), and varSize.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 80 of file op_encodings.cc.
References GPUStaticInst::_opcode, Gcn3ISA::GCN3GPUStaticInst::_srcLiteral, GPUStaticInst::disassembly, instData, Gcn3ISA::opSelectorToRegSym(), Gcn3ISA::REG_SRC_LITERAL, Gcn3ISA::InFmt_SOP2::SDST, Gcn3ISA::InFmt_SOP2::SSRC0, and Gcn3ISA::InFmt_SOP2::SSRC1.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 133 of file op_encodings.cc.
References fatal, GPUStaticInst::getNumOperands(), instData, Gcn3ISA::opSelectorToRegIdx(), Gcn3ISA::InFmt_SOP2::SDST, Gcn3ISA::InFmt_SOP2::SSRC0, and Gcn3ISA::InFmt_SOP2::SSRC1.
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private |
Definition at line 68 of file op_encodings.cc.
References Gcn3ISA::REG_SRC_LITERAL, Gcn3ISA::InFmt_SOP2::SSRC0, and Gcn3ISA::InFmt_SOP2::SSRC1.
Referenced by Inst_SOP2().
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overridevirtual |
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 104 of file op_encodings.cc.
References fatal, GPUStaticInst::getNumOperands(), instData, Gcn3ISA::isScalarReg(), Gcn3ISA::InFmt_SOP2::SDST, Gcn3ISA::InFmt_SOP2::SSRC0, and Gcn3ISA::InFmt_SOP2::SSRC1.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 123 of file op_encodings.cc.
References GPUStaticInst::getNumOperands().
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protected |
Definition at line 90 of file op_encodings.hh.
Referenced by Inst_SOP2().
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protected |
Definition at line 88 of file op_encodings.hh.
Referenced by Gcn3ISA::Inst_SOP2__S_ADD_U32::execute(), Gcn3ISA::Inst_SOP2__S_SUB_U32::execute(), Gcn3ISA::Inst_SOP2__S_ADD_I32::execute(), Gcn3ISA::Inst_SOP2__S_SUB_I32::execute(), Gcn3ISA::Inst_SOP2__S_ADDC_U32::execute(), Gcn3ISA::Inst_SOP2__S_SUBB_U32::execute(), Gcn3ISA::Inst_SOP2__S_MIN_I32::execute(), Gcn3ISA::Inst_SOP2__S_MIN_U32::execute(), Gcn3ISA::Inst_SOP2__S_MAX_I32::execute(), Gcn3ISA::Inst_SOP2__S_MAX_U32::execute(), Gcn3ISA::Inst_SOP2__S_CSELECT_B32::execute(), Gcn3ISA::Inst_SOP2__S_CSELECT_B64::execute(), Gcn3ISA::Inst_SOP2__S_AND_B32::execute(), Gcn3ISA::Inst_SOP2__S_AND_B64::execute(), Gcn3ISA::Inst_SOP2__S_OR_B32::execute(), Gcn3ISA::Inst_SOP2__S_OR_B64::execute(), Gcn3ISA::Inst_SOP2__S_XOR_B32::execute(), Gcn3ISA::Inst_SOP2__S_XOR_B64::execute(), Gcn3ISA::Inst_SOP2__S_ANDN2_B32::execute(), Gcn3ISA::Inst_SOP2__S_ANDN2_B64::execute(), Gcn3ISA::Inst_SOP2__S_ORN2_B32::execute(), Gcn3ISA::Inst_SOP2__S_ORN2_B64::execute(), Gcn3ISA::Inst_SOP2__S_NAND_B32::execute(), Gcn3ISA::Inst_SOP2__S_NAND_B64::execute(), Gcn3ISA::Inst_SOP2__S_NOR_B32::execute(), Gcn3ISA::Inst_SOP2__S_NOR_B64::execute(), Gcn3ISA::Inst_SOP2__S_XNOR_B32::execute(), Gcn3ISA::Inst_SOP2__S_XNOR_B64::execute(), Gcn3ISA::Inst_SOP2__S_LSHL_B32::execute(), Gcn3ISA::Inst_SOP2__S_LSHL_B64::execute(), Gcn3ISA::Inst_SOP2__S_LSHR_B32::execute(), Gcn3ISA::Inst_SOP2__S_LSHR_B64::execute(), Gcn3ISA::Inst_SOP2__S_ASHR_I32::execute(), Gcn3ISA::Inst_SOP2__S_ASHR_I64::execute(), Gcn3ISA::Inst_SOP2__S_BFM_B32::execute(), Gcn3ISA::Inst_SOP2__S_BFM_B64::execute(), Gcn3ISA::Inst_SOP2__S_MUL_I32::execute(), Gcn3ISA::Inst_SOP2__S_BFE_U32::execute(), Gcn3ISA::Inst_SOP2__S_BFE_I32::execute(), Gcn3ISA::Inst_SOP2__S_BFE_U64::execute(), Gcn3ISA::Inst_SOP2__S_BFE_I64::execute(), Gcn3ISA::Inst_SOP2__S_ABSDIFF_I32::execute(), generateDisassembly(), getRegisterIndex(), Inst_SOP2(), and isScalarRegister().
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protected |
Definition at line 91 of file op_encodings.hh.
Referenced by Inst_SOP2(), and instSize().